sched/deadline: Move DL related code from sched/core.c to sched/deadline.c

[linux.git] / drivers / gpu / drm / vc4 / vc4_crtc.c

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 9fcf05ca492b0c065a323f69be32ed3cc93b630f..d86c8cce318270a0e34b09c3a1713d48e1a4ff0b 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -11,12 +11,13 @@
  *
  * In VC4, the Pixel Valve is what most closely corresponds to the
  * DRM's concept of a CRTC.  The PV generates video timings from the
- * output's clock plus its configuration.  It pulls scaled pixels from
+ * encoder's clock plus its configuration.  It pulls scaled pixels from
  * the HVS at that timing, and feeds it to the encoder.
  *
  * However, the DRM CRTC also collects the configuration of all the
- * DRM planes attached to it.  As a result, this file also manages
- * setup of the VC4 HVS's display elements on the CRTC.
+ * DRM planes attached to it.  As a result, the CRTC is also
+ * responsible for writing the display list for the HVS channel that
+ * the CRTC will use.
  *
  * The 2835 has 3 different pixel valves.  pv0 in the audio power
  * domain feeds DSI0 or DPI, while pv1 feeds DS1 or SMI.  pv2 in the
@@ -313,7 +314,8 @@ vc4_crtc_lut_load(struct drm_crtc *crtc)
 
 static int
 vc4_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
-                  uint32_t size)
+                  uint32_t size,
+                  struct drm_modeset_acquire_ctx *ctx)
 {
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
        u32 i;
@@ -654,9 +656,8 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
        }
 }
 
-int vc4_enable_vblank(struct drm_device *dev, unsigned int crtc_id)
+static int vc4_enable_vblank(struct drm_crtc *crtc)
 {
-       struct drm_crtc *crtc = drm_crtc_from_index(dev, crtc_id);
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
 
        CRTC_WRITE(PV_INTEN, PV_INT_VFP_START);
@@ -664,9 +665,8 @@ int vc4_enable_vblank(struct drm_device *dev, unsigned int crtc_id)
        return 0;
 }
 
-void vc4_disable_vblank(struct drm_device *dev, unsigned int crtc_id)
+static void vc4_disable_vblank(struct drm_crtc *crtc)
 {
-       struct drm_crtc *crtc = drm_crtc_from_index(dev, crtc_id);
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
 
        CRTC_WRITE(PV_INTEN, 0);
@@ -808,12 +808,13 @@ static int vc4_async_page_flip(struct drm_crtc *crtc,
 static int vc4_page_flip(struct drm_crtc *crtc,
                         struct drm_framebuffer *fb,
                         struct drm_pending_vblank_event *event,
-                        uint32_t flags)
+                        uint32_t flags,
+                        struct drm_modeset_acquire_ctx *ctx)
 {
        if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
                return vc4_async_page_flip(crtc, fb, event, flags);
        else
-               return drm_atomic_helper_page_flip(crtc, fb, event, flags);
+               return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx);
 }
 
 static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc)
@@ -868,6 +869,8 @@ static const struct drm_crtc_funcs vc4_crtc_funcs = {
        .atomic_duplicate_state = vc4_crtc_duplicate_state,
        .atomic_destroy_state = vc4_crtc_destroy_state,
        .gamma_set = vc4_crtc_gamma_set,
+       .enable_vblank = vc4_enable_vblank,
+       .disable_vblank = vc4_disable_vblank,
 };
 
 static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {