Merge tag 'ktest-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...

[linux.git] / drivers / gpu / drm / amd / amdgpu / gfxhub_v1_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index d189507dcef0c43eb8b19080592bc9ab4287d7e7..1e4678cb98f01fe18713c0779808b4475bd37a0d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -120,8 +120,7 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
                                max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
 
                /* Set default page address. */
-               value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +
-                       adev->vm_manager.vram_base_offset;
+               value = amdgpu_gmc_vram_mc2pa(adev, adev->vram_scratch.gpu_addr);
                WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
                             (u32)(value >> 12));
                WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
@@ -141,21 +140,12 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
         * FB aperture and AGP aperture. Disable them.
         */
        if (adev->gmc.pdb0_bo) {
-               if (adev->asic_type == CHIP_ALDEBARAN) {
-                       WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, adev->gmc.fb_end_original >> 24);
-                       WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, adev->gmc.fb_start_original >> 24);
-                       WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
-                       WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFF);
-                       WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, adev->gmc.fb_start_original >> 18);
-                       WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, adev->gmc.fb_end_original >> 18);
-               } else {
-                       WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);
-                       WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
-                       WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
-                       WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFF);
-                       WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);
-                       WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);
-               }
+               WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);
+               WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFF);
+               WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);
+               WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);
        }
 }