Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ras.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 700eb180ea60fa819f3a21961c1c90f1ad54f8b5..4769a18304d7a4435403ffce859902b25e70f816 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -489,7 +489,8 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f,
                ret = amdgpu_ras_feature_enable(adev, &data.head, 1);
                break;
        case 2:
-               if ((data.inject.address >= adev->gmc.mc_vram_size) ||
+               if ((data.inject.address >= adev->gmc.mc_vram_size &&
+                   adev->gmc.mc_vram_size) ||
                    (data.inject.address >= RAS_UMC_INJECT_ADDR_LIMIT)) {
                        dev_warn(adev->dev, "RAS WARN: input address "
                                        "0x%llx is invalid.",
@@ -1686,8 +1687,7 @@ static void amdgpu_ras_interrupt_poison_consumption_handler(struct ras_manager *
                }
        }
 
-       if (!adev->gmc.xgmi.connected_to_cpu)
-               amdgpu_umc_poison_handler(adev, false);
+       amdgpu_umc_poison_handler(adev, false);
 
        if (block_obj->hw_ops && block_obj->hw_ops->handle_poison_consumption)
                poison_stat = block_obj->hw_ops->handle_poison_consumption(adev);
@@ -2452,11 +2452,10 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev)
 {
        adev->ras_hw_enabled = adev->ras_enabled = 0;
 
-       if (!adev->is_atom_fw ||
-           !amdgpu_ras_asic_supported(adev))
+       if (!amdgpu_ras_asic_supported(adev))
                return;
 
-       if (!adev->gmc.xgmi.connected_to_cpu) {
+       if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
                if (amdgpu_atomfirmware_mem_ecc_supported(adev)) {
                        dev_info(adev->dev, "MEM ECC is active.\n");
                        adev->ras_hw_enabled |= (1 << AMDGPU_RAS_BLOCK__UMC |