[PATCH] swsusp: read speedup

[linux.git] / include / asm-m32r / ptrace.h

diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h
index 0d058b2d844e468ac6d6ac448a553dfa1d752528..2d2a6c97331e11b7ac2eb03407de1cb87ff3909c 100644 (file)
--- a/include/asm-m32r/ptrace.h
+++ b/include/asm-m32r/ptrace.h
@@ -12,9 +12,6 @@
  *   Copyright (C) 2001-2002, 2004  Hirokazu Takata <takata at linux-m32r.org>
  */
 
-#include <linux/config.h>
-#include <asm/m32r.h>          /* M32R_PSW_BSM, M32R_PSW_BPM */
-
 /* 0 - 13 are integer registers (general purpose registers).  */
 #define PT_R4          0
 #define PT_R5          1
@@ -43,6 +40,14 @@
 #define PT_ACC1L       18
 #define PT_ACCH                PT_ACC0H
 #define PT_ACCL                PT_ACC0L
+#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+#define PT_ACCH                15
+#define PT_ACCL                16
+#define PT_DUMMY_ACC1H 17
+#define PT_DUMMY_ACC1L 18
+#else
+#error unknown isa conifiguration
+#endif
 #define PT_PSW         19
 #define PT_BPC         20
 #define PT_BBPSW       21
@@ -52,21 +57,6 @@
 #define PT_LR          25
 #define PT_SPI         26
 #define PT_ORIGR0      27
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
-#define PT_ACCH                15
-#define PT_ACCL                16
-#define PT_PSW         17
-#define PT_BPC         18
-#define PT_BBPSW       19
-#define PT_BBPC                20
-#define PT_SPU         21
-#define PT_FP          22
-#define PT_LR          23
-#define PT_SPI         24
-#define PT_ORIGR0      25
-#else
-#error unknown isa conifiguration
-#endif
 
 /* virtual pt_reg entry for gdb */
 #define PT_PC          30
@@ -121,6 +111,8 @@ struct pt_regs {
 #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
        unsigned long acch;
        unsigned long accl;
+       unsigned long dummy_acc1h;
+       unsigned long dummy_acc1l;
 #else
 #error unknown isa configuration
 #endif
@@ -146,6 +138,8 @@ struct pt_regs {
 
 #ifdef __KERNEL__
 
+#include <asm/m32r.h>          /* M32R_PSW_BSM, M32R_PSW_BPM */
+
 #define __ARCH_SYS_PTRACE      1
 
 #if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)