Merge tag 'drm-misc-next-2021-04-01' of git://anongit.freedesktop.org/drm/drm-misc...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index d660deec20f09fdd6c5dba02a79cc876bd6e6b49..a037c223c251b7ca57b026534a30a1d4c89c2af3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -124,6 +124,10 @@ struct amdgpu_mgpu_info
        uint32_t                        num_gpu;
        uint32_t                        num_dgpu;
        uint32_t                        num_apu;
+
+       /* delayed reset_func for XGMI configuration if necessary */
+       struct delayed_work             delayed_reset_work;
+       bool                            pending_reset;
 };
 
 struct amdgpu_watchdog_timer
@@ -185,6 +189,7 @@ extern int amdgpu_emu_mode;
 extern uint amdgpu_smu_memory_pool_size;
 extern int amdgpu_smu_pptable_id;
 extern uint amdgpu_dc_feature_mask;
+extern uint amdgpu_freesync_vid_mode;
 extern uint amdgpu_dc_debug_mask;
 extern uint amdgpu_dm_abm_level;
 extern int amdgpu_backlight;
@@ -872,8 +877,6 @@ struct amdgpu_device {
        spinlock_t audio_endpt_idx_lock;
        amdgpu_block_rreg_t             audio_endpt_rreg;
        amdgpu_block_wreg_t             audio_endpt_wreg;
-       void __iomem                    *rio_mem;
-       resource_size_t                 rio_mem_size;
        struct amdgpu_doorbell          doorbell;
 
        /* clock/pll info */
@@ -1087,7 +1090,7 @@ static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)
        return &adev->ddev;
 }
 
-static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
+static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)
 {
        return container_of(bdev, struct amdgpu_device, mman.bdev);
 }
@@ -1109,9 +1112,6 @@ void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
 
-u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg);
-void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
-
 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
                                u32 pcie_index, u32 pcie_data,
                                u32 reg_addr);
@@ -1128,6 +1128,15 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
 bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
 
+int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
+                                 struct amdgpu_job *job,
+                                 bool *need_full_reset_arg);
+
+int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
+                         struct list_head *device_list_handle,
+                         bool *need_full_reset_arg,
+                         bool skip_hw_reset);
+
 int emu_soc_asic_init(struct amdgpu_device *adev);
 
 /*
@@ -1193,8 +1202,6 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
        } while (0)
 
 #define DREG32_SYS(sqf, adev, reg) seq_printf((sqf), #reg " : 0x%08X\n", amdgpu_device_rreg((adev), (reg), false))
-#define RREG32_IO(reg) amdgpu_io_rreg(adev, (reg))
-#define WREG32_IO(reg, v) amdgpu_io_wreg(adev, (reg), (v))
 
 #define REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
 #define REG_FIELD_MASK(reg, field) reg##__##field##_MASK