Merge tag 'iommu-updates-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_kms.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index eb4785e515739333c216147638f62b1f373d9668..91517b166a3b8f504930586a97f173eadc7b47f6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -286,7 +286,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
        struct drm_crtc *crtc;
        uint32_t ui32 = 0;
        uint64_t ui64 = 0;
-       int i, found;
+       int i, j, found;
        int ui32_size = sizeof(ui32);
 
        if (!info->return_size || !info->return_pointer)
@@ -348,7 +348,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                        break;
                case AMDGPU_HW_IP_UVD:
                        type = AMD_IP_BLOCK_TYPE_UVD;
-                       ring_mask = adev->uvd.ring.ready ? 1 : 0;
+                       for (i = 0; i < adev->uvd.num_uvd_inst; i++)
+                               ring_mask |= ((adev->uvd.inst[i].ring.ready ? 1 : 0) << i);
                        ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
                        ib_size_alignment = 16;
                        break;
@@ -361,8 +362,11 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                        break;
                case AMDGPU_HW_IP_UVD_ENC:
                        type = AMD_IP_BLOCK_TYPE_UVD;
-                       for (i = 0; i < adev->uvd.num_enc_rings; i++)
-                               ring_mask |= ((adev->uvd.ring_enc[i].ready ? 1 : 0) << i);
+                       for (i = 0; i < adev->uvd.num_uvd_inst; i++)
+                               for (j = 0; j < adev->uvd.num_enc_rings; j++)
+                                       ring_mask |=
+                                       ((adev->uvd.inst[i].ring_enc[j].ready ? 1 : 0) <<
+                                       (j + i * adev->uvd.num_enc_rings));
                        ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
                        ib_size_alignment = 1;
                        break;