struct omap_irq_wait {
struct list_head node;
wait_queue_head_t wq;
- uint32_t irqmask;
+ u32 irqmask;
int count;
};
{
struct omap_drm_private *priv = dev->dev_private;
struct omap_irq_wait *wait;
- uint32_t irqmask = priv->irq_mask;
+ u32 irqmask = priv->irq_mask;
assert_spin_locked(&priv->wait_lock);
DBG("irqmask=%08x", irqmask);
- priv->dispc_ops->write_irqenable(irqmask);
+ priv->dispc_ops->write_irqenable(priv->dispc, irqmask);
}
static void omap_irq_wait_handler(struct omap_irq_wait *wait)
}
struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
- uint32_t irqmask, int count)
+ u32 irqmask, int count)
{
struct omap_drm_private *priv = dev->dev_private;
struct omap_irq_wait *wait = kzalloc(sizeof(*wait), GFP_KERNEL);
DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags);
- priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(channel);
+ priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(priv->dispc,
+ channel);
omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags);
DBG("dev=%p, crtc=%u", dev, channel);
spin_lock_irqsave(&priv->wait_lock, flags);
- priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(channel);
+ priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(priv->dispc,
+ channel);
omap_irq_update(dev);
spin_unlock_irqrestore(&priv->wait_lock, flags);
}
unsigned int id;
u32 irqstatus;
- irqstatus = priv->dispc_ops->read_irqstatus();
- priv->dispc_ops->clear_irqstatus(irqstatus);
- priv->dispc_ops->read_irqstatus(); /* flush posted write */
+ irqstatus = priv->dispc_ops->read_irqstatus(priv->dispc);
+ priv->dispc_ops->clear_irqstatus(priv->dispc, irqstatus);
+ priv->dispc_ops->read_irqstatus(priv->dispc); /* flush posted write */
VERB("irqs: %08x", irqstatus);
struct drm_crtc *crtc = priv->crtcs[id];
enum omap_channel channel = omap_crtc_channel(crtc);
- if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(channel)) {
+ if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, channel)) {
drm_handle_vblank(dev, id);
omap_crtc_vblank_irq(crtc);
}
- if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(channel))
+ if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, channel))
omap_crtc_error_irq(crtc, irqstatus);
}
int omap_drm_irq_install(struct drm_device *dev)
{
struct omap_drm_private *priv = dev->dev_private;
- unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs();
+ unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
unsigned int max_planes;
unsigned int i;
int ret;
}
for (i = 0; i < num_mgrs; ++i)
- priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(i);
+ priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, i);
- priv->dispc_ops->runtime_get();
- priv->dispc_ops->clear_irqstatus(0xffffffff);
- priv->dispc_ops->runtime_put();
+ priv->dispc_ops->runtime_get(priv->dispc);
+ priv->dispc_ops->clear_irqstatus(priv->dispc, 0xffffffff);
+ priv->dispc_ops->runtime_put(priv->dispc);
- ret = priv->dispc_ops->request_irq(omap_irq_handler, dev);
+ ret = priv->dispc_ops->request_irq(priv->dispc, omap_irq_handler, dev);
if (ret < 0)
return ret;
dev->irq_enabled = false;
- priv->dispc_ops->free_irq(dev);
+ priv->dispc_ops->free_irq(priv->dispc, dev);
}