Merge tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_mca.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
index 28ad463cf5c945b4b27ea0866e33eea7db066e3d..e51e8918e6671aa27bb7ce239a19594a43638f10 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
@@ -25,6 +25,29 @@
 
 #define MCA_MAX_REGS_COUNT     (16)
 
+#define MCA_REG_FIELD(x, h, l)                 (((x) & GENMASK_ULL(h, l)) >> l)
+#define MCA_REG__STATUS__VAL(x)                        MCA_REG_FIELD(x, 63, 63)
+#define MCA_REG__STATUS__OVERFLOW(x)           MCA_REG_FIELD(x, 62, 62)
+#define MCA_REG__STATUS__UC(x)                 MCA_REG_FIELD(x, 61, 61)
+#define MCA_REG__STATUS__EN(x)                 MCA_REG_FIELD(x, 60, 60)
+#define MCA_REG__STATUS__MISCV(x)              MCA_REG_FIELD(x, 59, 59)
+#define MCA_REG__STATUS__ADDRV(x)              MCA_REG_FIELD(x, 58, 58)
+#define MCA_REG__STATUS__PCC(x)                        MCA_REG_FIELD(x, 57, 57)
+#define MCA_REG__STATUS__ERRCOREIDVAL(x)       MCA_REG_FIELD(x, 56, 56)
+#define MCA_REG__STATUS__TCC(x)                        MCA_REG_FIELD(x, 55, 55)
+#define MCA_REG__STATUS__SYNDV(x)              MCA_REG_FIELD(x, 53, 53)
+#define MCA_REG__STATUS__CECC(x)               MCA_REG_FIELD(x, 46, 46)
+#define MCA_REG__STATUS__UECC(x)               MCA_REG_FIELD(x, 45, 45)
+#define MCA_REG__STATUS__DEFERRED(x)           MCA_REG_FIELD(x, 44, 44)
+#define MCA_REG__STATUS__POISON(x)             MCA_REG_FIELD(x, 43, 43)
+#define MCA_REG__STATUS__SCRUB(x)              MCA_REG_FIELD(x, 40, 40)
+#define MCA_REG__STATUS__ERRCOREID(x)          MCA_REG_FIELD(x, 37, 32)
+#define MCA_REG__STATUS__ADDRLSB(x)            MCA_REG_FIELD(x, 29, 24)
+#define MCA_REG__STATUS__ERRORCODEEXT(x)       MCA_REG_FIELD(x, 21, 16)
+#define MCA_REG__STATUS__ERRORCODE(x)          MCA_REG_FIELD(x, 15, 0)
+
+#define MCA_REG__SYND__ERRORINFORMATION(x)     MCA_REG_FIELD(x, 17, 0)
+
 enum amdgpu_mca_ip {
        AMDGPU_MCA_IP_UNKNOW = -1,
        AMDGPU_MCA_IP_PSP = 0,
@@ -33,6 +56,7 @@ enum amdgpu_mca_ip {
        AMDGPU_MCA_IP_SMU,
        AMDGPU_MCA_IP_MP5,
        AMDGPU_MCA_IP_UMC,
+       AMDGPU_MCA_IP_PCS_XGMI,
        AMDGPU_MCA_IP_COUNT,
 };
 
@@ -57,6 +81,15 @@ struct amdgpu_mca {
        const struct amdgpu_mca_smu_funcs *mca_funcs;
 };
 
+enum mca_reg_idx {
+       MCA_REG_IDX_STATUS              = 1,
+       MCA_REG_IDX_ADDR                = 2,
+       MCA_REG_IDX_MISC0               = 3,
+       MCA_REG_IDX_IPID                = 5,
+       MCA_REG_IDX_SYND                = 6,
+       MCA_REG_IDX_COUNT               = 16,
+};
+
 struct mca_bank_info {
        int socket_id;
        int aid;
@@ -72,18 +105,28 @@ struct mca_bank_entry {
        uint64_t regs[MCA_MAX_REGS_COUNT];
 };
 
+struct mca_bank_node {
+       struct mca_bank_entry entry;
+       struct list_head node;
+};
+
+struct mca_bank_set {
+       int nr_entries;
+       struct list_head list;
+};
+
 struct amdgpu_mca_smu_funcs {
        int max_ue_count;
        int max_ce_count;
        int (*mca_set_debug_mode)(struct amdgpu_device *adev, bool enable);
-       int (*mca_get_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
-                                  enum amdgpu_mca_error_type type, uint32_t *count);
+       int (*mca_get_ras_mca_set)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
+                                  struct mca_bank_set *mca_set);
+       int (*mca_parse_mca_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
+                                        struct mca_bank_entry *entry, uint32_t *count);
        int (*mca_get_valid_mca_count)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
                                       uint32_t *count);
        int (*mca_get_mca_entry)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
                                 int idx, struct mca_bank_entry *entry);
-       int (*mca_get_ras_mca_idx_array)(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
-                                        enum amdgpu_mca_error_type type, int *idx_array, int *idx_array_size);
 };
 
 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
@@ -107,11 +150,22 @@ int amdgpu_mca_mpio_ras_sw_init(struct amdgpu_device *adev);
 void amdgpu_mca_smu_init_funcs(struct amdgpu_device *adev, const struct amdgpu_mca_smu_funcs *mca_funcs);
 int amdgpu_mca_smu_set_debug_mode(struct amdgpu_device *adev, bool enable);
 int amdgpu_mca_smu_get_valid_mca_count(struct amdgpu_device *adev, enum amdgpu_mca_error_type type, uint32_t *count);
+int amdgpu_mca_smu_get_mca_set_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
+                                          enum amdgpu_mca_error_type type, uint32_t *total);
 int amdgpu_mca_smu_get_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
                                   enum amdgpu_mca_error_type type, uint32_t *count);
+int amdgpu_mca_smu_parse_mca_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
+                                        enum amdgpu_mca_error_type type, struct mca_bank_entry *entry, uint32_t *count);
+int amdgpu_mca_smu_get_mca_set(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
+                              enum amdgpu_mca_error_type type, struct mca_bank_set *mca_set);
 int amdgpu_mca_smu_get_mca_entry(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
                                 int idx, struct mca_bank_entry *entry);
 
 void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root);
 
+void amdgpu_mca_bank_set_init(struct mca_bank_set *mca_set);
+int amdgpu_mca_bank_set_add_entry(struct mca_bank_set *mca_set, struct mca_bank_entry *entry);
+void amdgpu_mca_bank_set_release(struct mca_bank_set *mca_set);
+int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type, struct ras_err_data *err_data);
+
 #endif