Merge patch series "riscv: Extension parsing fixes"

[linux.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm.c

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d6e71aa808d881f544053aa2b9c54e5d367cda79..f1d67c6f4b98f48189c49731334042f1a3eb6a3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -274,7 +274,7 @@ static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc)
 static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,
                                  u32 *vbl, u32 *position)
 {
 static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,
                                  u32 *vbl, u32 *position)
 {

-       u32 v_blank_start, v_blank_end, h_position, v_position;
+       u32 v_blank_start = 0, v_blank_end = 0, h_position = 0, v_position = 0;

        struct amdgpu_crtc *acrtc = NULL;
        struct dc *dc = adev->dm.dc;
 
        struct amdgpu_crtc *acrtc = NULL;
        struct dc *dc = adev->dm.dc;
 


@@ -848,7 +848,7 @@ static void dm_handle_hpd_work(struct work_struct *work)
  */
 static void dm_dmub_outbox1_low_irq(void *interrupt_params)
 {
  */
 static void dm_dmub_outbox1_low_irq(void *interrupt_params)
 {

-       struct dmub_notification notify;
+       struct dmub_notification notify = {0};

        struct common_irq_params *irq_params = interrupt_params;
        struct amdgpu_device *adev = irq_params->adev;
        struct amdgpu_display_manager *dm = &adev->dm;
        struct common_irq_params *irq_params = interrupt_params;
        struct amdgpu_device *adev = irq_params->adev;
        struct amdgpu_display_manager *dm = &adev->dm;


@@ -1230,6 +1230,15 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
                break;
        }
 
                break;
        }
 

+       switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
+       case IP_VERSION(3, 5, 0):
+       case IP_VERSION(3, 5, 1):
+               hw_params.ips_sequential_ono = adev->external_rev_id > 0x10;
+               break;
+       default:
+               break;
+       }
+

        status = dmub_srv_hw_init(dmub_srv, &hw_params);
        if (status != DMUB_STATUS_OK) {
                DRM_ERROR("Error initializing DMUB HW: %d\n", status);
        status = dmub_srv_hw_init(dmub_srv, &hw_params);
        if (status != DMUB_STATUS_OK) {
                DRM_ERROR("Error initializing DMUB HW: %d\n", status);


@@ -1726,8 +1735,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
        if (amdgpu_dc_debug_mask & DC_DISABLE_IPS)
                init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;
 
        if (amdgpu_dc_debug_mask & DC_DISABLE_IPS)
                init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;

+       else
+               init_data.flags.disable_ips = DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;

 
 

-       init_data.flags.disable_ips_in_vpb = 1;
+       init_data.flags.disable_ips_in_vpb = 0;

 
        /* Enable DWB for tested platforms only */
        if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0))
 
        /* Enable DWB for tested platforms only */
        if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0))


@@ -2629,6 +2640,7 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)
        int i;
        struct dc_stream_state *del_streams[MAX_PIPES];
        int del_streams_count = 0;
        int i;
        struct dc_stream_state *del_streams[MAX_PIPES];
        int del_streams_count = 0;

+       struct dc_commit_streams_params params = {};

 
        memset(del_streams, 0, sizeof(del_streams));
 
 
        memset(del_streams, 0, sizeof(del_streams));
 


@@ -2655,7 +2667,9 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)
                        goto fail;
        }
 
                        goto fail;
        }
 

-       res = dc_commit_streams(dc, context->streams, context->stream_count);
+       params.streams = context->streams;
+       params.stream_count = context->stream_count;
+       res = dc_commit_streams(dc, &params);

 
 fail:
        dc_state_release(context);
 
 fail:
        dc_state_release(context);


@@ -2877,6 +2891,7 @@ static int dm_resume(void *handle)
        struct dc_state *dc_state;
        int i, r, j, ret;
        bool need_hotplug = false;
        struct dc_state *dc_state;
        int i, r, j, ret;
        bool need_hotplug = false;

+       struct dc_commit_streams_params commit_params = {};

 
        if (dm->dc->caps.ips_support) {
                dc_dmub_srv_apply_idle_power_optimizations(dm->dc, false);
 
        if (dm->dc->caps.ips_support) {
                dc_dmub_srv_apply_idle_power_optimizations(dm->dc, false);


@@ -2926,7 +2941,9 @@ static int dm_resume(void *handle)
                        dc_enable_dmub_outbox(adev->dm.dc);
                }
 
                        dc_enable_dmub_outbox(adev->dm.dc);
                }
 

-               WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count));
+               commit_params.streams = dc_state->streams;
+               commit_params.stream_count = dc_state->stream_count;
+               WARN_ON(!dc_commit_streams(dm->dc, &commit_params));

 
                dm_gpureset_commit_state(dm->cached_dc_state, dm);
 
 
                dm_gpureset_commit_state(dm->cached_dc_state, dm);
 


@@ -2943,7 +2960,7 @@ static int dm_resume(void *handle)
        }
        /* Recreate dc_state - DC invalidates it when setting power state to S3. */
        dc_state_release(dm_state->context);
        }
        /* Recreate dc_state - DC invalidates it when setting power state to S3. */
        dc_state_release(dm_state->context);

-       dm_state->context = dc_state_create(dm->dc);
+       dm_state->context = dc_state_create(dm->dc, NULL);

        /* TODO: Remove dc_state->dccg, use dc->dccg directly. */
 
        /* Before powering on DC we need to re-initialize DMUB. */
        /* TODO: Remove dc_state->dccg, use dc->dccg directly. */
 
        /* Before powering on DC we need to re-initialize DMUB. */


@@ -3104,6 +3121,8 @@ static const struct amd_ip_funcs amdgpu_dm_funcs = {
        .soft_reset = dm_soft_reset,
        .set_clockgating_state = dm_set_clockgating_state,
        .set_powergating_state = dm_set_powergating_state,
        .soft_reset = dm_soft_reset,
        .set_clockgating_state = dm_set_clockgating_state,
        .set_powergating_state = dm_set_powergating_state,

+       .dump_ip_state = NULL,
+       .print_ip_state = NULL,

 };
 
 const struct amdgpu_ip_block_version dm_ip_block = {
 };
 
 const struct amdgpu_ip_block_version dm_ip_block = {


@@ -5713,8 +5732,8 @@ static void fill_stream_properties_from_drm_display_mode(
 
        timing_out->aspect_ratio = get_aspect_ratio(mode_in);
 
 
        timing_out->aspect_ratio = get_aspect_ratio(mode_in);
 

-       stream->out_transfer_func->type = TF_TYPE_PREDEFINED;
-       stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
+       stream->out_transfer_func.type = TF_TYPE_PREDEFINED;
+       stream->out_transfer_func.tf = TRANSFER_FUNCTION_SRGB;

        if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {
                if (!adjust_colour_depth_from_display_info(timing_out, info) &&
                    drm_mode_is_420_also(info, mode_in) &&
        if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {
                if (!adjust_colour_depth_from_display_info(timing_out, info) &&
                    drm_mode_is_420_also(info, mode_in) &&


@@ -6332,7 +6351,7 @@ create_stream_for_sink(struct drm_connector *connector,
                stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
                                                      stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED;
 
                stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
                                                      stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED;
 

-               if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22)
+               if (stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22)

                        tf = TRANSFER_FUNC_GAMMA_22;
                mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
                aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
                        tf = TRANSFER_FUNC_GAMMA_22;
                mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
                aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;


@@ -6803,7 +6822,7 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc,
        if (!dc_plane_state)
                goto cleanup;
 
        if (!dc_plane_state)
                goto cleanup;
 

-       dc_state = dc_state_create(dc);
+       dc_state = dc_state_create(dc, NULL);

        if (!dc_state)
                goto cleanup;
 
        if (!dc_state)
                goto cleanup;
 


@@ -7192,7 +7211,7 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
        struct amdgpu_dm_connector *aconnector;
        struct dm_connector_state *dm_conn_state;
        int i, j, ret;
        struct amdgpu_dm_connector *aconnector;
        struct dm_connector_state *dm_conn_state;
        int i, j, ret;

-       int vcpi, pbn_div, pbn, slot_num = 0;
+       int vcpi, pbn_div, pbn = 0, slot_num = 0;

 
        for_each_new_connector_in_state(state, connector, new_con_state, i) {
 
 
        for_each_new_connector_in_state(state, connector, new_con_state, i) {
 


@@ -8405,13 +8424,13 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
 
                bundle->surface_updates[planes_count].surface = dc_plane;
                if (new_pcrtc_state->color_mgmt_changed) {
 
                bundle->surface_updates[planes_count].surface = dc_plane;
                if (new_pcrtc_state->color_mgmt_changed) {

-                       bundle->surface_updates[planes_count].gamma = dc_plane->gamma_correction;
-                       bundle->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;
+                       bundle->surface_updates[planes_count].gamma = &dc_plane->gamma_correction;
+                       bundle->surface_updates[planes_count].in_transfer_func = &dc_plane->in_transfer_func;

                        bundle->surface_updates[planes_count].gamut_remap_matrix = &dc_plane->gamut_remap_matrix;
                        bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult;
                        bundle->surface_updates[planes_count].gamut_remap_matrix = &dc_plane->gamut_remap_matrix;
                        bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult;

-                       bundle->surface_updates[planes_count].func_shaper = dc_plane->in_shaper_func;
-                       bundle->surface_updates[planes_count].lut3d_func = dc_plane->lut3d_func;
-                       bundle->surface_updates[planes_count].blend_tf = dc_plane->blend_tf;
+                       bundle->surface_updates[planes_count].func_shaper = &dc_plane->in_shaper_func;
+                       bundle->surface_updates[planes_count].lut3d_func = &dc_plane->lut3d_func;
+                       bundle->surface_updates[planes_count].blend_tf = &dc_plane->blend_tf;

                }
 
                amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,
                }
 
                amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,


@@ -8624,7 +8643,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        bundle->stream_update.output_csc_transform =
                                &acrtc_state->stream->csc_color_matrix;
                        bundle->stream_update.out_transfer_func =
                        bundle->stream_update.output_csc_transform =
                                &acrtc_state->stream->csc_color_matrix;
                        bundle->stream_update.out_transfer_func =

-                               acrtc_state->stream->out_transfer_func;
+                               &acrtc_state->stream->out_transfer_func;

                        bundle->stream_update.lut3d_func =
                                (struct dc_3dlut *) acrtc_state->stream->lut3d_func;
                        bundle->stream_update.func_shaper =
                        bundle->stream_update.lut3d_func =
                                (struct dc_3dlut *) acrtc_state->stream->lut3d_func;
                        bundle->stream_update.func_shaper =


@@ -8858,6 +8877,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,
        struct drm_connector *connector;
        bool mode_set_reset_required = false;
        u32 i;
        struct drm_connector *connector;
        bool mode_set_reset_required = false;
        u32 i;

+       struct dc_commit_streams_params params = {dc_state->streams, dc_state->stream_count};

 
        /* Disable writeback */
        for_each_old_connector_in_state(state, connector, old_con_state, i) {
 
        /* Disable writeback */
        for_each_old_connector_in_state(state, connector, old_con_state, i) {


@@ -8994,7 +9014,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,
 
        dm_enable_per_frame_crtc_master_sync(dc_state);
        mutex_lock(&dm->dc_lock);
 
        dm_enable_per_frame_crtc_master_sync(dc_state);
        mutex_lock(&dm->dc_lock);

-       WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count));
+       WARN_ON(!dc_commit_streams(dm->dc, &params));

 
        /* Allow idle optimization when vblank count is 0 for display off */
        if (dm->active_vblank_irq_count == 0)
 
        /* Allow idle optimization when vblank count is 0 for display off */
        if (dm->active_vblank_irq_count == 0)


@@ -10598,7 +10618,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
        struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;
        struct drm_dp_mst_topology_mgr *mgr;
        struct drm_dp_mst_topology_state *mst_state;
        struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;
        struct drm_dp_mst_topology_mgr *mgr;
        struct drm_dp_mst_topology_state *mst_state;

-       struct dsc_mst_fairness_vars vars[MAX_PIPES];
+       struct dsc_mst_fairness_vars vars[MAX_PIPES] = {0};

 
        trace_amdgpu_dm_atomic_check_begin(state);
 
 
        trace_amdgpu_dm_atomic_check_begin(state);