Merge tag 'drm-xe-next-2023-12-21-pr1-1' of https://gitlab.freedesktop.org/drm/xe...

[linux.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm.c

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8e6fe9860cd6f6aa44e0c63d0fc971a7248fb052..54861136dafd911461f8de9f0e5cbc36282dfab2 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1712,7 +1712,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
        init_data.clk_reg_offsets = adev->reg_offset[CLK_HWIP][0];
 
        /* Enable DWB for tested platforms only */
-       if (adev->ip_versions[DCE_HWIP][0] >= IP_VERSION(3, 0, 0))
+       if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0))
                init_data.num_virtual_links = 1;
 
        INIT_LIST_HEAD(&adev->dm.da_list);
@@ -2687,6 +2687,7 @@ static int dm_suspend(void *handle)
        hpd_rx_irq_work_suspend(dm);
 
        dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
+       dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);
 
        return 0;
 }
@@ -2882,6 +2883,7 @@ static int dm_resume(void *handle)
                if (r)
                        DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);
 
+               dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D0);
                dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
 
                dc_resume(dm->dc);
@@ -2932,6 +2934,7 @@ static int dm_resume(void *handle)
        }
 
        /* power on hardware */
+       dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D0);
        dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
 
        /* program HPD filter */
@@ -4067,6 +4070,11 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev)
                return r;
        }
 
+#ifdef AMD_PRIVATE_COLOR
+       if (amdgpu_dm_create_color_properties(adev))
+               return -ENOMEM;
+#endif
+
        r = amdgpu_dm_audio_init(adev);
        if (r) {
                dc_release_state(state->context);
@@ -5164,7 +5172,9 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
         * Always set input transfer function, since plane state is refreshed
         * every time.
         */
-       ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);
+       ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state,
+                                               plane_state,
+                                               dc_plane_state);
        if (ret)
                return ret;
 
@@ -8261,6 +8271,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        bundle->surface_updates[planes_count].gamma = dc_plane->gamma_correction;
                        bundle->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;
                        bundle->surface_updates[planes_count].gamut_remap_matrix = &dc_plane->gamut_remap_matrix;
+                       bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult;
+                       bundle->surface_updates[planes_count].func_shaper = dc_plane->in_shaper_func;
+                       bundle->surface_updates[planes_count].lut3d_func = dc_plane->lut3d_func;
+                       bundle->surface_updates[planes_count].blend_tf = dc_plane->blend_tf;
                }
 
                amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,
@@ -8472,6 +8486,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                                &acrtc_state->stream->csc_color_matrix;
                        bundle->stream_update.out_transfer_func =
                                acrtc_state->stream->out_transfer_func;
+                       bundle->stream_update.lut3d_func =
+                               (struct dc_3dlut *) acrtc_state->stream->lut3d_func;
+                       bundle->stream_update.func_shaper =
+                               (struct dc_transfer_func *) acrtc_state->stream->func_shaper;
                }
 
                acrtc_state->stream->abm_level = acrtc_state->abm_level;
@@ -8874,12 +8892,14 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
        acrtc = to_amdgpu_crtc(wb_conn->encoder.crtc);
        if (!acrtc) {
                DRM_ERROR("no amdgpu_crtc found\n");
+               kfree(wb_info);
                return;
        }
 
        afb = to_amdgpu_framebuffer(new_con_state->writeback_job->fb);
        if (!afb) {
                DRM_ERROR("No amdgpu_framebuffer found\n");
+               kfree(wb_info);
                return;
        }
 
@@ -8934,7 +8954,7 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
        }
 
        wb_info->mcif_buf_params.p_vmid = 1;
-       if (adev->ip_versions[DCE_HWIP][0] >= IP_VERSION(3, 0, 0)) {
+       if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0)) {
                wb_info->mcif_warmup_params.start_address.quad_part = afb->address;
                wb_info->mcif_warmup_params.region_size =
                        wb_info->mcif_buf_params.luma_pitch * wb_info->dwb_params.dest_height;
@@ -9853,6 +9873,7 @@ skip_modeset:
         * when a modeset is needed, to ensure it gets reprogrammed.
         */
        if (dm_new_crtc_state->base.color_mgmt_changed ||
+           dm_old_crtc_state->regamma_tf != dm_new_crtc_state->regamma_tf ||
            drm_atomic_crtc_needs_modeset(new_crtc_state)) {
                ret = amdgpu_dm_update_crtc_color_mgmt(dm_new_crtc_state);
                if (ret)
@@ -9886,7 +9907,8 @@ static bool should_reset_plane(struct drm_atomic_state *state,
         * TODO: Remove this hack for all asics once it proves that the
         * fast updates works fine on DCN3.2+.
         */
-       if (adev->ip_versions[DCE_HWIP][0] < IP_VERSION(3, 2, 0) && state->allow_modeset)
+       if (amdgpu_ip_version(adev, DCE_HWIP, 0) < IP_VERSION(3, 2, 0) &&
+           state->allow_modeset)
                return true;
 
        /* Exit early if we know that we're adding or removing the plane. */
@@ -9920,6 +9942,10 @@ static bool should_reset_plane(struct drm_atomic_state *state,
         */
        for_each_oldnew_plane_in_state(state, other, old_other_state, new_other_state, i) {
                struct amdgpu_framebuffer *old_afb, *new_afb;
+               struct dm_plane_state *dm_new_other_state, *dm_old_other_state;
+
+               dm_new_other_state = to_dm_plane_state(new_other_state);
+               dm_old_other_state = to_dm_plane_state(old_other_state);
 
                if (other->type == DRM_PLANE_TYPE_CURSOR)
                        continue;
@@ -9956,6 +9982,18 @@ static bool should_reset_plane(struct drm_atomic_state *state,
                    old_other_state->color_encoding != new_other_state->color_encoding)
                        return true;
 
+               /* HDR/Transfer Function changes. */
+               if (dm_old_other_state->degamma_tf != dm_new_other_state->degamma_tf ||
+                   dm_old_other_state->degamma_lut != dm_new_other_state->degamma_lut ||
+                   dm_old_other_state->hdr_mult != dm_new_other_state->hdr_mult ||
+                   dm_old_other_state->ctm != dm_new_other_state->ctm ||
+                   dm_old_other_state->shaper_lut != dm_new_other_state->shaper_lut ||
+                   dm_old_other_state->shaper_tf != dm_new_other_state->shaper_tf ||
+                   dm_old_other_state->lut3d != dm_new_other_state->lut3d ||
+                   dm_old_other_state->blend_lut != dm_new_other_state->blend_lut ||
+                   dm_old_other_state->blend_tf != dm_new_other_state->blend_tf)
+                       return true;
+
                /* Framebuffer checks fall at the end. */
                if (!old_other_state->fb || !new_other_state->fb)
                        continue;