Merge tag 'amd-drm-next-6.11-2024-06-07' of https://gitlab.freedesktop.org/agd5f...

[linux.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm_helpers.c

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 2c36f3d00ca256f99186fe778eaf46a4e30739ee..2648d2b5be3ebd25079f7b782dec151d1b7fe780 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -69,6 +69,7 @@ static void apply_edid_quirks(struct edid *edid, struct dc_edid_caps *edid_caps)
        case drm_edid_encode_panel_id('A', 'U', 'O', 0xE69B):
        case drm_edid_encode_panel_id('B', 'O', 'E', 0x092A):
        case drm_edid_encode_panel_id('L', 'G', 'D', 0x06D1):
+       case drm_edid_encode_panel_id('M', 'S', 'F', 0x1003):
                DRM_DEBUG_DRIVER("Clearing DPCD 0x317 on monitor with panel id %X\n", panel_id);
                edid_caps->panel_patch.remove_sink_ext_caps = true;
                break;
@@ -1044,30 +1045,8 @@ void *dm_helpers_allocate_gpu_mem(
                long long *addr)
 {
        struct amdgpu_device *adev = ctx->driver_context;
-       struct dal_allocation *da;
-       u32 domain = (type == DC_MEM_ALLOC_TYPE_GART) ?
-               AMDGPU_GEM_DOMAIN_GTT : AMDGPU_GEM_DOMAIN_VRAM;
-       int ret;
-
-       da = kzalloc(sizeof(struct dal_allocation), GFP_KERNEL);
-       if (!da)
-               return NULL;
 
-       ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
-                                     domain, &da->bo,
-                                     &da->gpu_addr, &da->cpu_ptr);
-
-       *addr = da->gpu_addr;
-
-       if (ret) {
-               kfree(da);
-               return NULL;
-       }
-
-       /* add da to list in dm */
-       list_add(&da->list, &adev->dm.da_list);
-
-       return da->cpu_ptr;
+       return dm_allocate_gpu_mem(adev, type, size, addr);
 }
 
 void dm_helpers_free_gpu_mem(
@@ -1261,7 +1240,10 @@ void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz)
 
 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable)
 {
-       /* TODO: add periodic detection implementation */
+       struct amdgpu_device *adev = ctx->driver_context;
+
+       if (adev->dm.idle_workqueue)
+               adev->dm.idle_workqueue->enable = enable;
 }
 
 void dm_helpers_dp_mst_update_branch_bandwidth(