Merge tag 'backlight-next-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_gfx.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 72dbcd2bc6a630e5ff69d6a335e99fad1f95e5bf..d43fe2ed81168c57f77f7bc9560cd0f7d25b7438 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -30,6 +30,7 @@
 #include "clearstate_defs.h"
 #include "amdgpu_ring.h"
 #include "amdgpu_rlc.h"
+#include "soc15.h"
 
 /* GFX current status */
 #define AMDGPU_GFX_NORMAL_MODE                 0x00000000L
@@ -204,6 +205,19 @@ struct amdgpu_cu_info {
        uint32_t bitmap[4][4];
 };
 
+struct amdgpu_gfx_ras_funcs {
+       int (*ras_late_init)(struct amdgpu_device *adev);
+       void (*ras_fini)(struct amdgpu_device *adev);
+       int (*ras_error_inject)(struct amdgpu_device *adev,
+                               void *inject_if);
+       int (*query_ras_error_count)(struct amdgpu_device *adev,
+                                    void *ras_error_status);
+       void (*reset_ras_error_count)(struct amdgpu_device *adev);
+       void (*query_ras_error_status)(struct amdgpu_device *adev);
+       void (*reset_ras_error_status)(struct amdgpu_device *adev);
+       void (*enable_watchdog_timer)(struct amdgpu_device *adev);
+};
+
 struct amdgpu_gfx_funcs {
        /* get the gpu clock counter */
        uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);
@@ -219,11 +233,7 @@ struct amdgpu_gfx_funcs {
                                uint32_t *dst);
        void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
                                 u32 queue, u32 vmid);
-       int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
-       int (*query_ras_error_count) (struct amdgpu_device *adev, void *ras_error_status);
-       void (*reset_ras_error_count) (struct amdgpu_device *adev);
        void (*init_spm_golden)(struct amdgpu_device *adev);
-       void (*query_ras_error_status) (struct amdgpu_device *adev);
        void (*update_perfmon_mgcg)(struct amdgpu_device *adev, bool enable);
 };
 
@@ -327,7 +337,8 @@ struct amdgpu_gfx {
        DECLARE_BITMAP                  (pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
 
        /*ras */
-       struct ras_common_if            *ras_if;
+       struct ras_common_if                    *ras_if;
+       const struct amdgpu_gfx_ras_funcs       *ras_funcs;
 };
 
 #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))