Merge tag 'iio-for-5.11a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23...

[linux.git] / drivers / iio / adc / stm32-adc-core.c

diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
index d64a9e8ff5077f8a15386e637fb8cf6bb647363c..9d1ad6e38e850f89dee69d1a68c3ee6d7f9cb296 100644 (file)
--- a/drivers/iio/adc/stm32-adc-core.c
+++ b/drivers/iio/adc/stm32-adc-core.c
@@ -41,18 +41,16 @@
  * struct stm32_adc_common_regs - stm32 common registers
  * @csr:       common status register offset
  * @ccr:       common control register offset
- * @eoc1_msk:  adc1 end of conversion flag in @csr
- * @eoc2_msk:  adc2 end of conversion flag in @csr
- * @eoc3_msk:  adc3 end of conversion flag in @csr
+ * @eoc_msk:    array of eoc (end of conversion flag) masks in csr for adc1..n
+ * @ovr_msk:    array of ovr (overrun flag) masks in csr for adc1..n
  * @ier:       interrupt enable register offset for each adc
  * @eocie_msk: end of conversion interrupt enable mask in @ier
  */
 struct stm32_adc_common_regs {
        u32 csr;
        u32 ccr;
-       u32 eoc1_msk;
-       u32 eoc2_msk;
-       u32 eoc3_msk;
+       u32 eoc_msk[STM32_ADC_MAX_ADCS];
+       u32 ovr_msk[STM32_ADC_MAX_ADCS];
        u32 ier;
        u32 eocie_msk;
 };
@@ -301,21 +299,20 @@ out:
 static const struct stm32_adc_common_regs stm32f4_adc_common_regs = {
        .csr = STM32F4_ADC_CSR,
        .ccr = STM32F4_ADC_CCR,
-       .eoc1_msk = STM32F4_EOC1 | STM32F4_OVR1,
-       .eoc2_msk = STM32F4_EOC2 | STM32F4_OVR2,
-       .eoc3_msk = STM32F4_EOC3 | STM32F4_OVR3,
+       .eoc_msk = { STM32F4_EOC1, STM32F4_EOC2, STM32F4_EOC3},
+       .ovr_msk = { STM32F4_OVR1, STM32F4_OVR2, STM32F4_OVR3},
        .ier = STM32F4_ADC_CR1,
-       .eocie_msk = STM32F4_EOCIE | STM32F4_OVRIE,
+       .eocie_msk = STM32F4_EOCIE,
 };
 
 /* STM32H7 common registers definitions */
 static const struct stm32_adc_common_regs stm32h7_adc_common_regs = {
        .csr = STM32H7_ADC_CSR,
        .ccr = STM32H7_ADC_CCR,
-       .eoc1_msk = STM32H7_EOC_MST | STM32H7_OVR_MST,
-       .eoc2_msk = STM32H7_EOC_SLV | STM32H7_OVR_SLV,
+       .eoc_msk = { STM32H7_EOC_MST, STM32H7_EOC_SLV},
+       .ovr_msk = { STM32H7_OVR_MST, STM32H7_OVR_SLV},
        .ier = STM32H7_ADC_IER,
-       .eocie_msk = STM32H7_EOCIE | STM32H7_OVRIE,
+       .eocie_msk = STM32H7_EOCIE,
 };
 
 static const unsigned int stm32_adc_offset[STM32_ADC_MAX_ADCS] = {
@@ -337,6 +334,7 @@ static void stm32_adc_irq_handler(struct irq_desc *desc)
 {
        struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);
        struct irq_chip *chip = irq_desc_get_chip(desc);
+       int i;
        u32 status;
 
        chained_irq_enter(chip, desc);
@@ -354,17 +352,12 @@ static void stm32_adc_irq_handler(struct irq_desc *desc)
         * before invoking the interrupt handler (e.g. call ISR only for
         * IRQ-enabled ADCs).
         */
-       if (status & priv->cfg->regs->eoc1_msk &&
-           stm32_adc_eoc_enabled(priv, 0))
-               generic_handle_irq(irq_find_mapping(priv->domain, 0));
-
-       if (status & priv->cfg->regs->eoc2_msk &&
-           stm32_adc_eoc_enabled(priv, 1))
-               generic_handle_irq(irq_find_mapping(priv->domain, 1));
-
-       if (status & priv->cfg->regs->eoc3_msk &&
-           stm32_adc_eoc_enabled(priv, 2))
-               generic_handle_irq(irq_find_mapping(priv->domain, 2));
+       for (i = 0; i < priv->cfg->num_irqs; i++) {
+               if ((status & priv->cfg->regs->eoc_msk[i] &&
+                    stm32_adc_eoc_enabled(priv, i)) ||
+                    (status & priv->cfg->regs->ovr_msk[i]))
+                       generic_handle_irq(irq_find_mapping(priv->domain, i));
+       }
 
        chained_irq_exit(chip, desc);
 };