Merge tag 'drm-msm-next-2021-06-23b' of https://gitlab.freedesktop.org/drm/msm into...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 2d1fefbe1e99ff65216fd0eca658dbb431cea756..38c834d0f9309d3c1a0347a5a24601abc7ddcb2f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -30,6 +30,8 @@
 
 #include <drm/amdgpu_drm.h>
 #include "amdgpu.h"
+#include "amdgpu_res_cursor.h"
+
 #ifdef CONFIG_MMU_NOTIFIER
 #include <linux/mmu_notifier.h>
 #endif
@@ -37,7 +39,12 @@
 #define AMDGPU_BO_INVALID_OFFSET       LONG_MAX
 #define AMDGPU_BO_MAX_PLACEMENTS       3
 
+/* BO flag to indicate a KFD userptr BO */
+#define AMDGPU_AMDKFD_CREATE_USERPTR_BO        (1ULL << 63)
+#define AMDGPU_AMDKFD_CREATE_SVM_BO    (1ULL << 62)
+
 #define to_amdgpu_bo_user(abo) container_of((abo), struct amdgpu_bo_user, bo)
+#define to_amdgpu_bo_vm(abo) container_of((abo), struct amdgpu_bo_vm, bo)
 
 struct amdgpu_bo_param {
        unsigned long                   size;
@@ -48,7 +55,8 @@ struct amdgpu_bo_param {
        u64                             flags;
        enum ttm_bo_type                type;
        bool                            no_wait_gpu;
-       struct dma_resv *resv;
+       struct dma_resv                 *resv;
+       void                            (*destroy)(struct ttm_buffer_object *bo);
 };
 
 /* bo virtual addresses in a vm */
@@ -97,16 +105,10 @@ struct amdgpu_bo {
        struct amdgpu_vm_bo_base        *vm_bo;
        /* Constant after initialization */
        struct amdgpu_bo                *parent;
-       struct amdgpu_bo                *shadow;
-
-
 
 #ifdef CONFIG_MMU_NOTIFIER
        struct mmu_interval_notifier    notifier;
 #endif
-
-       struct list_head                shadow_list;
-
        struct kgd_mem                  *kfd_bo;
 };
 
@@ -119,6 +121,13 @@ struct amdgpu_bo_user {
 
 };
 
+struct amdgpu_bo_vm {
+       struct amdgpu_bo                bo;
+       struct amdgpu_bo                *shadow;
+       struct list_head                shadow_list;
+       struct amdgpu_vm_bo_base        entries[];
+};
+
 static inline struct amdgpu_bo *ttm_to_amdgpu_bo(struct ttm_buffer_object *tbo)
 {
        return container_of(tbo, struct amdgpu_bo, tbo);
@@ -191,7 +200,7 @@ static inline unsigned amdgpu_bo_ngpu_pages(struct amdgpu_bo *bo)
 
 static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)
 {
-       return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
+       return (bo->tbo.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
 }
 
 /**
@@ -211,18 +220,19 @@ static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
 static inline bool amdgpu_bo_in_cpu_visible_vram(struct amdgpu_bo *bo)
 {
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
-       unsigned fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
-       struct drm_mm_node *node = bo->tbo.mem.mm_node;
-       unsigned long pages_left;
+       struct amdgpu_res_cursor cursor;
 
-       if (bo->tbo.mem.mem_type != TTM_PL_VRAM)
+       if (bo->tbo.resource->mem_type != TTM_PL_VRAM)
                return false;
 
-       for (pages_left = bo->tbo.mem.num_pages; pages_left;
-            pages_left -= node->size, node++)
-               if (node->start < fpfn)
+       amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor);
+       while (cursor.remaining) {
+               if (cursor.start < adev->gmc.visible_vram_size)
                        return true;
 
+               amdgpu_res_next(&cursor, cursor.size);
+       }
+
        return false;
 }
 
@@ -245,6 +255,22 @@ static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
        return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
 }
 
+/**
+ * amdgpu_bo_shadowed - check if the BO is shadowed
+ *
+ * @bo: BO to be tested.
+ *
+ * Returns:
+ * NULL if not shadowed or else return a BO pointer.
+ */
+static inline struct amdgpu_bo *amdgpu_bo_shadowed(struct amdgpu_bo *bo)
+{
+       if (bo->tbo.type == ttm_bo_type_kernel)
+               return to_amdgpu_bo_vm(bo)->shadow;
+
+       return NULL;
+}
+
 bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
 void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
 
@@ -265,6 +291,9 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
 int amdgpu_bo_create_user(struct amdgpu_device *adev,
                          struct amdgpu_bo_param *bp,
                          struct amdgpu_bo_user **ubo_ptr);
+int amdgpu_bo_create_vm(struct amdgpu_device *adev,
+                       struct amdgpu_bo_param *bp,
+                       struct amdgpu_bo_vm **ubo_ptr);
 void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
                           void **cpu_addr);
 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
@@ -300,6 +329,9 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
 u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
 int amdgpu_bo_validate(struct amdgpu_bo *bo);
+void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
+                               uint64_t *gtt_mem, uint64_t *cpu_mem);
+void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo);
 int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
                             struct dma_fence **fence);
 uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,