Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_object.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index fd271f9746a29ee6799f623557ffaf0354e31b45..ec9e45004bff3391d902ca13f1b2a732803d13e7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -426,12 +426,20 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
        size_t acc_size;
        int r;
 
-       page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
-       if (bp->domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
-                         AMDGPU_GEM_DOMAIN_OA))
+       /* Note that GDS/GWS/OA allocates 1 page per byte/resource. */
+       if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
+               /* GWS and OA don't need any alignment. */
+               page_align = bp->byte_align;
                size <<= PAGE_SHIFT;
-       else
+       } else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
+               /* Both size and alignment must be a multiple of 4. */
+               page_align = ALIGN(bp->byte_align, 4);
+               size = ALIGN(size, 4) << PAGE_SHIFT;
+       } else {
+               /* Memory should be aligned at least to a page size. */
+               page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
                size = ALIGN(size, PAGE_SIZE);
+       }
 
        if (!amdgpu_bo_validate_size(adev, size, bp->domain))
                return -ENOMEM;
@@ -912,7 +920,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
        struct ttm_operation_ctx ctx = { false, false };
        int r, i;
 
-       if (!bo->pin_count) {
+       if (WARN_ON_ONCE(!bo->pin_count)) {
                dev_warn(adev->dev, "%p unpin not necessary\n", bo);
                return 0;
        }
@@ -1276,6 +1284,30 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
                reservation_object_add_excl_fence(resv, fence);
 }
 
+/**
+ * amdgpu_sync_wait_resv - Wait for BO reservation fences
+ *
+ * @bo: buffer object
+ * @owner: fence owner
+ * @intr: Whether the wait is interruptible
+ *
+ * Returns:
+ * 0 on success, errno otherwise.
+ */
+int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
+{
+       struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+       struct amdgpu_sync sync;
+       int r;
+
+       amdgpu_sync_create(&sync);
+       amdgpu_sync_resv(adev, &sync, bo->tbo.resv, owner, false);
+       r = amdgpu_sync_wait(&sync, intr);
+       amdgpu_sync_free(&sync);
+
+       return r;
+}
+
 /**
  * amdgpu_bo_gpu_offset - return GPU offset of bo
  * @bo:        amdgpu object for which we query the offset