Merge tag 'mailbox-v5.2' of git://git.linaro.org/landing-teams/working/fujitsu/integr...

[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_pm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index c3508a7c8bfd07db3d9413c0efe16dc595e9935d..95144e49c7f9df9e914b3e37421d4f60913070fd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -144,7 +144,7 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev,
        struct amdgpu_device *adev = ddev->dev_private;
        enum amd_pm_state_type pm;
 
-       if (adev->smu.ppt_funcs->get_current_power_state)
+       if (is_support_sw_smu(adev) && adev->smu.ppt_funcs->get_current_power_state)
                pm = amdgpu_smu_get_current_power_state(adev);
        else if (adev->powerplay.pp_funcs->get_current_power_state)
                pm = amdgpu_dpm_get_current_power_state(adev);
@@ -327,6 +327,18 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
                goto fail;
        }
 
+        if (amdgpu_sriov_vf(adev)) {
+                if (amdgim_is_hwperf(adev) &&
+                    adev->virt.ops->force_dpm_level) {
+                        mutex_lock(&adev->pm.mutex);
+                        adev->virt.ops->force_dpm_level(adev, level);
+                        mutex_unlock(&adev->pm.mutex);
+                        return count;
+                } else {
+                        return -EINVAL;
+               }
+        }
+
        if (current_level == level)
                return count;
 
@@ -790,6 +802,10 @@ static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
+       if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) &&
+           adev->virt.ops->get_pp_clk)
+               return adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf);
+
        if (is_support_sw_smu(adev))
                return smu_print_clk_levels(&adev->smu, PP_SCLK, buf);
        else if (adev->powerplay.pp_funcs->print_clock_levels)
@@ -906,7 +922,9 @@ static ssize_t amdgpu_get_pp_dpm_socclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
-       if (adev->powerplay.pp_funcs->print_clock_levels)
+       if (is_support_sw_smu(adev))
+               return smu_print_clk_levels(&adev->smu, PP_SOCCLK, buf);
+       else if (adev->powerplay.pp_funcs->print_clock_levels)
                return amdgpu_dpm_print_clock_levels(adev, PP_SOCCLK, buf);
        else
                return snprintf(buf, PAGE_SIZE, "\n");
@@ -926,7 +944,9 @@ static ssize_t amdgpu_set_pp_dpm_socclk(struct device *dev,
        if (ret)
                return ret;
 
-       if (adev->powerplay.pp_funcs->force_clock_level)
+       if (is_support_sw_smu(adev))
+               ret = smu_force_clk_levels(&adev->smu, PP_SOCCLK, mask);
+       else if (adev->powerplay.pp_funcs->force_clock_level)
                ret = amdgpu_dpm_force_clock_level(adev, PP_SOCCLK, mask);
 
        if (ret)
@@ -942,7 +962,9 @@ static ssize_t amdgpu_get_pp_dpm_fclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
-       if (adev->powerplay.pp_funcs->print_clock_levels)
+       if (is_support_sw_smu(adev))
+               return smu_print_clk_levels(&adev->smu, PP_FCLK, buf);
+       else if (adev->powerplay.pp_funcs->print_clock_levels)
                return amdgpu_dpm_print_clock_levels(adev, PP_FCLK, buf);
        else
                return snprintf(buf, PAGE_SIZE, "\n");
@@ -962,7 +984,9 @@ static ssize_t amdgpu_set_pp_dpm_fclk(struct device *dev,
        if (ret)
                return ret;
 
-       if (adev->powerplay.pp_funcs->force_clock_level)
+       if (is_support_sw_smu(adev))
+               ret = smu_force_clk_levels(&adev->smu, PP_FCLK, mask);
+       else if (adev->powerplay.pp_funcs->force_clock_level)
                ret = amdgpu_dpm_force_clock_level(adev, PP_FCLK, mask);
 
        if (ret)
@@ -978,7 +1002,9 @@ static ssize_t amdgpu_get_pp_dpm_dcefclk(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
-       if (adev->powerplay.pp_funcs->print_clock_levels)
+       if (is_support_sw_smu(adev))
+               return smu_print_clk_levels(&adev->smu, PP_DCEFCLK, buf);
+       else if (adev->powerplay.pp_funcs->print_clock_levels)
                return amdgpu_dpm_print_clock_levels(adev, PP_DCEFCLK, buf);
        else
                return snprintf(buf, PAGE_SIZE, "\n");
@@ -998,7 +1024,9 @@ static ssize_t amdgpu_set_pp_dpm_dcefclk(struct device *dev,
        if (ret)
                return ret;
 
-       if (adev->powerplay.pp_funcs->force_clock_level)
+       if (is_support_sw_smu(adev))
+               ret = smu_force_clk_levels(&adev->smu, PP_DCEFCLK, mask);
+       else if (adev->powerplay.pp_funcs->force_clock_level)
                ret = amdgpu_dpm_force_clock_level(adev, PP_DCEFCLK, mask);
 
        if (ret)
@@ -1382,11 +1410,14 @@ static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev,
 {
        struct amdgpu_device *adev = dev_get_drvdata(dev);
        u32 pwm_mode = 0;
+       if (is_support_sw_smu(adev)) {
+               pwm_mode = smu_get_fan_control_mode(&adev->smu);
+       } else {
+               if (!adev->powerplay.pp_funcs->get_fan_control_mode)
+                       return -EINVAL;
 
-       if (!adev->powerplay.pp_funcs->get_fan_control_mode)
-               return -EINVAL;
-
-       pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+               pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+       }
 
        return sprintf(buf, "%i\n", pwm_mode);
 }
@@ -1405,14 +1436,22 @@ static ssize_t amdgpu_hwmon_set_pwm1_enable(struct device *dev,
             (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON))
                return -EINVAL;
 
-       if (!adev->powerplay.pp_funcs->set_fan_control_mode)
-               return -EINVAL;
+       if (is_support_sw_smu(adev)) {
+               err = kstrtoint(buf, 10, &value);
+               if (err)
+                       return err;
 
-       err = kstrtoint(buf, 10, &value);
-       if (err)
-               return err;
+               smu_set_fan_control_mode(&adev->smu, value);
+       } else {
+               if (!adev->powerplay.pp_funcs->set_fan_control_mode)
+                       return -EINVAL;
 
-       amdgpu_dpm_set_fan_control_mode(adev, value);
+               err = kstrtoint(buf, 10, &value);
+               if (err)
+                       return err;
+
+               amdgpu_dpm_set_fan_control_mode(adev, value);
+       }
 
        return count;
 }
@@ -1444,8 +1483,10 @@ static ssize_t amdgpu_hwmon_set_pwm1(struct device *dev,
        if  ((adev->flags & AMD_IS_PX) &&
             (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON))
                return -EINVAL;
-
-       pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+       if (is_support_sw_smu(adev))
+               pwm_mode = smu_get_fan_control_mode(&adev->smu);
+       else
+               pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
        if (pwm_mode != AMD_FAN_CTRL_MANUAL) {
                pr_info("manual fan speed control should be enabled first\n");
                return -EINVAL;
@@ -1457,7 +1498,11 @@ static ssize_t amdgpu_hwmon_set_pwm1(struct device *dev,
 
        value = (value * 100) / 255;
 
-       if (adev->powerplay.pp_funcs->set_fan_speed_percent) {
+       if (is_support_sw_smu(adev)) {
+               err = smu_set_fan_speed_percent(&adev->smu, value);
+               if (err)
+                       return err;
+       } else if (adev->powerplay.pp_funcs->set_fan_speed_percent) {
                err = amdgpu_dpm_set_fan_speed_percent(adev, value);
                if (err)
                        return err;
@@ -1479,7 +1524,11 @@ static ssize_t amdgpu_hwmon_get_pwm1(struct device *dev,
             (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON))
                return -EINVAL;
 
-       if (adev->powerplay.pp_funcs->get_fan_speed_percent) {
+       if (is_support_sw_smu(adev)) {
+               err = smu_get_fan_speed_percent(&adev->smu, &speed);
+               if (err)
+                       return err;
+       } else if (adev->powerplay.pp_funcs->get_fan_speed_percent) {
                err = amdgpu_dpm_get_fan_speed_percent(adev, &speed);
                if (err)
                        return err;
@@ -1585,7 +1634,11 @@ static ssize_t amdgpu_hwmon_set_fan1_target(struct device *dev,
        u32 value;
        u32 pwm_mode;
 
-       pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+       if (is_support_sw_smu(adev))
+               pwm_mode = smu_get_fan_control_mode(&adev->smu);
+       else
+               pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+
        if (pwm_mode != AMD_FAN_CTRL_MANUAL)
                return -ENODATA;
 
@@ -1598,7 +1651,11 @@ static ssize_t amdgpu_hwmon_set_fan1_target(struct device *dev,
        if (err)
                return err;
 
-       if (adev->powerplay.pp_funcs->set_fan_speed_rpm) {
+       if (is_support_sw_smu(adev)) {
+               err = smu_set_fan_speed_rpm(&adev->smu, value);
+               if (err)
+                       return err;
+       } else if (adev->powerplay.pp_funcs->set_fan_speed_rpm) {
                err = amdgpu_dpm_set_fan_speed_rpm(adev, value);
                if (err)
                        return err;
@@ -1614,11 +1671,14 @@ static ssize_t amdgpu_hwmon_get_fan1_enable(struct device *dev,
        struct amdgpu_device *adev = dev_get_drvdata(dev);
        u32 pwm_mode = 0;
 
-       if (!adev->powerplay.pp_funcs->get_fan_control_mode)
-               return -EINVAL;
-
-       pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+       if (is_support_sw_smu(adev)) {
+               pwm_mode = smu_get_fan_control_mode(&adev->smu);
+       } else {
+               if (!adev->powerplay.pp_funcs->get_fan_control_mode)
+                       return -EINVAL;
 
+               pwm_mode = amdgpu_dpm_get_fan_control_mode(adev);
+       }
        return sprintf(buf, "%i\n", pwm_mode == AMD_FAN_CTRL_AUTO ? 0 : 1);
 }
 
@@ -1637,8 +1697,6 @@ static ssize_t amdgpu_hwmon_set_fan1_enable(struct device *dev,
             (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON))
                return -EINVAL;
 
-       if (!adev->powerplay.pp_funcs->set_fan_control_mode)
-               return -EINVAL;
 
        err = kstrtoint(buf, 10, &value);
        if (err)
@@ -1651,7 +1709,13 @@ static ssize_t amdgpu_hwmon_set_fan1_enable(struct device *dev,
        else
                return -EINVAL;
 
-       amdgpu_dpm_set_fan_control_mode(adev, pwm_mode);
+       if (is_support_sw_smu(adev)) {
+               smu_set_fan_control_mode(&adev->smu, pwm_mode);
+       } else {
+               if (!adev->powerplay.pp_funcs->set_fan_control_mode)
+                       return -EINVAL;
+               amdgpu_dpm_set_fan_control_mode(adev, pwm_mode);
+       }
 
        return count;
 }
@@ -2521,7 +2585,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
                                "pp_power_profile_mode\n");
                return ret;
        }
-       if (is_support_sw_smu(adev) || hwmgr->od_enabled) {
+       if ((is_support_sw_smu(adev) && adev->smu.od_enabled) ||
+           (!is_support_sw_smu(adev) && hwmgr->od_enabled)) {
                ret = device_create_file(adev->dev,
                                &dev_attr_pp_od_clk_voltage);
                if (ret) {
@@ -2597,7 +2662,8 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
        device_remove_file(adev->dev, &dev_attr_pp_mclk_od);
        device_remove_file(adev->dev,
                        &dev_attr_pp_power_profile_mode);
-       if (hwmgr->od_enabled)
+       if ((is_support_sw_smu(adev) && adev->smu.od_enabled) ||
+           (!is_support_sw_smu(adev) && hwmgr->od_enabled))
                device_remove_file(adev->dev,
                                &dev_attr_pp_od_clk_voltage);
        device_remove_file(adev->dev, &dev_attr_gpu_busy_percent);