1 Distributed Switch Architecture Device Tree Bindings
2 ----------------------------------------------------
4 Two bindings exist, one of which has been deprecated due to
10 Switches are true Linux devices and can be probes by any means. Once
11 probed, they register to the DSA framework, passing a node
12 pointer. This node is expected to fulfil the following binding, and
13 may contain additional properties as required by the device it is
18 - ports : A container for child nodes representing switch ports.
22 - dsa,member : A two element list indicates which DSA cluster, and position
23 within the cluster a switch takes. <0 0> is cluster 0,
24 switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
25 switch 0. A switch not part of any cluster (single device
26 hanging off a CPU port) must not specify this property
28 The ports container has the following properties
32 - #address-cells : Must be 1
33 - #size-cells : Must be 0
35 Each port children node must have the following mandatory properties:
36 - reg : Describes the port address in the switch
38 An uplink/downlink port between switches in the cluster has the following
41 - link : Should be a list of phandles to other switch's DSA
42 port. This port is used as the outgoing port
43 towards the phandle ports. The full routing
44 information must be given, not just the one hop
45 routes to neighbouring switches.
47 A CPU port has the following mandatory property:
49 - ethernet : Should be a phandle to a valid Ethernet device node.
50 This host device is what the switch port is
53 A user port has the following optional property:
55 - label : Describes the label associated with this port, which
56 will become the netdev name.
58 Port child nodes may also contain the following optional standardised
59 properties, described in binding documents:
61 - phy-handle : Phandle to a PHY on an MDIO bus. See
62 Documentation/devicetree/bindings/net/ethernet.txt
66 Documentation/devicetree/bindings/net/ethernet.txt
69 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
71 Documentation/devicetree/bindings/net/fixed-link.txt
76 The following example shows three switches on three MDIO busses,
77 linked into one DSA cluster.
84 compatible = "marvell,mv88e6085";
107 switch0port5: port@5 {
109 phy-mode = "rgmii-txid";
110 link = <&switch1port6
131 #address-cells = <1>;
135 compatible = "marvell,mv88e6085";
141 #address-cells = <1>;
146 phy-handle = <&switch1phy0>;
152 phy-handle = <&switch1phy1>;
158 phy-handle = <&switch1phy2>;
161 switch1port5: port@5 {
163 link = <&switch2port9>;
164 phy-mode = "rgmii-txid";
171 switch1port6: port@6 {
173 phy-mode = "rgmii-txid";
174 link = <&switch0port5>;
182 #address-cells = <1>;
184 switch1phy0: switch1phy0@0 {
187 switch1phy1: switch1phy0@1 {
190 switch1phy2: switch1phy0@2 {
198 #address-cells = <1>;
202 compatible = "marvell,mv88e6085";
208 #address-cells = <1>;
231 link-gpios = <&gpio6 2
242 link-gpios = <&gpio6 3
247 switch2port9: port@9 {
249 phy-mode = "rgmii-txid";
250 link = <&switch1port5
264 The deprecated binding makes use of a platform device to represent the
265 switches. The switches themselves are not Linux devices, and make use
266 of an MDIO bus for management.
269 - compatible : Should be "marvell,dsa"
270 - #address-cells : Must be 2, first cell is the address on the MDIO bus
271 and second cell is the address in the switch tree.
272 Second cell is used only when cascading/chaining.
273 - #size-cells : Must be 0
274 - dsa,ethernet : Should be a phandle to a valid Ethernet device node
275 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
278 - interrupts : property with a value describing the switch
279 interrupt number (not supported by the driver)
281 A DSA node can contain multiple switch chips which are therefore child nodes of
282 the parent DSA node. The maximum number of allowed child nodes is 4
284 Each of these switch child nodes should have the following required properties:
286 - reg : Contains two fields. The first one describes the
287 address on the MII bus. The second is the switch
288 number that must be unique in cascaded configurations
289 - #address-cells : Must be 1
290 - #size-cells : Must be 0
292 A switch child node has the following optional property:
294 - eeprom-length : Set to the length of an EEPROM connected to the
295 switch. Must be set if the switch can not detect
296 the presence and/or size of a connected EEPROM,
299 A switch may have multiple "port" children nodes
301 Each port children node must have the following mandatory properties:
302 - reg : Describes the port address in the switch
303 - label : Describes the label associated with this port, special
304 labels are "cpu" to indicate a CPU port and "dsa" to
305 indicate an uplink/downlink port.
307 Note that a port labelled "dsa" will imply checking for the uplink phandle
311 - link : Should be a list of phandles to another switch's DSA port.
312 This property is only used when switches are being
313 chained/cascaded together. This port is used as outgoing port
314 towards the phandle port, which can be more than one hop away.
316 - phy-handle : Phandle to a PHY on an external MDIO bus, not the
317 switch internal one. See
318 Documentation/devicetree/bindings/net/ethernet.txt
321 - phy-mode : String representing the connection to the designated
322 PHY node specified by the 'phy-handle' property. See
323 Documentation/devicetree/bindings/net/ethernet.txt
326 - mii-bus : Should be a phandle to a valid MDIO bus device node.
327 This mii-bus will be used in preference to the
328 global dsa,mii-bus defined above, for this switch.
331 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
333 Documentation/devicetree/bindings/net/fixed-link.txt
339 compatible = "marvell,dsa";
340 #address-cells = <2>;
344 dsa,ethernet = <ðernet0>;
345 dsa,mii-bus = <&mii_bus0>;
348 #address-cells = <1>;
350 reg = <16 0>; /* MDIO address 16, switch 0 in tree */
355 phy-handle = <&phy0>;
368 switch0port6: port@6 {
371 link = <&switch1port0
377 #address-cells = <1>;
379 reg = <17 1>; /* MDIO address 17, switch 1 in tree */
380 mii-bus = <&mii_bus1>;
381 reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
383 switch1port0: port@0 {
386 link = <&switch0port6>;
388 switch1port1: port@1 {
391 link = <&switch2port1>;
396 #address-cells = <1>;
398 reg = <18 2>; /* MDIO address 18, switch 2 in tree */
399 mii-bus = <&mii_bus1>;
401 switch2port0: port@0 {
404 link = <&switch1port1