1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * I/O routines for GF1/InterWave synthesizer chips
7 #include <linux/delay.h>
8 #include <linux/time.h>
9 #include <sound/core.h>
10 #include <sound/gus.h>
12 void snd_gf1_delay(struct snd_gus_card * gus)
16 for (i = 0; i < 6; i++) {
23 * =======================================================================
27 * ok.. stop of control registers (wave & ramp) need some special things..
28 * big UltraClick (tm) elimination...
31 static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
35 outb(reg | 0x80, gus->gf1.reg_regsel);
37 value = inb(gus->gf1.reg_data8);
39 outb(reg, gus->gf1.reg_regsel);
41 outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
45 static inline void __snd_gf1_write8(struct snd_gus_card * gus,
49 outb(reg, gus->gf1.reg_regsel);
51 outb(data, gus->gf1.reg_data8);
55 static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
58 outb(reg, gus->gf1.reg_regsel);
60 return inb(gus->gf1.reg_data8);
63 static inline void __snd_gf1_write16(struct snd_gus_card * gus,
64 unsigned char reg, unsigned int data)
66 outb(reg, gus->gf1.reg_regsel);
68 outw((unsigned short) data, gus->gf1.reg_data16);
72 static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
75 outb(reg, gus->gf1.reg_regsel);
77 return inw(gus->gf1.reg_data16);
80 static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
81 unsigned char reg, unsigned char data)
83 outb(reg, gus->gf1.reg_timerctrl);
84 inb(gus->gf1.reg_timerctrl);
85 inb(gus->gf1.reg_timerctrl);
86 outb(data, gus->gf1.reg_timerdata);
87 inb(gus->gf1.reg_timerctrl);
88 inb(gus->gf1.reg_timerctrl);
91 static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
92 unsigned int addr, int w_16bit)
94 if (gus->gf1.enh_mode) {
96 addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
97 __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
99 addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
100 __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
101 __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
104 static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
105 unsigned char reg, short w_16bit)
109 res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
110 res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
111 if (gus->gf1.enh_mode) {
112 res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
114 res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
116 res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
122 * =======================================================================
125 void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
127 __snd_gf1_ctrl_stop(gus, reg);
130 void snd_gf1_write8(struct snd_gus_card * gus,
134 __snd_gf1_write8(gus, reg, data);
137 unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
139 return __snd_gf1_look8(gus, reg);
142 void snd_gf1_write16(struct snd_gus_card * gus,
146 __snd_gf1_write16(gus, reg, data);
149 unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
151 return __snd_gf1_look16(gus, reg);
154 void snd_gf1_adlib_write(struct snd_gus_card * gus,
158 __snd_gf1_adlib_write(gus, reg, data);
161 void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
162 unsigned int addr, short w_16bit)
164 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
167 unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
171 return __snd_gf1_read_addr(gus, reg, w_16bit);
178 void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
182 spin_lock_irqsave(&gus->reg_lock, flags);
183 __snd_gf1_ctrl_stop(gus, reg);
184 spin_unlock_irqrestore(&gus->reg_lock, flags);
187 void snd_gf1_i_write8(struct snd_gus_card * gus,
193 spin_lock_irqsave(&gus->reg_lock, flags);
194 __snd_gf1_write8(gus, reg, data);
195 spin_unlock_irqrestore(&gus->reg_lock, flags);
198 unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
203 spin_lock_irqsave(&gus->reg_lock, flags);
204 res = __snd_gf1_look8(gus, reg);
205 spin_unlock_irqrestore(&gus->reg_lock, flags);
209 void snd_gf1_i_write16(struct snd_gus_card * gus,
215 spin_lock_irqsave(&gus->reg_lock, flags);
216 __snd_gf1_write16(gus, reg, data);
217 spin_unlock_irqrestore(&gus->reg_lock, flags);
220 unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
225 spin_lock_irqsave(&gus->reg_lock, flags);
226 res = __snd_gf1_look16(gus, reg);
227 spin_unlock_irqrestore(&gus->reg_lock, flags);
233 void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
239 spin_lock_irqsave(&gus->reg_lock, flags);
240 __snd_gf1_adlib_write(gus, reg, data);
241 spin_unlock_irqrestore(&gus->reg_lock, flags);
244 void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
245 unsigned int addr, short w_16bit)
249 spin_lock_irqsave(&gus->reg_lock, flags);
250 __snd_gf1_write_addr(gus, reg, addr, w_16bit);
251 spin_unlock_irqrestore(&gus->reg_lock, flags);
256 #ifdef CONFIG_SND_DEBUG
257 static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
258 unsigned char reg, short w_16bit)
263 spin_lock_irqsave(&gus->reg_lock, flags);
264 res = __snd_gf1_read_addr(gus, reg, w_16bit);
265 spin_unlock_irqrestore(&gus->reg_lock, flags);
274 void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
276 outb(0x43, gus->gf1.reg_regsel);
278 outw((unsigned short) addr, gus->gf1.reg_data16);
280 outb(0x44, gus->gf1.reg_regsel);
282 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
286 void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
290 spin_lock_irqsave(&gus->reg_lock, flags);
291 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
293 outw((unsigned short) addr, gus->gf1.reg_data16);
295 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
297 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
299 outb(data, gus->gf1.reg_dram);
300 spin_unlock_irqrestore(&gus->reg_lock, flags);
303 unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
308 spin_lock_irqsave(&gus->reg_lock, flags);
309 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
311 outw((unsigned short) addr, gus->gf1.reg_data16);
313 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
315 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
317 res = inb(gus->gf1.reg_dram);
318 spin_unlock_irqrestore(&gus->reg_lock, flags);
324 void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
329 dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
330 spin_lock_irqsave(&gus->reg_lock, flags);
331 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
333 outw((unsigned short) addr, gus->gf1.reg_data16);
335 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
337 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
339 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
341 outw(data, gus->gf1.reg_data16);
342 spin_unlock_irqrestore(&gus->reg_lock, flags);
345 unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
351 dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
352 spin_lock_irqsave(&gus->reg_lock, flags);
353 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
355 outw((unsigned short) addr, gus->gf1.reg_data16);
357 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
359 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
361 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
363 res = inw(gus->gf1.reg_data16);
364 spin_unlock_irqrestore(&gus->reg_lock, flags);
368 void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
369 unsigned short value, unsigned int count)
375 dev_dbg(gus->card->dev, "%s - GF1!!!\n", __func__);
378 port = GUSP(gus, GF1DATALOW);
379 spin_lock_irqsave(&gus->reg_lock, flags);
380 outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
382 outw((unsigned short) addr, gus->gf1.reg_data16);
384 outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
386 outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
388 outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
391 spin_unlock_irqrestore(&gus->reg_lock, flags);
396 void snd_gf1_select_active_voices(struct snd_gus_card * gus)
398 unsigned short voices;
400 static const unsigned short voices_tbl[32 - 14 + 1] =
402 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
403 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
406 voices = gus->gf1.active_voices;
411 if (gus->gf1.enh_mode)
413 gus->gf1.active_voices = voices;
414 gus->gf1.playback_freq =
415 gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
416 if (!gus->gf1.enh_mode) {
417 snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
422 #ifdef CONFIG_SND_DEBUG
424 void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
429 voice = gus->gf1.active_voice;
430 dev_info(gus->card->dev,
431 " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n",
432 voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
433 dev_info(gus->card->dev,
434 " -%i- GF1 frequency = 0x%x\n",
435 voice, snd_gf1_i_read16(gus, 1));
436 dev_info(gus->card->dev,
437 " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n",
438 voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4),
439 snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4),
440 snd_gf1_i_read_addr(gus, 4, ctrl & 4),
441 snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
442 dev_info(gus->card->dev,
443 " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n",
444 voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8),
445 snd_gf1_i_read8(gus, 6));
446 dev_info(gus->card->dev,
447 " -%i- GF1 volume = 0x%x\n",
448 voice, snd_gf1_i_read16(gus, 9));
449 dev_info(gus->card->dev,
450 " -%i- GF1 position = 0x%x (0x%x)\n",
451 voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4),
452 snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
453 if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
454 mode = snd_gf1_i_read8(gus, 0x15);
455 dev_info(gus->card->dev,
456 " -%i- GFA1 mode = 0x%x\n",
458 if (mode & 0x01) { /* Effect processor */
459 dev_info(gus->card->dev,
460 " -%i- GFA1 effect address = 0x%x\n",
461 voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
462 dev_info(gus->card->dev,
463 " -%i- GFA1 effect volume = 0x%x\n",
464 voice, snd_gf1_i_read16(gus, 0x16));
465 dev_info(gus->card->dev,
466 " -%i- GFA1 effect volume final = 0x%x\n",
467 voice, snd_gf1_i_read16(gus, 0x1d));
468 dev_info(gus->card->dev,
469 " -%i- GFA1 effect accumulator = 0x%x\n",
470 voice, snd_gf1_i_read8(gus, 0x14));
473 dev_info(gus->card->dev,
474 " -%i- GFA1 left offset = 0x%x (%i)\n",
475 voice, snd_gf1_i_read16(gus, 0x13),
476 snd_gf1_i_read16(gus, 0x13) >> 4);
477 dev_info(gus->card->dev,
478 " -%i- GFA1 left offset final = 0x%x (%i)\n",
479 voice, snd_gf1_i_read16(gus, 0x1c),
480 snd_gf1_i_read16(gus, 0x1c) >> 4);
481 dev_info(gus->card->dev,
482 " -%i- GFA1 right offset = 0x%x (%i)\n",
483 voice, snd_gf1_i_read16(gus, 0x0c),
484 snd_gf1_i_read16(gus, 0x0c) >> 4);
485 dev_info(gus->card->dev,
486 " -%i- GFA1 right offset final = 0x%x (%i)\n",
487 voice, snd_gf1_i_read16(gus, 0x1b),
488 snd_gf1_i_read16(gus, 0x1b) >> 4);
490 dev_info(gus->card->dev,
491 " -%i- GF1 pan = 0x%x\n",
492 voice, snd_gf1_i_read8(gus, 0x0c));
494 dev_info(gus->card->dev,
495 " -%i- GF1 pan = 0x%x\n",
496 voice, snd_gf1_i_read8(gus, 0x0c));
501 void snd_gf1_print_global_registers(struct snd_gus_card * gus)
503 unsigned char global_mode = 0x00;
505 dev_info(gus->card->dev,
506 " -G- GF1 active voices = 0x%x\n",
507 snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
508 if (gus->interwave) {
509 global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
510 dev_info(gus->card->dev,
511 " -G- GF1 global mode = 0x%x\n",
514 if (global_mode & 0x02) /* LFO enabled? */
515 dev_info(gus->card->dev,
516 " -G- GF1 LFO base = 0x%x\n",
517 snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
518 dev_info(gus->card->dev,
519 " -G- GF1 voices IRQ read = 0x%x\n",
520 snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
521 dev_info(gus->card->dev,
522 " -G- GF1 DRAM DMA control = 0x%x\n",
523 snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
524 dev_info(gus->card->dev,
525 " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n",
526 snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH),
527 snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
528 dev_info(gus->card->dev,
529 " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n",
530 snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH),
531 snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
533 dev_info(gus->card->dev,
534 " -G- GF1 record DMA control = 0x%x\n",
535 snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
536 dev_info(gus->card->dev,
537 " -G- GF1 DRAM IO 16 = 0x%x\n",
538 snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
539 if (gus->gf1.enh_mode) {
540 dev_info(gus->card->dev,
541 " -G- GFA1 memory config = 0x%x\n",
542 snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
543 dev_info(gus->card->dev,
544 " -G- GFA1 memory control = 0x%x\n",
545 snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
546 dev_info(gus->card->dev,
547 " -G- GFA1 FIFO record base = 0x%x\n",
548 snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
549 dev_info(gus->card->dev,
550 " -G- GFA1 FIFO playback base = 0x%x\n",
551 snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
552 dev_info(gus->card->dev,
553 " -G- GFA1 interleave control = 0x%x\n",
554 snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
558 void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
560 dev_info(gus->card->dev,
561 " -S- mix control = 0x%x\n",
562 inb(GUSP(gus, MIXCNTRLREG)));
563 dev_info(gus->card->dev,
564 " -S- IRQ status = 0x%x\n",
565 inb(GUSP(gus, IRQSTAT)));
566 dev_info(gus->card->dev,
567 " -S- timer control = 0x%x\n",
568 inb(GUSP(gus, TIMERCNTRL)));
569 dev_info(gus->card->dev,
570 " -S- timer data = 0x%x\n",
571 inb(GUSP(gus, TIMERDATA)));
572 dev_info(gus->card->dev,
573 " -S- status read = 0x%x\n",
574 inb(GUSP(gus, REGCNTRLS)));
575 dev_info(gus->card->dev,
576 " -S- Sound Blaster control = 0x%x\n",
577 snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
578 dev_info(gus->card->dev,
579 " -S- AdLib timer 1/2 = 0x%x/0x%x\n",
580 snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1),
581 snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
582 dev_info(gus->card->dev,
583 " -S- reset = 0x%x\n",
584 snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
585 if (gus->interwave) {
586 dev_info(gus->card->dev,
587 " -S- compatibility = 0x%x\n",
588 snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
589 dev_info(gus->card->dev,
590 " -S- decode control = 0x%x\n",
591 snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
592 dev_info(gus->card->dev,
593 " -S- version number = 0x%x\n",
594 snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
595 dev_info(gus->card->dev,
596 " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n",
597 snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A),
598 snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
599 dev_info(gus->card->dev,
600 " -S- emulation IRQ = 0x%x\n",
601 snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));