drivers/usb/gadget/udc/s3c2410_udc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * linux/drivers/usb/gadget/s3c2410_udc.c
   4  *
   5  * Samsung S3C24xx series on-chip full speed USB device controllers
   6  *
   7  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   8  *      Additional cleanups by Ben Dooks <[email protected]>
   9  */
  10
  11 #define pr_fmt(fmt) "s3c2410_udc: " fmt
  12
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/delay.h>
  16 #include <linux/ioport.h>
  17 #include <linux/sched.h>
  18 #include <linux/slab.h>
  19 #include <linux/errno.h>
  20 #include <linux/init.h>
  21 #include <linux/timer.h>
  22 #include <linux/list.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/clk.h>
  26 #include <linux/gpio.h>
  27 #include <linux/prefetch.h>
  28 #include <linux/io.h>
  29
  30 #include <linux/debugfs.h>
  31 #include <linux/seq_file.h>
  32
  33 #include <linux/usb.h>
  34 #include <linux/usb/gadget.h>
  35
  36 #include <asm/byteorder.h>
  37 #include <asm/irq.h>
  38 #include <asm/unaligned.h>
  39
  40 #include <linux/platform_data/usb-s3c2410_udc.h>
  41
  42 #include "s3c2410_udc.h"
  43 #include "s3c2410_udc_regs.h"
  44
  45 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  46 #define DRIVER_AUTHOR   "Herbert Pötzl <[email protected]>, " \
  47                         "Arnaud Patard <[email protected]>"
  48
  49 static const char               gadget_name[] = "s3c2410_udc";
  50 static const char               driver_desc[] = DRIVER_DESC;
  51
  52 static struct s3c2410_udc       *the_controller;
  53 static struct clk               *udc_clock;
  54 static struct clk               *usb_bus_clock;
  55 static void __iomem             *base_addr;
  56 static int                      irq_usbd;
  57 static u64                      rsrc_start;
  58 static u64                      rsrc_len;
  59 static struct dentry            *s3c2410_udc_debugfs_root;
  60
  61 static inline u32 udc_read(u32 reg)
  62 {
  63         return readb(base_addr + reg);
  64 }
  65
  66 static inline void udc_write(u32 value, u32 reg)
  67 {
  68         writeb(value, base_addr + reg);
  69 }
  70
  71 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  72 {
  73         writeb(value, base + reg);
  74 }
  75
  76 static struct s3c2410_udc_mach_info *udc_info;
  77
  78 /*************************** DEBUG FUNCTION ***************************/
  79 #define DEBUG_NORMAL    1
  80 #define DEBUG_VERBOSE   2
  81
  82 #ifdef CONFIG_USB_S3C2410_DEBUG
  83 #define USB_S3C2410_DEBUG_LEVEL 0
  84
  85 static uint32_t s3c2410_ticks = 0;
  86
  87 __printf(2, 3)
  88 static void dprintk(int level, const char *fmt, ...)
  89 {
  90         static long prevticks;
  91         static int invocation;
  92         struct va_format vaf;
  93         va_list args;
  94
  95         if (level > USB_S3C2410_DEBUG_LEVEL)
  96                 return;
  97
  98         va_start(args, fmt);
  99
 100         vaf.fmt = fmt;
 101         vaf.va = &args;
 102
 103         if (s3c2410_ticks != prevticks) {
 104                 prevticks = s3c2410_ticks;
 105                 invocation = 0;
 106         }
 107
 108         pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 109
 110         va_end(args);
 111 }
 112 #else
 113 __printf(2, 3)
 114 static void dprintk(int level, const char *fmt, ...)
 115 {
 116 }
 117 #endif
 118
 119 static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
 120 {
 121         u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 122         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 123         u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 124         u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 125
 126         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 127         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 128         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 129         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 130         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 131         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 132         udc_write(0, S3C2410_UDC_INDEX_REG);
 133         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 134         udc_write(1, S3C2410_UDC_INDEX_REG);
 135         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 136         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 137         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 138         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 139         udc_write(2, S3C2410_UDC_INDEX_REG);
 140         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 141         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 142         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 143         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 144
 145         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 146                  "PWR_REG        : 0x%04X\n"
 147                  "EP_INT_REG     : 0x%04X\n"
 148                  "USB_INT_REG    : 0x%04X\n"
 149                  "EP_INT_EN_REG  : 0x%04X\n"
 150                  "USB_INT_EN_REG : 0x%04X\n"
 151                  "EP0_CSR        : 0x%04X\n"
 152                  "EP1_I_CSR1     : 0x%04X\n"
 153                  "EP1_I_CSR2     : 0x%04X\n"
 154                  "EP1_O_CSR1     : 0x%04X\n"
 155                  "EP1_O_CSR2     : 0x%04X\n"
 156                  "EP2_I_CSR1     : 0x%04X\n"
 157                  "EP2_I_CSR2     : 0x%04X\n"
 158                  "EP2_O_CSR1     : 0x%04X\n"
 159                  "EP2_O_CSR2     : 0x%04X\n",
 160                         addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 161                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 162                         ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 163                         ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 164                 );
 165
 166         return 0;
 167 }
 168 DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
 169
 170 /* io macros */
 171
 172 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 173 {
 174         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 175         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 176                         S3C2410_UDC_EP0_CSR_REG);
 177 }
 178
 179 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 180 {
 181         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 182         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 183 }
 184
 185 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 186 {
 187         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 188         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 189 }
 190
 191 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 192 {
 193         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 194         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 195 }
 196
 197 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 198 {
 199         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 200         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 201 }
 202
 203 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 204 {
 205         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 206         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 207 }
 208
 209 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 210 {
 211         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 212
 213         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 214                                 | S3C2410_UDC_EP0_CSR_DE),
 215                         S3C2410_UDC_EP0_CSR_REG);
 216 }
 217
 218 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 219 {
 220         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 221         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 222                         | S3C2410_UDC_EP0_CSR_DE),
 223                 S3C2410_UDC_EP0_CSR_REG);
 224 }
 225
 226 /*------------------------- I/O ----------------------------------*/
 227
 228 /*
 229  *      s3c2410_udc_done
 230  */
 231 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 232                 struct s3c2410_request *req, int status)
 233 {
 234         unsigned halted = ep->halted;
 235
 236         list_del_init(&req->queue);
 237
 238         if (likely(req->req.status == -EINPROGRESS))
 239                 req->req.status = status;
 240         else
 241                 status = req->req.status;
 242
 243         ep->halted = 1;
 244         usb_gadget_giveback_request(&ep->ep, &req->req);
 245         ep->halted = halted;
 246 }
 247
 248 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 249                 struct s3c2410_ep *ep, int status)
 250 {
 251         while (!list_empty(&ep->queue)) {
 252                 struct s3c2410_request *req;
 253                 req = list_entry(ep->queue.next, struct s3c2410_request,
 254                                 queue);
 255                 s3c2410_udc_done(ep, req, status);
 256         }
 257 }
 258
 259 static inline int s3c2410_udc_fifo_count_out(void)
 260 {
 261         int tmp;
 262
 263         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 264         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 265         return tmp;
 266 }
 267
 268 /*
 269  *      s3c2410_udc_write_packet
 270  */
 271 static inline int s3c2410_udc_write_packet(int fifo,
 272                 struct s3c2410_request *req,
 273                 unsigned max)
 274 {
 275         unsigned len = min(req->req.length - req->req.actual, max);
 276         u8 *buf = req->req.buf + req->req.actual;
 277
 278         prefetch(buf);
 279
 280         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 281                 req->req.actual, req->req.length, len, req->req.actual + len);
 282
 283         req->req.actual += len;
 284
 285         udelay(5);
 286         writesb(base_addr + fifo, buf, len);
 287         return len;
 288 }
 289
 290 /*
 291  *      s3c2410_udc_write_fifo
 292  *
 293  * return:  0 = still running, 1 = completed, negative = errno
 294  */
 295 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 296                 struct s3c2410_request *req)
 297 {
 298         unsigned        count;
 299         int             is_last;
 300         u32             idx;
 301         int             fifo_reg;
 302         u32             ep_csr;
 303
 304         idx = ep->bEndpointAddress & 0x7F;
 305         switch (idx) {
 306         default:
 307                 idx = 0;
 308                 fallthrough;
 309         case 0:
 310                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 311                 break;
 312         case 1:
 313                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 314                 break;
 315         case 2:
 316                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 317                 break;
 318         case 3:
 319                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 320                 break;
 321         case 4:
 322                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 323                 break;
 324         }
 325
 326         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 327
 328         /* last packet is often short (sometimes a zlp) */
 329         if (count != ep->ep.maxpacket)
 330                 is_last = 1;
 331         else if (req->req.length != req->req.actual || req->req.zero)
 332                 is_last = 0;
 333         else
 334                 is_last = 2;
 335
 336         /* Only ep0 debug messages are interesting */
 337         if (idx == 0)
 338                 dprintk(DEBUG_NORMAL,
 339                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 340                         idx, count, req->req.actual, req->req.length,
 341                         is_last, req->req.zero);
 342
 343         if (is_last) {
 344                 /* The order is important. It prevents sending 2 packets
 345                  * at the same time */
 346
 347                 if (idx == 0) {
 348                         /* Reset signal => no need to say 'data sent' */
 349                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 350                                         & S3C2410_UDC_USBINT_RESET))
 351                                 s3c2410_udc_set_ep0_de_in(base_addr);
 352                         ep->dev->ep0state = EP0_IDLE;
 353                 } else {
 354                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 355                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 356                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 357                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 358                                         S3C2410_UDC_IN_CSR1_REG);
 359                 }
 360
 361                 s3c2410_udc_done(ep, req, 0);
 362                 is_last = 1;
 363         } else {
 364                 if (idx == 0) {
 365                         /* Reset signal => no need to say 'data sent' */
 366                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 367                                         & S3C2410_UDC_USBINT_RESET))
 368                                 s3c2410_udc_set_ep0_ipr(base_addr);
 369                 } else {
 370                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 371                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 372                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 373                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 374                                         S3C2410_UDC_IN_CSR1_REG);
 375                 }
 376         }
 377
 378         return is_last;
 379 }
 380
 381 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 382                 struct s3c2410_request *req, unsigned avail)
 383 {
 384         unsigned len;
 385
 386         len = min(req->req.length - req->req.actual, avail);
 387         req->req.actual += len;
 388
 389         readsb(fifo + base_addr, buf, len);
 390         return len;
 391 }
 392
 393 /*
 394  * return:  0 = still running, 1 = queue empty, negative = errno
 395  */
 396 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 397                                  struct s3c2410_request *req)
 398 {
 399         u8              *buf;
 400         u32             ep_csr;
 401         unsigned        bufferspace;
 402         int             is_last = 1;
 403         unsigned        avail;
 404         int             fifo_count = 0;
 405         u32             idx;
 406         int             fifo_reg;
 407
 408         idx = ep->bEndpointAddress & 0x7F;
 409
 410         switch (idx) {
 411         default:
 412                 idx = 0;
 413                 fallthrough;
 414         case 0:
 415                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 416                 break;
 417         case 1:
 418                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 419                 break;
 420         case 2:
 421                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 422                 break;
 423         case 3:
 424                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 425                 break;
 426         case 4:
 427                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 428                 break;
 429         }
 430
 431         if (!req->req.length)
 432                 return 1;
 433
 434         buf = req->req.buf + req->req.actual;
 435         bufferspace = req->req.length - req->req.actual;
 436         if (!bufferspace) {
 437                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 438                 return -1;
 439         }
 440
 441         udc_write(idx, S3C2410_UDC_INDEX_REG);
 442
 443         fifo_count = s3c2410_udc_fifo_count_out();
 444         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 445
 446         if (fifo_count > ep->ep.maxpacket)
 447                 avail = ep->ep.maxpacket;
 448         else
 449                 avail = fifo_count;
 450
 451         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 452
 453         /* checking this with ep0 is not accurate as we already
 454          * read a control request
 455          **/
 456         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 457                 is_last = 1;
 458                 /* overflowed this request?  flush extra data */
 459                 if (fifo_count != avail)
 460                         req->req.status = -EOVERFLOW;
 461         } else {
 462                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 463         }
 464
 465         udc_write(idx, S3C2410_UDC_INDEX_REG);
 466         fifo_count = s3c2410_udc_fifo_count_out();
 467
 468         /* Only ep0 debug messages are interesting */
 469         if (idx == 0)
 470                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 471                         __func__, fifo_count, is_last);
 472
 473         if (is_last) {
 474                 if (idx == 0) {
 475                         s3c2410_udc_set_ep0_de_out(base_addr);
 476                         ep->dev->ep0state = EP0_IDLE;
 477                 } else {
 478                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 479                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 480                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 481                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 482                                         S3C2410_UDC_OUT_CSR1_REG);
 483                 }
 484
 485                 s3c2410_udc_done(ep, req, 0);
 486         } else {
 487                 if (idx == 0) {
 488                         s3c2410_udc_clear_ep0_opr(base_addr);
 489                 } else {
 490                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 491                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 492                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 493                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 494                                         S3C2410_UDC_OUT_CSR1_REG);
 495                 }
 496         }
 497
 498         return is_last;
 499 }
 500
 501 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 502 {
 503         unsigned char *outbuf = (unsigned char *)crq;
 504         int bytes_read = 0;
 505
 506         udc_write(0, S3C2410_UDC_INDEX_REG);
 507
 508         bytes_read = s3c2410_udc_fifo_count_out();
 509
 510         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 511
 512         if (bytes_read > sizeof(struct usb_ctrlrequest))
 513                 bytes_read = sizeof(struct usb_ctrlrequest);
 514
 515         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 516
 517         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 518                 bytes_read, crq->bRequest, crq->bRequestType,
 519                 crq->wValue, crq->wIndex, crq->wLength);
 520
 521         return bytes_read;
 522 }
 523
 524 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 525                 struct usb_ctrlrequest *crq)
 526 {
 527         u16 status = 0;
 528         u8 ep_num = crq->wIndex & 0x7F;
 529         u8 is_in = crq->wIndex & USB_DIR_IN;
 530
 531         switch (crq->bRequestType & USB_RECIP_MASK) {
 532         case USB_RECIP_INTERFACE:
 533                 break;
 534
 535         case USB_RECIP_DEVICE:
 536                 status = dev->devstatus;
 537                 break;
 538
 539         case USB_RECIP_ENDPOINT:
 540                 if (ep_num > 4 || crq->wLength > 2)
 541                         return 1;
 542
 543                 if (ep_num == 0) {
 544                         udc_write(0, S3C2410_UDC_INDEX_REG);
 545                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 546                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 547                 } else {
 548                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 549                         if (is_in) {
 550                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 551                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 552                         } else {
 553                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 554                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 555                         }
 556                 }
 557
 558                 status = status ? 1 : 0;
 559                 break;
 560
 561         default:
 562                 return 1;
 563         }
 564
 565         /* Seems to be needed to get it working. ouch :( */
 566         udelay(5);
 567         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 568         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 569         s3c2410_udc_set_ep0_de_in(base_addr);
 570
 571         return 0;
 572 }
 573 /*------------------------- usb state machine -------------------------------*/
 574 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 575
 576 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 577                                         struct s3c2410_ep *ep,
 578                                         struct usb_ctrlrequest *crq,
 579                                         u32 ep0csr)
 580 {
 581         int len, ret, tmp;
 582
 583         /* start control request? */
 584         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 585                 return;
 586
 587         s3c2410_udc_nuke(dev, ep, -EPROTO);
 588
 589         len = s3c2410_udc_read_fifo_crq(crq);
 590         if (len != sizeof(*crq)) {
 591                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 592                         " wanted %d bytes got %d. Stalling out...\n",
 593                         sizeof(*crq), len);
 594                 s3c2410_udc_set_ep0_ss(base_addr);
 595                 return;
 596         }
 597
 598         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 599                 crq->bRequest, crq->bRequestType, crq->wLength);
 600
 601         /* cope with automagic for some standard requests. */
 602         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 603                 == USB_TYPE_STANDARD;
 604         dev->req_config = 0;
 605         dev->req_pending = 1;
 606
 607         switch (crq->bRequest) {
 608         case USB_REQ_SET_CONFIGURATION:
 609                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 610
 611                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 612                         dev->req_config = 1;
 613                         s3c2410_udc_set_ep0_de_out(base_addr);
 614                 }
 615                 break;
 616
 617         case USB_REQ_SET_INTERFACE:
 618                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 619
 620                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 621                         dev->req_config = 1;
 622                         s3c2410_udc_set_ep0_de_out(base_addr);
 623                 }
 624                 break;
 625
 626         case USB_REQ_SET_ADDRESS:
 627                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 628
 629                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 630                         tmp = crq->wValue & 0x7F;
 631                         dev->address = tmp;
 632                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 633                                         S3C2410_UDC_FUNC_ADDR_REG);
 634                         s3c2410_udc_set_ep0_de_out(base_addr);
 635                         return;
 636                 }
 637                 break;
 638
 639         case USB_REQ_GET_STATUS:
 640                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 641                 s3c2410_udc_clear_ep0_opr(base_addr);
 642
 643                 if (dev->req_std) {
 644                         if (!s3c2410_udc_get_status(dev, crq))
 645                                 return;
 646                 }
 647                 break;
 648
 649         case USB_REQ_CLEAR_FEATURE:
 650                 s3c2410_udc_clear_ep0_opr(base_addr);
 651
 652                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 653                         break;
 654
 655                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 656                         break;
 657
 658                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 659                 s3c2410_udc_set_ep0_de_out(base_addr);
 660                 return;
 661
 662         case USB_REQ_SET_FEATURE:
 663                 s3c2410_udc_clear_ep0_opr(base_addr);
 664
 665                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 666                         break;
 667
 668                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 669                         break;
 670
 671                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 672                 s3c2410_udc_set_ep0_de_out(base_addr);
 673                 return;
 674
 675         default:
 676                 s3c2410_udc_clear_ep0_opr(base_addr);
 677                 break;
 678         }
 679
 680         if (crq->bRequestType & USB_DIR_IN)
 681                 dev->ep0state = EP0_IN_DATA_PHASE;
 682         else
 683                 dev->ep0state = EP0_OUT_DATA_PHASE;
 684
 685         if (!dev->driver)
 686                 return;
 687
 688         /* deliver the request to the gadget driver */
 689         ret = dev->driver->setup(&dev->gadget, crq);
 690         if (ret < 0) {
 691                 if (dev->req_config) {
 692                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 693                                 crq->bRequest, ret);
 694                         return;
 695                 }
 696
 697                 if (ret == -EOPNOTSUPP)
 698                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 699                 else
 700                         dprintk(DEBUG_NORMAL,
 701                                 "dev->driver->setup failed. (%d)\n", ret);
 702
 703                 udelay(5);
 704                 s3c2410_udc_set_ep0_ss(base_addr);
 705                 s3c2410_udc_set_ep0_de_out(base_addr);
 706                 dev->ep0state = EP0_IDLE;
 707                 /* deferred i/o == no response yet */
 708         } else if (dev->req_pending) {
 709                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 710                 dev->req_pending = 0;
 711         }
 712
 713         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 714 }
 715
 716 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 717 {
 718         u32                     ep0csr;
 719         struct s3c2410_ep       *ep = &dev->ep[0];
 720         struct s3c2410_request  *req;
 721         struct usb_ctrlrequest  crq;
 722
 723         if (list_empty(&ep->queue))
 724                 req = NULL;
 725         else
 726                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 727
 728         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 729          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 730
 731         udc_write(0, S3C2410_UDC_INDEX_REG);
 732         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 733
 734         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 735                 ep0csr, ep0states[dev->ep0state]);
 736
 737         /* clear stall status */
 738         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 739                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 740                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 741                 s3c2410_udc_clear_ep0_sst(base_addr);
 742                 dev->ep0state = EP0_IDLE;
 743                 return;
 744         }
 745
 746         /* clear setup end */
 747         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 748                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 749                 s3c2410_udc_nuke(dev, ep, 0);
 750                 s3c2410_udc_clear_ep0_se(base_addr);
 751                 dev->ep0state = EP0_IDLE;
 752         }
 753
 754         switch (dev->ep0state) {
 755         case EP0_IDLE:
 756                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 757                 break;
 758
 759         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 760                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 761                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 762                         s3c2410_udc_write_fifo(ep, req);
 763                 break;
 764
 765         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 766                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 767                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 768                         s3c2410_udc_read_fifo(ep, req);
 769                 break;
 770
 771         case EP0_END_XFER:
 772                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 773                 dev->ep0state = EP0_IDLE;
 774                 break;
 775
 776         case EP0_STALL:
 777                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 778                 dev->ep0state = EP0_IDLE;
 779                 break;
 780         }
 781 }
 782
 783 /*
 784  *      handle_ep - Manage I/O endpoints
 785  */
 786
 787 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 788 {
 789         struct s3c2410_request  *req;
 790         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 791         u32                     ep_csr1;
 792         u32                     idx;
 793
 794         if (likely(!list_empty(&ep->queue)))
 795                 req = list_entry(ep->queue.next,
 796                                 struct s3c2410_request, queue);
 797         else
 798                 req = NULL;
 799
 800         idx = ep->bEndpointAddress & 0x7F;
 801
 802         if (is_in) {
 803                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 804                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 805                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 806                         idx, ep_csr1, req ? 1 : 0);
 807
 808                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 809                         dprintk(DEBUG_VERBOSE, "st\n");
 810                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 811                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 812                                         S3C2410_UDC_IN_CSR1_REG);
 813                         return;
 814                 }
 815
 816                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 817                         s3c2410_udc_write_fifo(ep, req);
 818         } else {
 819                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 820                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 821                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 822
 823                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 824                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 825                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 826                                         S3C2410_UDC_OUT_CSR1_REG);
 827                         return;
 828                 }
 829
 830                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 831                         s3c2410_udc_read_fifo(ep, req);
 832         }
 833 }
 834
 835 /*
 836  *      s3c2410_udc_irq - interrupt handler
 837  */
 838 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 839 {
 840         struct s3c2410_udc *dev = _dev;
 841         int usb_status;
 842         int usbd_status;
 843         int pwr_reg;
 844         int ep0csr;
 845         int i;
 846         u32 idx, idx2;
 847         unsigned long flags;
 848
 849         spin_lock_irqsave(&dev->lock, flags);
 850
 851         /* Driver connected ? */
 852         if (!dev->driver) {
 853                 /* Clear interrupts */
 854                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 855                                 S3C2410_UDC_USB_INT_REG);
 856                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 857                                 S3C2410_UDC_EP_INT_REG);
 858         }
 859
 860         /* Save index */
 861         idx = udc_read(S3C2410_UDC_INDEX_REG);
 862
 863         /* Read status registers */
 864         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 865         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 866         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 867
 868         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 869         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 870
 871         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 872                 usb_status, usbd_status, pwr_reg, ep0csr);
 873
 874         /*
 875          * Now, handle interrupts. There's two types :
 876          * - Reset, Resume, Suspend coming -> usb_int_reg
 877          * - EP -> ep_int_reg
 878          */
 879
 880         /* RESET */
 881         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 882                 /* two kind of reset :
 883                  * - reset start -> pwr reg = 8
 884                  * - reset end   -> pwr reg = 0
 885                  **/
 886                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 887                         ep0csr, pwr_reg);
 888
 889                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 890                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 891                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 892                                 S3C2410_UDC_MAXP_REG);
 893                 dev->address = 0;
 894
 895                 dev->ep0state = EP0_IDLE;
 896                 dev->gadget.speed = USB_SPEED_FULL;
 897
 898                 /* clear interrupt */
 899                 udc_write(S3C2410_UDC_USBINT_RESET,
 900                                 S3C2410_UDC_USB_INT_REG);
 901
 902                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 903                 spin_unlock_irqrestore(&dev->lock, flags);
 904                 return IRQ_HANDLED;
 905         }
 906
 907         /* RESUME */
 908         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 909                 dprintk(DEBUG_NORMAL, "USB resume\n");
 910
 911                 /* clear interrupt */
 912                 udc_write(S3C2410_UDC_USBINT_RESUME,
 913                                 S3C2410_UDC_USB_INT_REG);
 914
 915                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 916                                 && dev->driver
 917                                 && dev->driver->resume)
 918                         dev->driver->resume(&dev->gadget);
 919         }
 920
 921         /* SUSPEND */
 922         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 923                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 924
 925                 /* clear interrupt */
 926                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 927                                 S3C2410_UDC_USB_INT_REG);
 928
 929                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 930                                 && dev->driver
 931                                 && dev->driver->suspend)
 932                         dev->driver->suspend(&dev->gadget);
 933
 934                 dev->ep0state = EP0_IDLE;
 935         }
 936
 937         /* EP */
 938         /* control traffic */
 939         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 940          * generate an interrupt
 941          */
 942         if (usbd_status & S3C2410_UDC_INT_EP0) {
 943                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 944                 /* Clear the interrupt bit by setting it to 1 */
 945                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 946                 s3c2410_udc_handle_ep0(dev);
 947         }
 948
 949         /* endpoint data transfers */
 950         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 951                 u32 tmp = 1 << i;
 952                 if (usbd_status & tmp) {
 953                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 954
 955                         /* Clear the interrupt bit by setting it to 1 */
 956                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 957                         s3c2410_udc_handle_ep(&dev->ep[i]);
 958                 }
 959         }
 960
 961         /* what else causes this interrupt? a receive! who is it? */
 962         if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 963                 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 964                         idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 965                         udc_write(i, S3C2410_UDC_INDEX_REG);
 966
 967                         if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 968                                 s3c2410_udc_handle_ep(&dev->ep[i]);
 969
 970                         /* restore index */
 971                         udc_write(idx2, S3C2410_UDC_INDEX_REG);
 972                 }
 973         }
 974
 975         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd);
 976
 977         /* Restore old index */
 978         udc_write(idx, S3C2410_UDC_INDEX_REG);
 979
 980         spin_unlock_irqrestore(&dev->lock, flags);
 981
 982         return IRQ_HANDLED;
 983 }
 984 /*------------------------- s3c2410_ep_ops ----------------------------------*/
 985
 986 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
 987 {
 988         return container_of(ep, struct s3c2410_ep, ep);
 989 }
 990
 991 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
 992 {
 993         return container_of(gadget, struct s3c2410_udc, gadget);
 994 }
 995
 996 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
 997 {
 998         return container_of(req, struct s3c2410_request, req);
 999 }
1000
1001 /*
1002  *      s3c2410_udc_ep_enable
1003  */
1004 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1005                                  const struct usb_endpoint_descriptor *desc)
1006 {
1007         struct s3c2410_udc      *dev;
1008         struct s3c2410_ep       *ep;
1009         u32                     max, tmp;
1010         unsigned long           flags;
1011         u32                     csr1, csr2;
1012         u32                     int_en_reg;
1013
1014         ep = to_s3c2410_ep(_ep);
1015
1016         if (!_ep || !desc
1017                         || _ep->name == ep0name
1018                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1019                 return -EINVAL;
1020
1021         dev = ep->dev;
1022         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1023                 return -ESHUTDOWN;
1024
1025         max = usb_endpoint_maxp(desc);
1026
1027         local_irq_save(flags);
1028         _ep->maxpacket = max;
1029         ep->ep.desc = desc;
1030         ep->halted = 0;
1031         ep->bEndpointAddress = desc->bEndpointAddress;
1032
1033         /* set max packet */
1034         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1035         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1036
1037         /* set type, direction, address; reset fifo counters */
1038         if (desc->bEndpointAddress & USB_DIR_IN) {
1039                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1040                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1041
1042                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1043                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1044                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1045                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1046         } else {
1047                 /* don't flush in fifo or it will cause endpoint interrupt */
1048                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1049                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1050
1051                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1052                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1053                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1054                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1055
1056                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1057                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1058
1059                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1060                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1061                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1062                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1063         }
1064
1065         /* enable irqs */
1066         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1067         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1068
1069         /* print some debug message */
1070         tmp = desc->bEndpointAddress;
1071         dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1072                  _ep->name, ep->num, tmp,
1073                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1074
1075         local_irq_restore(flags);
1076         s3c2410_udc_set_halt(_ep, 0);
1077
1078         return 0;
1079 }
1080
1081 /*
1082  * s3c2410_udc_ep_disable
1083  */
1084 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1085 {
1086         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1087         unsigned long flags;
1088         u32 int_en_reg;
1089
1090         if (!_ep || !ep->ep.desc) {
1091                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1092                         _ep ? ep->ep.name : NULL);
1093                 return -EINVAL;
1094         }
1095
1096         local_irq_save(flags);
1097
1098         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1099
1100         ep->ep.desc = NULL;
1101         ep->halted = 1;
1102
1103         s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1104
1105         /* disable irqs */
1106         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1107         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1108
1109         local_irq_restore(flags);
1110
1111         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1112
1113         return 0;
1114 }
1115
1116 /*
1117  * s3c2410_udc_alloc_request
1118  */
1119 static struct usb_request *
1120 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1121 {
1122         struct s3c2410_request *req;
1123
1124         dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1125
1126         if (!_ep)
1127                 return NULL;
1128
1129         req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1130         if (!req)
1131                 return NULL;
1132
1133         INIT_LIST_HEAD(&req->queue);
1134         return &req->req;
1135 }
1136
1137 /*
1138  * s3c2410_udc_free_request
1139  */
1140 static void
1141 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1142 {
1143         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1144         struct s3c2410_request  *req = to_s3c2410_req(_req);
1145
1146         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1147
1148         if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1149                 return;
1150
1151         WARN_ON(!list_empty(&req->queue));
1152         kfree(req);
1153 }
1154
1155 /*
1156  *      s3c2410_udc_queue
1157  */
1158 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1159                 gfp_t gfp_flags)
1160 {
1161         struct s3c2410_request  *req = to_s3c2410_req(_req);
1162         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1163         struct s3c2410_udc      *dev;
1164         u32                     ep_csr = 0;
1165         int                     fifo_count = 0;
1166         unsigned long           flags;
1167
1168         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1169                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1170                 return -EINVAL;
1171         }
1172
1173         dev = ep->dev;
1174         if (unlikely(!dev->driver
1175                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1176                 return -ESHUTDOWN;
1177         }
1178
1179         local_irq_save(flags);
1180
1181         if (unlikely(!_req || !_req->complete
1182                         || !_req->buf || !list_empty(&req->queue))) {
1183                 if (!_req)
1184                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1185                 else {
1186                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1187                                 __func__, !_req->complete, !_req->buf,
1188                                 !list_empty(&req->queue));
1189                 }
1190
1191                 local_irq_restore(flags);
1192                 return -EINVAL;
1193         }
1194
1195         _req->status = -EINPROGRESS;
1196         _req->actual = 0;
1197
1198         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1199                  __func__, ep->bEndpointAddress, _req->length);
1200
1201         if (ep->bEndpointAddress) {
1202                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1203
1204                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1205                                 ? S3C2410_UDC_IN_CSR1_REG
1206                                 : S3C2410_UDC_OUT_CSR1_REG);
1207                 fifo_count = s3c2410_udc_fifo_count_out();
1208         } else {
1209                 udc_write(0, S3C2410_UDC_INDEX_REG);
1210                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1211                 fifo_count = s3c2410_udc_fifo_count_out();
1212         }
1213
1214         /* kickstart this i/o queue? */
1215         if (list_empty(&ep->queue) && !ep->halted) {
1216                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1217                         switch (dev->ep0state) {
1218                         case EP0_IN_DATA_PHASE:
1219                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1220                                                 && s3c2410_udc_write_fifo(ep,
1221                                                         req)) {
1222                                         dev->ep0state = EP0_IDLE;
1223                                         req = NULL;
1224                                 }
1225                                 break;
1226
1227                         case EP0_OUT_DATA_PHASE:
1228                                 if ((!_req->length)
1229                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1230                                                 && s3c2410_udc_read_fifo(ep,
1231                                                         req))) {
1232                                         dev->ep0state = EP0_IDLE;
1233                                         req = NULL;
1234                                 }
1235                                 break;
1236
1237                         default:
1238                                 local_irq_restore(flags);
1239                                 return -EL2HLT;
1240                         }
1241                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1242                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1243                                 && s3c2410_udc_write_fifo(ep, req)) {
1244                         req = NULL;
1245                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1246                                 && fifo_count
1247                                 && s3c2410_udc_read_fifo(ep, req)) {
1248                         req = NULL;
1249                 }
1250         }
1251
1252         /* pio or dma irq handler advances the queue. */
1253         if (likely(req))
1254                 list_add_tail(&req->queue, &ep->queue);
1255
1256         local_irq_restore(flags);
1257
1258         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1259         return 0;
1260 }
1261
1262 /*
1263  *      s3c2410_udc_dequeue
1264  */
1265 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1266 {
1267         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1268         int                     retval = -EINVAL;
1269         unsigned long           flags;
1270         struct s3c2410_request  *req = NULL;
1271
1272         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1273
1274         if (!the_controller->driver)
1275                 return -ESHUTDOWN;
1276
1277         if (!_ep || !_req)
1278                 return retval;
1279
1280         local_irq_save(flags);
1281
1282         list_for_each_entry(req, &ep->queue, queue) {
1283                 if (&req->req == _req) {
1284                         list_del_init(&req->queue);
1285                         _req->status = -ECONNRESET;
1286                         retval = 0;
1287                         break;
1288                 }
1289         }
1290
1291         if (retval == 0) {
1292                 dprintk(DEBUG_VERBOSE,
1293                         "dequeued req %p from %s, len %d buf %p\n",
1294                         req, _ep->name, _req->length, _req->buf);
1295
1296                 s3c2410_udc_done(ep, req, -ECONNRESET);
1297         }
1298
1299         local_irq_restore(flags);
1300         return retval;
1301 }
1302
1303 /*
1304  * s3c2410_udc_set_halt
1305  */
1306 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1307 {
1308         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1309         u32                     ep_csr = 0;
1310         unsigned long           flags;
1311         u32                     idx;
1312
1313         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1314                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1315                 return -EINVAL;
1316         }
1317
1318         local_irq_save(flags);
1319
1320         idx = ep->bEndpointAddress & 0x7F;
1321
1322         if (idx == 0) {
1323                 s3c2410_udc_set_ep0_ss(base_addr);
1324                 s3c2410_udc_set_ep0_de_out(base_addr);
1325         } else {
1326                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1327                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1328                                 ? S3C2410_UDC_IN_CSR1_REG
1329                                 : S3C2410_UDC_OUT_CSR1_REG);
1330
1331                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1332                         if (value)
1333                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1334                                         S3C2410_UDC_IN_CSR1_REG);
1335                         else {
1336                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1337                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1338                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1339                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1340                         }
1341                 } else {
1342                         if (value)
1343                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1344                                         S3C2410_UDC_OUT_CSR1_REG);
1345                         else {
1346                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1347                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1348                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1349                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1350                         }
1351                 }
1352         }
1353
1354         ep->halted = value ? 1 : 0;
1355         local_irq_restore(flags);
1356
1357         return 0;
1358 }
1359
1360 static const struct usb_ep_ops s3c2410_ep_ops = {
1361         .enable         = s3c2410_udc_ep_enable,
1362         .disable        = s3c2410_udc_ep_disable,
1363
1364         .alloc_request  = s3c2410_udc_alloc_request,
1365         .free_request   = s3c2410_udc_free_request,
1366
1367         .queue          = s3c2410_udc_queue,
1368         .dequeue        = s3c2410_udc_dequeue,
1369
1370         .set_halt       = s3c2410_udc_set_halt,
1371 };
1372
1373 /*------------------------- usb_gadget_ops ----------------------------------*/
1374
1375 /*
1376  *      s3c2410_udc_get_frame
1377  */
1378 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1379 {
1380         int tmp;
1381
1382         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1383
1384         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1385         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1386         return tmp;
1387 }
1388
1389 /*
1390  *      s3c2410_udc_wakeup
1391  */
1392 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1393 {
1394         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1395         return 0;
1396 }
1397
1398 /*
1399  *      s3c2410_udc_set_selfpowered
1400  */
1401 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1402 {
1403         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1404
1405         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1406
1407         gadget->is_selfpowered = (value != 0);
1408         if (value)
1409                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1410         else
1411                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1412
1413         return 0;
1414 }
1415
1416 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1417 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1418
1419 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1420 {
1421         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1422
1423         if (udc_info && (udc_info->udc_command ||
1424                 gpio_is_valid(udc_info->pullup_pin))) {
1425
1426                 if (is_on)
1427                         s3c2410_udc_enable(udc);
1428                 else {
1429                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1430                                 if (udc->driver && udc->driver->disconnect)
1431                                         udc->driver->disconnect(&udc->gadget);
1432
1433                         }
1434                         s3c2410_udc_disable(udc);
1435                 }
1436         } else {
1437                 return -EOPNOTSUPP;
1438         }
1439
1440         return 0;
1441 }
1442
1443 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1444 {
1445         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1446
1447         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1448
1449         udc->vbus = (is_active != 0);
1450         s3c2410_udc_set_pullup(udc, is_active);
1451         return 0;
1452 }
1453
1454 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1455 {
1456         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1457
1458         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1459
1460         s3c2410_udc_set_pullup(udc, is_on);
1461         return 0;
1462 }
1463
1464 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1465 {
1466         struct s3c2410_udc      *dev = _dev;
1467         unsigned int            value;
1468
1469         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1470
1471         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1472         if (udc_info->vbus_pin_inverted)
1473                 value = !value;
1474
1475         if (value != dev->vbus)
1476                 s3c2410_udc_vbus_session(&dev->gadget, value);
1477
1478         return IRQ_HANDLED;
1479 }
1480
1481 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1482 {
1483         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1484
1485         if (udc_info && udc_info->vbus_draw) {
1486                 udc_info->vbus_draw(ma);
1487                 return 0;
1488         }
1489
1490         return -ENOTSUPP;
1491 }
1492
1493 static int s3c2410_udc_start(struct usb_gadget *g,
1494                 struct usb_gadget_driver *driver);
1495 static int s3c2410_udc_stop(struct usb_gadget *g);
1496
1497 static const struct usb_gadget_ops s3c2410_ops = {
1498         .get_frame              = s3c2410_udc_get_frame,
1499         .wakeup                 = s3c2410_udc_wakeup,
1500         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1501         .pullup                 = s3c2410_udc_pullup,
1502         .vbus_session           = s3c2410_udc_vbus_session,
1503         .vbus_draw              = s3c2410_vbus_draw,
1504         .udc_start              = s3c2410_udc_start,
1505         .udc_stop               = s3c2410_udc_stop,
1506 };
1507
1508 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1509 {
1510         if (!udc_info)
1511                 return;
1512
1513         if (udc_info->udc_command) {
1514                 udc_info->udc_command(cmd);
1515         } else if (gpio_is_valid(udc_info->pullup_pin)) {
1516                 int value;
1517
1518                 switch (cmd) {
1519                 case S3C2410_UDC_P_ENABLE:
1520                         value = 1;
1521                         break;
1522                 case S3C2410_UDC_P_DISABLE:
1523                         value = 0;
1524                         break;
1525                 default:
1526                         return;
1527                 }
1528                 value ^= udc_info->pullup_pin_inverted;
1529
1530                 gpio_set_value(udc_info->pullup_pin, value);
1531         }
1532 }
1533
1534 /*------------------------- gadget driver handling---------------------------*/
1535 /*
1536  * s3c2410_udc_disable
1537  */
1538 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1539 {
1540         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1541
1542         /* Disable all interrupts */
1543         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1544         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1545
1546         /* Clear the interrupt registers */
1547         udc_write(S3C2410_UDC_USBINT_RESET
1548                                 | S3C2410_UDC_USBINT_RESUME
1549                                 | S3C2410_UDC_USBINT_SUSPEND,
1550                         S3C2410_UDC_USB_INT_REG);
1551
1552         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1553
1554         /* Good bye, cruel world */
1555         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1556
1557         /* Set speed to unknown */
1558         dev->gadget.speed = USB_SPEED_UNKNOWN;
1559 }
1560
1561 /*
1562  * s3c2410_udc_reinit
1563  */
1564 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1565 {
1566         u32 i;
1567
1568         /* device/ep0 records init */
1569         INIT_LIST_HEAD(&dev->gadget.ep_list);
1570         INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1571         dev->ep0state = EP0_IDLE;
1572
1573         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1574                 struct s3c2410_ep *ep = &dev->ep[i];
1575
1576                 if (i != 0)
1577                         list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1578
1579                 ep->dev = dev;
1580                 ep->ep.desc = NULL;
1581                 ep->halted = 0;
1582                 INIT_LIST_HEAD(&ep->queue);
1583                 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1584         }
1585 }
1586
1587 /*
1588  * s3c2410_udc_enable
1589  */
1590 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1591 {
1592         int i;
1593
1594         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1595
1596         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1597         dev->gadget.speed = USB_SPEED_FULL;
1598
1599         /* Set MAXP for all endpoints */
1600         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1601                 udc_write(i, S3C2410_UDC_INDEX_REG);
1602                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1603                                 S3C2410_UDC_MAXP_REG);
1604         }
1605
1606         /* Set default power state */
1607         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1608
1609         /* Enable reset and suspend interrupt interrupts */
1610         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1611                         S3C2410_UDC_USB_INT_EN_REG);
1612
1613         /* Enable ep0 interrupt */
1614         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1615
1616         /* time to say "hello, world" */
1617         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1618 }
1619
1620 static int s3c2410_udc_start(struct usb_gadget *g,
1621                 struct usb_gadget_driver *driver)
1622 {
1623         struct s3c2410_udc *udc = to_s3c2410(g);
1624
1625         dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1626
1627         /* Hook the driver */
1628         udc->driver = driver;
1629
1630         /* Enable udc */
1631         s3c2410_udc_enable(udc);
1632
1633         return 0;
1634 }
1635
1636 static int s3c2410_udc_stop(struct usb_gadget *g)
1637 {
1638         struct s3c2410_udc *udc = to_s3c2410(g);
1639
1640         udc->driver = NULL;
1641
1642         /* Disable udc */
1643         s3c2410_udc_disable(udc);
1644
1645         return 0;
1646 }
1647
1648 /*---------------------------------------------------------------------------*/
1649 static struct s3c2410_udc memory = {
1650         .gadget = {
1651                 .ops            = &s3c2410_ops,
1652                 .ep0            = &memory.ep[0].ep,
1653                 .name           = gadget_name,
1654                 .dev = {
1655                         .init_name      = "gadget",
1656                 },
1657         },
1658
1659         /* control endpoint */
1660         .ep[0] = {
1661                 .num            = 0,
1662                 .ep = {
1663                         .name           = ep0name,
1664                         .ops            = &s3c2410_ep_ops,
1665                         .maxpacket      = EP0_FIFO_SIZE,
1666                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1667                                                 USB_EP_CAPS_DIR_ALL),
1668                 },
1669                 .dev            = &memory,
1670         },
1671
1672         /* first group of endpoints */
1673         .ep[1] = {
1674                 .num            = 1,
1675                 .ep = {
1676                         .name           = "ep1-bulk",
1677                         .ops            = &s3c2410_ep_ops,
1678                         .maxpacket      = EP_FIFO_SIZE,
1679                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1680                                                 USB_EP_CAPS_DIR_ALL),
1681                 },
1682                 .dev            = &memory,
1683                 .fifo_size      = EP_FIFO_SIZE,
1684                 .bEndpointAddress = 1,
1685                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1686         },
1687         .ep[2] = {
1688                 .num            = 2,
1689                 .ep = {
1690                         .name           = "ep2-bulk",
1691                         .ops            = &s3c2410_ep_ops,
1692                         .maxpacket      = EP_FIFO_SIZE,
1693                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1694                                                 USB_EP_CAPS_DIR_ALL),
1695                 },
1696                 .dev            = &memory,
1697                 .fifo_size      = EP_FIFO_SIZE,
1698                 .bEndpointAddress = 2,
1699                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1700         },
1701         .ep[3] = {
1702                 .num            = 3,
1703                 .ep = {
1704                         .name           = "ep3-bulk",
1705                         .ops            = &s3c2410_ep_ops,
1706                         .maxpacket      = EP_FIFO_SIZE,
1707                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1708                                                 USB_EP_CAPS_DIR_ALL),
1709                 },
1710                 .dev            = &memory,
1711                 .fifo_size      = EP_FIFO_SIZE,
1712                 .bEndpointAddress = 3,
1713                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1714         },
1715         .ep[4] = {
1716                 .num            = 4,
1717                 .ep = {
1718                         .name           = "ep4-bulk",
1719                         .ops            = &s3c2410_ep_ops,
1720                         .maxpacket      = EP_FIFO_SIZE,
1721                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1722                                                 USB_EP_CAPS_DIR_ALL),
1723                 },
1724                 .dev            = &memory,
1725                 .fifo_size      = EP_FIFO_SIZE,
1726                 .bEndpointAddress = 4,
1727                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1728         }
1729
1730 };
1731
1732 /*
1733  *      probe - binds to the platform device
1734  */
1735 static int s3c2410_udc_probe(struct platform_device *pdev)
1736 {
1737         struct s3c2410_udc *udc = &memory;
1738         struct device *dev = &pdev->dev;
1739         int retval;
1740         int irq;
1741
1742         dev_dbg(dev, "%s()\n", __func__);
1743
1744         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1745         if (IS_ERR(usb_bus_clock)) {
1746                 dev_err(dev, "failed to get usb bus clock source\n");
1747                 return PTR_ERR(usb_bus_clock);
1748         }
1749
1750         clk_prepare_enable(usb_bus_clock);
1751
1752         udc_clock = clk_get(NULL, "usb-device");
1753         if (IS_ERR(udc_clock)) {
1754                 dev_err(dev, "failed to get udc clock source\n");
1755                 return PTR_ERR(udc_clock);
1756         }
1757
1758         clk_prepare_enable(udc_clock);
1759
1760         mdelay(10);
1761
1762         dev_dbg(dev, "got and enabled clocks\n");
1763
1764         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1765                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1766                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1767                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1768                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1769                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1770         }
1771
1772         spin_lock_init(&udc->lock);
1773         udc_info = dev_get_platdata(&pdev->dev);
1774
1775         base_addr = devm_platform_ioremap_resource(pdev, 0);
1776         if (!base_addr) {
1777                 retval = -ENOMEM;
1778                 goto err_mem;
1779         }
1780
1781         the_controller = udc;
1782         platform_set_drvdata(pdev, udc);
1783
1784         s3c2410_udc_disable(udc);
1785         s3c2410_udc_reinit(udc);
1786
1787         irq_usbd = platform_get_irq(pdev, 0);
1788
1789         /* irq setup after old hardware state is cleaned up */
1790         retval = request_irq(irq_usbd, s3c2410_udc_irq,
1791                              0, gadget_name, udc);
1792
1793         if (retval != 0) {
1794                 dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval);
1795                 retval = -EBUSY;
1796                 goto err_map;
1797         }
1798
1799         dev_dbg(dev, "got irq %i\n", irq_usbd);
1800
1801         if (udc_info && udc_info->vbus_pin > 0) {
1802                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1803                 if (retval < 0) {
1804                         dev_err(dev, "cannot claim vbus pin\n");
1805                         goto err_int;
1806                 }
1807
1808                 irq = gpio_to_irq(udc_info->vbus_pin);
1809                 if (irq < 0) {
1810                         dev_err(dev, "no irq for gpio vbus pin\n");
1811                         retval = irq;
1812                         goto err_gpio_claim;
1813                 }
1814
1815                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1816                                      IRQF_TRIGGER_RISING
1817                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1818                                      gadget_name, udc);
1819
1820                 if (retval != 0) {
1821                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1822                                 irq, retval);
1823                         retval = -EBUSY;
1824                         goto err_gpio_claim;
1825                 }
1826
1827                 dev_dbg(dev, "got irq %i\n", irq);
1828         } else {
1829                 udc->vbus = 1;
1830         }
1831
1832         if (udc_info && !udc_info->udc_command &&
1833                 gpio_is_valid(udc_info->pullup_pin)) {
1834
1835                 retval = gpio_request_one(udc_info->pullup_pin,
1836                                 udc_info->vbus_pin_inverted ?
1837                                 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1838                                 "udc pullup");
1839                 if (retval)
1840                         goto err_vbus_irq;
1841         }
1842
1843         retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1844         if (retval)
1845                 goto err_add_udc;
1846
1847         udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1848                                              s3c2410_udc_debugfs_root, udc,
1849                                              &s3c2410_udc_debugfs_fops);
1850
1851         dev_dbg(dev, "probe ok\n");
1852
1853         return 0;
1854
1855 err_add_udc:
1856         if (udc_info && !udc_info->udc_command &&
1857                         gpio_is_valid(udc_info->pullup_pin))
1858                 gpio_free(udc_info->pullup_pin);
1859 err_vbus_irq:
1860         if (udc_info && udc_info->vbus_pin > 0)
1861                 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1862 err_gpio_claim:
1863         if (udc_info && udc_info->vbus_pin > 0)
1864                 gpio_free(udc_info->vbus_pin);
1865 err_int:
1866         free_irq(irq_usbd, udc);
1867 err_map:
1868         iounmap(base_addr);
1869 err_mem:
1870         release_mem_region(rsrc_start, rsrc_len);
1871
1872         return retval;
1873 }
1874
1875 /*
1876  *      s3c2410_udc_remove
1877  */
1878 static int s3c2410_udc_remove(struct platform_device *pdev)
1879 {
1880         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1881         unsigned int irq;
1882
1883         dev_dbg(&pdev->dev, "%s()\n", __func__);
1884
1885         if (udc->driver)
1886                 return -EBUSY;
1887
1888         usb_del_gadget_udc(&udc->gadget);
1889         debugfs_remove(udc->regs_info);
1890
1891         if (udc_info && !udc_info->udc_command &&
1892                 gpio_is_valid(udc_info->pullup_pin))
1893                 gpio_free(udc_info->pullup_pin);
1894
1895         if (udc_info && udc_info->vbus_pin > 0) {
1896                 irq = gpio_to_irq(udc_info->vbus_pin);
1897                 free_irq(irq, udc);
1898         }
1899
1900         free_irq(irq_usbd, udc);
1901
1902         iounmap(base_addr);
1903         release_mem_region(rsrc_start, rsrc_len);
1904
1905         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1906                 clk_disable_unprepare(udc_clock);
1907                 clk_put(udc_clock);
1908                 udc_clock = NULL;
1909         }
1910
1911         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1912                 clk_disable_unprepare(usb_bus_clock);
1913                 clk_put(usb_bus_clock);
1914                 usb_bus_clock = NULL;
1915         }
1916
1917         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1918         return 0;
1919 }
1920
1921 #ifdef CONFIG_PM
1922 static int
1923 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1924 {
1925         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1926
1927         return 0;
1928 }
1929
1930 static int s3c2410_udc_resume(struct platform_device *pdev)
1931 {
1932         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1933
1934         return 0;
1935 }
1936 #else
1937 #define s3c2410_udc_suspend     NULL
1938 #define s3c2410_udc_resume      NULL
1939 #endif
1940
1941 static const struct platform_device_id s3c_udc_ids[] = {
1942         { "s3c2410-usbgadget", },
1943         { "s3c2440-usbgadget", },
1944         { }
1945 };
1946 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1947
1948 static struct platform_driver udc_driver_24x0 = {
1949         .driver         = {
1950                 .name   = "s3c24x0-usbgadget",
1951         },
1952         .probe          = s3c2410_udc_probe,
1953         .remove         = s3c2410_udc_remove,
1954         .suspend        = s3c2410_udc_suspend,
1955         .resume         = s3c2410_udc_resume,
1956         .id_table       = s3c_udc_ids,
1957 };
1958
1959 static int __init udc_init(void)
1960 {
1961         int retval;
1962
1963         dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1964
1965         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name,
1966                                                       usb_debug_root);
1967
1968         retval = platform_driver_register(&udc_driver_24x0);
1969         if (retval)
1970                 goto err;
1971
1972         return 0;
1973
1974 err:
1975         debugfs_remove(s3c2410_udc_debugfs_root);
1976         return retval;
1977 }
1978
1979 static void __exit udc_exit(void)
1980 {
1981         platform_driver_unregister(&udc_driver_24x0);
1982         debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1983 }
1984
1985 module_init(udc_init);
1986 module_exit(udc_exit);
1987
1988 MODULE_AUTHOR(DRIVER_AUTHOR);
1989 MODULE_DESCRIPTION(DRIVER_DESC);
1990 MODULE_LICENSE("GPL");