drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * Written by:
  16  * Dmitry Eremin-Solenikov <[email protected]>
  17  * Alexander Smirnov <[email protected]>
  18  * Alexander Aring <[email protected]>
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/hrtimer.h>
  23 #include <linux/jiffies.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/irq.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/spi/spi.h>
  29 #include <linux/spi/at86rf230.h>
  30 #include <linux/regmap.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/of_gpio.h>
  33 #include <linux/ieee802154.h>
  34
  35 #include <net/mac802154.h>
  36 #include <net/cfg802154.h>
  37
  38 struct at86rf230_local;
  39 /* at86rf2xx chip depend data.
  40  * All timings are in us.
  41  */
  42 struct at86rf2xx_chip_data {
  43         u16 t_sleep_cycle;
  44         u16 t_channel_switch;
  45         u16 t_reset_to_off;
  46         u16 t_off_to_aack;
  47         u16 t_off_to_tx_on;
  48         u16 t_frame;
  49         u16 t_p_ack;
  50         int rssi_base_val;
  51
  52         int (*set_channel)(struct at86rf230_local *, u8, u8);
  53         int (*get_desense_steps)(struct at86rf230_local *, s32);
  54 };
  55
  56 #define AT86RF2XX_MAX_BUF               (127 + 3)
  57 /* tx retries to access the TX_ON state
  58  * if it's above then force change will be started.
  59  *
  60  * We assume the max_frame_retries (7) value of 802.15.4 here.
  61  */
  62 #define AT86RF2XX_MAX_TX_RETRIES        7
  63 /* We use the recommended 5 minutes timeout to recalibrate */
  64 #define AT86RF2XX_CAL_LOOP_TIMEOUT      (5 * 60 * HZ)
  65
  66 struct at86rf230_state_change {
  67         struct at86rf230_local *lp;
  68         int irq;
  69
  70         struct hrtimer timer;
  71         struct spi_message msg;
  72         struct spi_transfer trx;
  73         u8 buf[AT86RF2XX_MAX_BUF];
  74
  75         void (*complete)(void *context);
  76         u8 from_state;
  77         u8 to_state;
  78
  79         bool irq_enable;
  80 };
  81
  82 struct at86rf230_local {
  83         struct spi_device *spi;
  84
  85         struct ieee802154_hw *hw;
  86         struct at86rf2xx_chip_data *data;
  87         struct regmap *regmap;
  88
  89         struct completion state_complete;
  90         struct at86rf230_state_change state;
  91
  92         struct at86rf230_state_change irq;
  93
  94         bool tx_aret;
  95         unsigned long cal_timeout;
  96         s8 max_frame_retries;
  97         bool is_tx;
  98         u8 tx_retry;
  99         struct sk_buff *tx_skb;
 100         struct at86rf230_state_change tx;
 101 };
 102
 103 #define RG_TRX_STATUS   (0x01)
 104 #define SR_TRX_STATUS           0x01, 0x1f, 0
 105 #define SR_RESERVED_01_3        0x01, 0x20, 5
 106 #define SR_CCA_STATUS           0x01, 0x40, 6
 107 #define SR_CCA_DONE             0x01, 0x80, 7
 108 #define RG_TRX_STATE    (0x02)
 109 #define SR_TRX_CMD              0x02, 0x1f, 0
 110 #define SR_TRAC_STATUS          0x02, 0xe0, 5
 111 #define RG_TRX_CTRL_0   (0x03)
 112 #define SR_CLKM_CTRL            0x03, 0x07, 0
 113 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
 114 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
 115 #define SR_PAD_IO               0x03, 0xc0, 6
 116 #define RG_TRX_CTRL_1   (0x04)
 117 #define SR_IRQ_POLARITY         0x04, 0x01, 0
 118 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
 119 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
 120 #define SR_RX_BL_CTRL           0x04, 0x10, 4
 121 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
 122 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
 123 #define SR_PA_EXT_EN            0x04, 0x80, 7
 124 #define RG_PHY_TX_PWR   (0x05)
 125 #define SR_TX_PWR               0x05, 0x0f, 0
 126 #define SR_PA_LT                0x05, 0x30, 4
 127 #define SR_PA_BUF_LT            0x05, 0xc0, 6
 128 #define RG_PHY_RSSI     (0x06)
 129 #define SR_RSSI                 0x06, 0x1f, 0
 130 #define SR_RND_VALUE            0x06, 0x60, 5
 131 #define SR_RX_CRC_VALID         0x06, 0x80, 7
 132 #define RG_PHY_ED_LEVEL (0x07)
 133 #define SR_ED_LEVEL             0x07, 0xff, 0
 134 #define RG_PHY_CC_CCA   (0x08)
 135 #define SR_CHANNEL              0x08, 0x1f, 0
 136 #define SR_CCA_MODE             0x08, 0x60, 5
 137 #define SR_CCA_REQUEST          0x08, 0x80, 7
 138 #define RG_CCA_THRES    (0x09)
 139 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 140 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 141 #define RG_RX_CTRL      (0x0a)
 142 #define SR_PDT_THRES            0x0a, 0x0f, 0
 143 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 144 #define RG_SFD_VALUE    (0x0b)
 145 #define SR_SFD_VALUE            0x0b, 0xff, 0
 146 #define RG_TRX_CTRL_2   (0x0c)
 147 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 148 #define SR_SUB_MODE             0x0c, 0x04, 2
 149 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 150 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 151 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 152 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 153 #define RG_ANT_DIV      (0x0d)
 154 #define SR_ANT_CTRL             0x0d, 0x03, 0
 155 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 156 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 157 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 158 #define SR_ANT_SEL              0x0d, 0x80, 7
 159 #define RG_IRQ_MASK     (0x0e)
 160 #define SR_IRQ_MASK             0x0e, 0xff, 0
 161 #define RG_IRQ_STATUS   (0x0f)
 162 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 163 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 164 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 165 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 166 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 167 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 168 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 169 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 170 #define RG_VREG_CTRL    (0x10)
 171 #define SR_RESERVED_10_6        0x10, 0x03, 0
 172 #define SR_DVDD_OK              0x10, 0x04, 2
 173 #define SR_DVREG_EXT            0x10, 0x08, 3
 174 #define SR_RESERVED_10_3        0x10, 0x30, 4
 175 #define SR_AVDD_OK              0x10, 0x40, 6
 176 #define SR_AVREG_EXT            0x10, 0x80, 7
 177 #define RG_BATMON       (0x11)
 178 #define SR_BATMON_VTH           0x11, 0x0f, 0
 179 #define SR_BATMON_HR            0x11, 0x10, 4
 180 #define SR_BATMON_OK            0x11, 0x20, 5
 181 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 182 #define RG_XOSC_CTRL    (0x12)
 183 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 184 #define SR_XTAL_MODE            0x12, 0xf0, 4
 185 #define RG_RX_SYN       (0x15)
 186 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 187 #define SR_RESERVED_15_2        0x15, 0x70, 4
 188 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 189 #define RG_XAH_CTRL_1   (0x17)
 190 #define SR_RESERVED_17_8        0x17, 0x01, 0
 191 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 192 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 193 #define SR_RESERVED_17_5        0x17, 0x08, 3
 194 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 195 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 196 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 197 #define SR_RESERVED_17_1        0x17, 0x80, 7
 198 #define RG_FTN_CTRL     (0x18)
 199 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 200 #define SR_FTN_START            0x18, 0x80, 7
 201 #define RG_PLL_CF       (0x1a)
 202 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 203 #define SR_PLL_CF_START         0x1a, 0x80, 7
 204 #define RG_PLL_DCU      (0x1b)
 205 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 206 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 207 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 208 #define RG_PART_NUM     (0x1c)
 209 #define SR_PART_NUM             0x1c, 0xff, 0
 210 #define RG_VERSION_NUM  (0x1d)
 211 #define SR_VERSION_NUM          0x1d, 0xff, 0
 212 #define RG_MAN_ID_0     (0x1e)
 213 #define SR_MAN_ID_0             0x1e, 0xff, 0
 214 #define RG_MAN_ID_1     (0x1f)
 215 #define SR_MAN_ID_1             0x1f, 0xff, 0
 216 #define RG_SHORT_ADDR_0 (0x20)
 217 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 218 #define RG_SHORT_ADDR_1 (0x21)
 219 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 220 #define RG_PAN_ID_0     (0x22)
 221 #define SR_PAN_ID_0             0x22, 0xff, 0
 222 #define RG_PAN_ID_1     (0x23)
 223 #define SR_PAN_ID_1             0x23, 0xff, 0
 224 #define RG_IEEE_ADDR_0  (0x24)
 225 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 226 #define RG_IEEE_ADDR_1  (0x25)
 227 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 228 #define RG_IEEE_ADDR_2  (0x26)
 229 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 230 #define RG_IEEE_ADDR_3  (0x27)
 231 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 232 #define RG_IEEE_ADDR_4  (0x28)
 233 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 234 #define RG_IEEE_ADDR_5  (0x29)
 235 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 236 #define RG_IEEE_ADDR_6  (0x2a)
 237 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 238 #define RG_IEEE_ADDR_7  (0x2b)
 239 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 240 #define RG_XAH_CTRL_0   (0x2c)
 241 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 242 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 243 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 244 #define RG_CSMA_SEED_0  (0x2d)
 245 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 246 #define RG_CSMA_SEED_1  (0x2e)
 247 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 248 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 249 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 250 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 251 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 252 #define RG_CSMA_BE      (0x2f)
 253 #define SR_MIN_BE               0x2f, 0x0f, 0
 254 #define SR_MAX_BE               0x2f, 0xf0, 4
 255
 256 #define CMD_REG         0x80
 257 #define CMD_REG_MASK    0x3f
 258 #define CMD_WRITE       0x40
 259 #define CMD_FB          0x20
 260
 261 #define IRQ_BAT_LOW     (1 << 7)
 262 #define IRQ_TRX_UR      (1 << 6)
 263 #define IRQ_AMI         (1 << 5)
 264 #define IRQ_CCA_ED      (1 << 4)
 265 #define IRQ_TRX_END     (1 << 3)
 266 #define IRQ_RX_START    (1 << 2)
 267 #define IRQ_PLL_UNL     (1 << 1)
 268 #define IRQ_PLL_LOCK    (1 << 0)
 269
 270 #define IRQ_ACTIVE_HIGH 0
 271 #define IRQ_ACTIVE_LOW  1
 272
 273 #define STATE_P_ON              0x00    /* BUSY */
 274 #define STATE_BUSY_RX           0x01
 275 #define STATE_BUSY_TX           0x02
 276 #define STATE_FORCE_TRX_OFF     0x03
 277 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 278 /* 0x05 */                              /* INVALID_PARAMETER */
 279 #define STATE_RX_ON             0x06
 280 /* 0x07 */                              /* SUCCESS */
 281 #define STATE_TRX_OFF           0x08
 282 #define STATE_TX_ON             0x09
 283 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 284 #define STATE_SLEEP             0x0F
 285 #define STATE_PREP_DEEP_SLEEP   0x10
 286 #define STATE_BUSY_RX_AACK      0x11
 287 #define STATE_BUSY_TX_ARET      0x12
 288 #define STATE_RX_AACK_ON        0x16
 289 #define STATE_TX_ARET_ON        0x19
 290 #define STATE_RX_ON_NOCLK       0x1C
 291 #define STATE_RX_AACK_ON_NOCLK  0x1D
 292 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 293 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 294
 295 #define TRX_STATE_MASK          (0x1F)
 296
 297 #define AT86RF2XX_NUMREGS 0x3F
 298
 299 static void
 300 at86rf230_async_state_change(struct at86rf230_local *lp,
 301                              struct at86rf230_state_change *ctx,
 302                              const u8 state, void (*complete)(void *context),
 303                              const bool irq_enable);
 304
 305 static inline int
 306 __at86rf230_write(struct at86rf230_local *lp,
 307                   unsigned int addr, unsigned int data)
 308 {
 309         return regmap_write(lp->regmap, addr, data);
 310 }
 311
 312 static inline int
 313 __at86rf230_read(struct at86rf230_local *lp,
 314                  unsigned int addr, unsigned int *data)
 315 {
 316         return regmap_read(lp->regmap, addr, data);
 317 }
 318
 319 static inline int
 320 at86rf230_read_subreg(struct at86rf230_local *lp,
 321                       unsigned int addr, unsigned int mask,
 322                       unsigned int shift, unsigned int *data)
 323 {
 324         int rc;
 325
 326         rc = __at86rf230_read(lp, addr, data);
 327         if (!rc)
 328                 *data = (*data & mask) >> shift;
 329
 330         return rc;
 331 }
 332
 333 static inline int
 334 at86rf230_write_subreg(struct at86rf230_local *lp,
 335                        unsigned int addr, unsigned int mask,
 336                        unsigned int shift, unsigned int data)
 337 {
 338         return regmap_update_bits(lp->regmap, addr, mask, data << shift);
 339 }
 340
 341 static bool
 342 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
 343 {
 344         switch (reg) {
 345         case RG_TRX_STATE:
 346         case RG_TRX_CTRL_0:
 347         case RG_TRX_CTRL_1:
 348         case RG_PHY_TX_PWR:
 349         case RG_PHY_ED_LEVEL:
 350         case RG_PHY_CC_CCA:
 351         case RG_CCA_THRES:
 352         case RG_RX_CTRL:
 353         case RG_SFD_VALUE:
 354         case RG_TRX_CTRL_2:
 355         case RG_ANT_DIV:
 356         case RG_IRQ_MASK:
 357         case RG_VREG_CTRL:
 358         case RG_BATMON:
 359         case RG_XOSC_CTRL:
 360         case RG_RX_SYN:
 361         case RG_XAH_CTRL_1:
 362         case RG_FTN_CTRL:
 363         case RG_PLL_CF:
 364         case RG_PLL_DCU:
 365         case RG_SHORT_ADDR_0:
 366         case RG_SHORT_ADDR_1:
 367         case RG_PAN_ID_0:
 368         case RG_PAN_ID_1:
 369         case RG_IEEE_ADDR_0:
 370         case RG_IEEE_ADDR_1:
 371         case RG_IEEE_ADDR_2:
 372         case RG_IEEE_ADDR_3:
 373         case RG_IEEE_ADDR_4:
 374         case RG_IEEE_ADDR_5:
 375         case RG_IEEE_ADDR_6:
 376         case RG_IEEE_ADDR_7:
 377         case RG_XAH_CTRL_0:
 378         case RG_CSMA_SEED_0:
 379         case RG_CSMA_SEED_1:
 380         case RG_CSMA_BE:
 381                 return true;
 382         default:
 383                 return false;
 384         }
 385 }
 386
 387 static bool
 388 at86rf230_reg_readable(struct device *dev, unsigned int reg)
 389 {
 390         bool rc;
 391
 392         /* all writeable are also readable */
 393         rc = at86rf230_reg_writeable(dev, reg);
 394         if (rc)
 395                 return rc;
 396
 397         /* readonly regs */
 398         switch (reg) {
 399         case RG_TRX_STATUS:
 400         case RG_PHY_RSSI:
 401         case RG_IRQ_STATUS:
 402         case RG_PART_NUM:
 403         case RG_VERSION_NUM:
 404         case RG_MAN_ID_1:
 405         case RG_MAN_ID_0:
 406                 return true;
 407         default:
 408                 return false;
 409         }
 410 }
 411
 412 static bool
 413 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
 414 {
 415         /* can be changed during runtime */
 416         switch (reg) {
 417         case RG_TRX_STATUS:
 418         case RG_TRX_STATE:
 419         case RG_PHY_RSSI:
 420         case RG_PHY_ED_LEVEL:
 421         case RG_IRQ_STATUS:
 422         case RG_VREG_CTRL:
 423         case RG_PLL_CF:
 424         case RG_PLL_DCU:
 425                 return true;
 426         default:
 427                 return false;
 428         }
 429 }
 430
 431 static bool
 432 at86rf230_reg_precious(struct device *dev, unsigned int reg)
 433 {
 434         /* don't clear irq line on read */
 435         switch (reg) {
 436         case RG_IRQ_STATUS:
 437                 return true;
 438         default:
 439                 return false;
 440         }
 441 }
 442
 443 static const struct regmap_config at86rf230_regmap_spi_config = {
 444         .reg_bits = 8,
 445         .val_bits = 8,
 446         .write_flag_mask = CMD_REG | CMD_WRITE,
 447         .read_flag_mask = CMD_REG,
 448         .cache_type = REGCACHE_RBTREE,
 449         .max_register = AT86RF2XX_NUMREGS,
 450         .writeable_reg = at86rf230_reg_writeable,
 451         .readable_reg = at86rf230_reg_readable,
 452         .volatile_reg = at86rf230_reg_volatile,
 453         .precious_reg = at86rf230_reg_precious,
 454 };
 455
 456 static void
 457 at86rf230_async_error_recover(void *context)
 458 {
 459         struct at86rf230_state_change *ctx = context;
 460         struct at86rf230_local *lp = ctx->lp;
 461
 462         lp->is_tx = 0;
 463         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
 464         ieee802154_wake_queue(lp->hw);
 465 }
 466
 467 static inline void
 468 at86rf230_async_error(struct at86rf230_local *lp,
 469                       struct at86rf230_state_change *ctx, int rc)
 470 {
 471         dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
 472
 473         at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 474                                      at86rf230_async_error_recover, false);
 475 }
 476
 477 /* Generic function to get some register value in async mode */
 478 static void
 479 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
 480                          struct at86rf230_state_change *ctx,
 481                          void (*complete)(void *context),
 482                          const bool irq_enable)
 483 {
 484         int rc;
 485
 486         u8 *tx_buf = ctx->buf;
 487
 488         tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 489         ctx->msg.complete = complete;
 490         ctx->irq_enable = irq_enable;
 491         rc = spi_async(lp->spi, &ctx->msg);
 492         if (rc) {
 493                 if (irq_enable)
 494                         enable_irq(ctx->irq);
 495
 496                 at86rf230_async_error(lp, ctx, rc);
 497         }
 498 }
 499
 500 static inline u8 at86rf230_state_to_force(u8 state)
 501 {
 502         if (state == STATE_TX_ON)
 503                 return STATE_FORCE_TX_ON;
 504         else
 505                 return STATE_FORCE_TRX_OFF;
 506 }
 507
 508 static void
 509 at86rf230_async_state_assert(void *context)
 510 {
 511         struct at86rf230_state_change *ctx = context;
 512         struct at86rf230_local *lp = ctx->lp;
 513         const u8 *buf = ctx->buf;
 514         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 515
 516         /* Assert state change */
 517         if (trx_state != ctx->to_state) {
 518                 /* Special handling if transceiver state is in
 519                  * STATE_BUSY_RX_AACK and a SHR was detected.
 520                  */
 521                 if  (trx_state == STATE_BUSY_RX_AACK) {
 522                         /* Undocumented race condition. If we send a state
 523                          * change to STATE_RX_AACK_ON the transceiver could
 524                          * change his state automatically to STATE_BUSY_RX_AACK
 525                          * if a SHR was detected. This is not an error, but we
 526                          * can't assert this.
 527                          */
 528                         if (ctx->to_state == STATE_RX_AACK_ON)
 529                                 goto done;
 530
 531                         /* If we change to STATE_TX_ON without forcing and
 532                          * transceiver state is STATE_BUSY_RX_AACK, we wait
 533                          * 'tFrame + tPAck' receiving time. In this time the
 534                          * PDU should be received. If the transceiver is still
 535                          * in STATE_BUSY_RX_AACK, we run a force state change
 536                          * to STATE_TX_ON. This is a timeout handling, if the
 537                          * transceiver stucks in STATE_BUSY_RX_AACK.
 538                          *
 539                          * Additional we do several retries to try to get into
 540                          * TX_ON state without forcing. If the retries are
 541                          * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
 542                          * will do a force change.
 543                          */
 544                         if (ctx->to_state == STATE_TX_ON ||
 545                             ctx->to_state == STATE_TRX_OFF) {
 546                                 u8 state = ctx->to_state;
 547
 548                                 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
 549                                         state = at86rf230_state_to_force(state);
 550                                 lp->tx_retry++;
 551
 552                                 at86rf230_async_state_change(lp, ctx, state,
 553                                                              ctx->complete,
 554                                                              ctx->irq_enable);
 555                                 return;
 556                         }
 557                 }
 558
 559                 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
 560                          ctx->from_state, ctx->to_state, trx_state);
 561         }
 562
 563 done:
 564         if (ctx->complete)
 565                 ctx->complete(context);
 566 }
 567
 568 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
 569 {
 570         struct at86rf230_state_change *ctx =
 571                 container_of(timer, struct at86rf230_state_change, timer);
 572         struct at86rf230_local *lp = ctx->lp;
 573
 574         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 575                                  at86rf230_async_state_assert,
 576                                  ctx->irq_enable);
 577
 578         return HRTIMER_NORESTART;
 579 }
 580
 581 /* Do state change timing delay. */
 582 static void
 583 at86rf230_async_state_delay(void *context)
 584 {
 585         struct at86rf230_state_change *ctx = context;
 586         struct at86rf230_local *lp = ctx->lp;
 587         struct at86rf2xx_chip_data *c = lp->data;
 588         bool force = false;
 589         ktime_t tim;
 590
 591         /* The force state changes are will show as normal states in the
 592          * state status subregister. We change the to_state to the
 593          * corresponding one and remember if it was a force change, this
 594          * differs if we do a state change from STATE_BUSY_RX_AACK.
 595          */
 596         switch (ctx->to_state) {
 597         case STATE_FORCE_TX_ON:
 598                 ctx->to_state = STATE_TX_ON;
 599                 force = true;
 600                 break;
 601         case STATE_FORCE_TRX_OFF:
 602                 ctx->to_state = STATE_TRX_OFF;
 603                 force = true;
 604                 break;
 605         default:
 606                 break;
 607         }
 608
 609         switch (ctx->from_state) {
 610         case STATE_TRX_OFF:
 611                 switch (ctx->to_state) {
 612                 case STATE_RX_AACK_ON:
 613                         tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
 614                         /* state change from TRX_OFF to RX_AACK_ON to do a
 615                          * calibration, we need to reset the timeout for the
 616                          * next one.
 617                          */
 618                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 619                         goto change;
 620                 case STATE_TX_ON:
 621                         tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
 622                         /* state change from TRX_OFF to TX_ON to do a
 623                          * calibration, we need to reset the timeout for the
 624                          * next one.
 625                          */
 626                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 627                         goto change;
 628                 default:
 629                         break;
 630                 }
 631                 break;
 632         case STATE_BUSY_RX_AACK:
 633                 switch (ctx->to_state) {
 634                 case STATE_TRX_OFF:
 635                 case STATE_TX_ON:
 636                         /* Wait for worst case receiving time if we
 637                          * didn't make a force change from BUSY_RX_AACK
 638                          * to TX_ON or TRX_OFF.
 639                          */
 640                         if (!force) {
 641                                 tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
 642                                                    NSEC_PER_USEC);
 643                                 goto change;
 644                         }
 645                         break;
 646                 default:
 647                         break;
 648                 }
 649                 break;
 650         /* Default value, means RESET state */
 651         case STATE_P_ON:
 652                 switch (ctx->to_state) {
 653                 case STATE_TRX_OFF:
 654                         tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
 655                         goto change;
 656                 default:
 657                         break;
 658                 }
 659                 break;
 660         default:
 661                 break;
 662         }
 663
 664         /* Default delay is 1us in the most cases */
 665         tim = ktime_set(0, NSEC_PER_USEC);
 666
 667 change:
 668         hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
 669 }
 670
 671 static void
 672 at86rf230_async_state_change_start(void *context)
 673 {
 674         struct at86rf230_state_change *ctx = context;
 675         struct at86rf230_local *lp = ctx->lp;
 676         u8 *buf = ctx->buf;
 677         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 678         int rc;
 679
 680         /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
 681         if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
 682                 udelay(1);
 683                 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 684                                          at86rf230_async_state_change_start,
 685                                          ctx->irq_enable);
 686                 return;
 687         }
 688
 689         /* Check if we already are in the state which we change in */
 690         if (trx_state == ctx->to_state) {
 691                 if (ctx->complete)
 692                         ctx->complete(context);
 693                 return;
 694         }
 695
 696         /* Set current state to the context of state change */
 697         ctx->from_state = trx_state;
 698
 699         /* Going into the next step for a state change which do a timing
 700          * relevant delay.
 701          */
 702         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 703         buf[1] = ctx->to_state;
 704         ctx->msg.complete = at86rf230_async_state_delay;
 705         rc = spi_async(lp->spi, &ctx->msg);
 706         if (rc) {
 707                 if (ctx->irq_enable)
 708                         enable_irq(ctx->irq);
 709
 710                 at86rf230_async_error(lp, ctx, rc);
 711         }
 712 }
 713
 714 static void
 715 at86rf230_async_state_change(struct at86rf230_local *lp,
 716                              struct at86rf230_state_change *ctx,
 717                              const u8 state, void (*complete)(void *context),
 718                              const bool irq_enable)
 719 {
 720         /* Initialization for the state change context */
 721         ctx->to_state = state;
 722         ctx->complete = complete;
 723         ctx->irq_enable = irq_enable;
 724         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 725                                  at86rf230_async_state_change_start,
 726                                  irq_enable);
 727 }
 728
 729 static void
 730 at86rf230_sync_state_change_complete(void *context)
 731 {
 732         struct at86rf230_state_change *ctx = context;
 733         struct at86rf230_local *lp = ctx->lp;
 734
 735         complete(&lp->state_complete);
 736 }
 737
 738 /* This function do a sync framework above the async state change.
 739  * Some callbacks of the IEEE 802.15.4 driver interface need to be
 740  * handled synchronously.
 741  */
 742 static int
 743 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
 744 {
 745         unsigned long rc;
 746
 747         at86rf230_async_state_change(lp, &lp->state, state,
 748                                      at86rf230_sync_state_change_complete,
 749                                      false);
 750
 751         rc = wait_for_completion_timeout(&lp->state_complete,
 752                                          msecs_to_jiffies(100));
 753         if (!rc) {
 754                 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
 755                 return -ETIMEDOUT;
 756         }
 757
 758         return 0;
 759 }
 760
 761 static void
 762 at86rf230_tx_complete(void *context)
 763 {
 764         struct at86rf230_state_change *ctx = context;
 765         struct at86rf230_local *lp = ctx->lp;
 766
 767         enable_irq(ctx->irq);
 768
 769         ieee802154_xmit_complete(lp->hw, lp->tx_skb, !lp->tx_aret);
 770 }
 771
 772 static void
 773 at86rf230_tx_on(void *context)
 774 {
 775         struct at86rf230_state_change *ctx = context;
 776         struct at86rf230_local *lp = ctx->lp;
 777
 778         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
 779                                      at86rf230_tx_complete, true);
 780 }
 781
 782 static void
 783 at86rf230_tx_trac_error(void *context)
 784 {
 785         struct at86rf230_state_change *ctx = context;
 786         struct at86rf230_local *lp = ctx->lp;
 787
 788         at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
 789                                      at86rf230_tx_on, true);
 790 }
 791
 792 static void
 793 at86rf230_tx_trac_check(void *context)
 794 {
 795         struct at86rf230_state_change *ctx = context;
 796         struct at86rf230_local *lp = ctx->lp;
 797         const u8 *buf = ctx->buf;
 798         const u8 trac = (buf[1] & 0xe0) >> 5;
 799
 800         /* If trac status is different than zero we need to do a state change
 801          * to STATE_FORCE_TRX_OFF then STATE_TX_ON to recover the transceiver
 802          * state to TX_ON.
 803          */
 804         if (trac)
 805                 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 806                                              at86rf230_tx_trac_error, true);
 807         else
 808                 at86rf230_tx_on(context);
 809 }
 810
 811 static void
 812 at86rf230_tx_trac_status(void *context)
 813 {
 814         struct at86rf230_state_change *ctx = context;
 815         struct at86rf230_local *lp = ctx->lp;
 816
 817         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
 818                                  at86rf230_tx_trac_check, true);
 819 }
 820
 821 static void
 822 at86rf230_rx_read_frame_complete(void *context)
 823 {
 824         struct at86rf230_state_change *ctx = context;
 825         struct at86rf230_local *lp = ctx->lp;
 826         u8 rx_local_buf[AT86RF2XX_MAX_BUF];
 827         const u8 *buf = ctx->buf;
 828         struct sk_buff *skb;
 829         u8 len, lqi;
 830
 831         len = buf[1];
 832         if (!ieee802154_is_valid_psdu_len(len)) {
 833                 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
 834                 len = IEEE802154_MTU;
 835         }
 836         lqi = buf[2 + len];
 837
 838         memcpy(rx_local_buf, buf + 2, len);
 839         ctx->trx.len = 2;
 840         enable_irq(ctx->irq);
 841
 842         skb = dev_alloc_skb(IEEE802154_MTU);
 843         if (!skb) {
 844                 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
 845                 return;
 846         }
 847
 848         memcpy(skb_put(skb, len), rx_local_buf, len);
 849         ieee802154_rx_irqsafe(lp->hw, skb, lqi);
 850 }
 851
 852 static void
 853 at86rf230_rx_read_frame(void *context)
 854 {
 855         struct at86rf230_state_change *ctx = context;
 856         struct at86rf230_local *lp = ctx->lp;
 857         u8 *buf = ctx->buf;
 858         int rc;
 859
 860         buf[0] = CMD_FB;
 861         ctx->trx.len = AT86RF2XX_MAX_BUF;
 862         ctx->msg.complete = at86rf230_rx_read_frame_complete;
 863         rc = spi_async(lp->spi, &ctx->msg);
 864         if (rc) {
 865                 ctx->trx.len = 2;
 866                 enable_irq(ctx->irq);
 867                 at86rf230_async_error(lp, ctx, rc);
 868         }
 869 }
 870
 871 static void
 872 at86rf230_rx_trac_check(void *context)
 873 {
 874         /* Possible check on trac status here. This could be useful to make
 875          * some stats why receive is failed. Not used at the moment, but it's
 876          * maybe timing relevant. Datasheet doesn't say anything about this.
 877          * The programming guide say do it so.
 878          */
 879
 880         at86rf230_rx_read_frame(context);
 881 }
 882
 883 static void
 884 at86rf230_irq_trx_end(struct at86rf230_local *lp)
 885 {
 886         if (lp->is_tx) {
 887                 lp->is_tx = 0;
 888
 889                 if (lp->tx_aret)
 890                         at86rf230_async_state_change(lp, &lp->irq,
 891                                                      STATE_FORCE_TX_ON,
 892                                                      at86rf230_tx_trac_status,
 893                                                      true);
 894                 else
 895                         at86rf230_async_state_change(lp, &lp->irq,
 896                                                      STATE_RX_AACK_ON,
 897                                                      at86rf230_tx_complete,
 898                                                      true);
 899         } else {
 900                 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
 901                                          at86rf230_rx_trac_check, true);
 902         }
 903 }
 904
 905 static void
 906 at86rf230_irq_status(void *context)
 907 {
 908         struct at86rf230_state_change *ctx = context;
 909         struct at86rf230_local *lp = ctx->lp;
 910         const u8 *buf = ctx->buf;
 911         const u8 irq = buf[1];
 912
 913         if (irq & IRQ_TRX_END) {
 914                 at86rf230_irq_trx_end(lp);
 915         } else {
 916                 enable_irq(ctx->irq);
 917                 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
 918                         irq);
 919         }
 920 }
 921
 922 static irqreturn_t at86rf230_isr(int irq, void *data)
 923 {
 924         struct at86rf230_local *lp = data;
 925         struct at86rf230_state_change *ctx = &lp->irq;
 926         u8 *buf = ctx->buf;
 927         int rc;
 928
 929         disable_irq_nosync(irq);
 930
 931         buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
 932         ctx->msg.complete = at86rf230_irq_status;
 933         rc = spi_async(lp->spi, &ctx->msg);
 934         if (rc) {
 935                 enable_irq(irq);
 936                 at86rf230_async_error(lp, ctx, rc);
 937                 return IRQ_NONE;
 938         }
 939
 940         return IRQ_HANDLED;
 941 }
 942
 943 static void
 944 at86rf230_write_frame_complete(void *context)
 945 {
 946         struct at86rf230_state_change *ctx = context;
 947         struct at86rf230_local *lp = ctx->lp;
 948         u8 *buf = ctx->buf;
 949         int rc;
 950
 951         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 952         buf[1] = STATE_BUSY_TX;
 953         ctx->trx.len = 2;
 954         ctx->msg.complete = NULL;
 955         rc = spi_async(lp->spi, &ctx->msg);
 956         if (rc)
 957                 at86rf230_async_error(lp, ctx, rc);
 958 }
 959
 960 static void
 961 at86rf230_write_frame(void *context)
 962 {
 963         struct at86rf230_state_change *ctx = context;
 964         struct at86rf230_local *lp = ctx->lp;
 965         struct sk_buff *skb = lp->tx_skb;
 966         u8 *buf = ctx->buf;
 967         int rc;
 968
 969         lp->is_tx = 1;
 970
 971         buf[0] = CMD_FB | CMD_WRITE;
 972         buf[1] = skb->len + 2;
 973         memcpy(buf + 2, skb->data, skb->len);
 974         ctx->trx.len = skb->len + 2;
 975         ctx->msg.complete = at86rf230_write_frame_complete;
 976         rc = spi_async(lp->spi, &ctx->msg);
 977         if (rc) {
 978                 ctx->trx.len = 2;
 979                 at86rf230_async_error(lp, ctx, rc);
 980         }
 981 }
 982
 983 static void
 984 at86rf230_xmit_tx_on(void *context)
 985 {
 986         struct at86rf230_state_change *ctx = context;
 987         struct at86rf230_local *lp = ctx->lp;
 988
 989         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
 990                                      at86rf230_write_frame, false);
 991 }
 992
 993 static void
 994 at86rf230_xmit_start(void *context)
 995 {
 996         struct at86rf230_state_change *ctx = context;
 997         struct at86rf230_local *lp = ctx->lp;
 998
 999         /* In ARET mode we need to go into STATE_TX_ARET_ON after we
1000          * are in STATE_TX_ON. The pfad differs here, so we change
1001          * the complete handler.
1002          */
1003         if (lp->tx_aret)
1004                 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1005                                              at86rf230_xmit_tx_on, false);
1006         else
1007                 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1008                                              at86rf230_write_frame, false);
1009 }
1010
1011 static int
1012 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
1013 {
1014         struct at86rf230_local *lp = hw->priv;
1015         struct at86rf230_state_change *ctx = &lp->tx;
1016
1017         lp->tx_skb = skb;
1018         lp->tx_retry = 0;
1019
1020         /* After 5 minutes in PLL and the same frequency we run again the
1021          * calibration loops which is recommended by at86rf2xx datasheets.
1022          *
1023          * The calibration is initiate by a state change from TRX_OFF
1024          * to TX_ON, the lp->cal_timeout should be reinit by state_delay
1025          * function then to start in the next 5 minutes.
1026          */
1027         if (time_is_before_jiffies(lp->cal_timeout))
1028                 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
1029                                              at86rf230_xmit_start, false);
1030         else
1031                 at86rf230_xmit_start(ctx);
1032
1033         return 0;
1034 }
1035
1036 static int
1037 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
1038 {
1039         BUG_ON(!level);
1040         *level = 0xbe;
1041         return 0;
1042 }
1043
1044 static int
1045 at86rf230_start(struct ieee802154_hw *hw)
1046 {
1047         return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
1048 }
1049
1050 static void
1051 at86rf230_stop(struct ieee802154_hw *hw)
1052 {
1053         at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
1054 }
1055
1056 static int
1057 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1058 {
1059         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1060 }
1061
1062 static int
1063 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1064 {
1065         int rc;
1066
1067         if (channel == 0)
1068                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1069         else
1070                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1071         if (rc < 0)
1072                 return rc;
1073
1074         if (page == 0) {
1075                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1076                 lp->data->rssi_base_val = -100;
1077         } else {
1078                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1079                 lp->data->rssi_base_val = -98;
1080         }
1081         if (rc < 0)
1082                 return rc;
1083
1084         /* This sets the symbol_duration according frequency on the 212.
1085          * TODO move this handling while set channel and page in cfg802154.
1086          * We can do that, this timings are according 802.15.4 standard.
1087          * If we do that in cfg802154, this is a more generic calculation.
1088          *
1089          * This should also protected from ifs_timer. Means cancel timer and
1090          * init with a new value. For now, this is okay.
1091          */
1092         if (channel == 0) {
1093                 if (page == 0) {
1094                         /* SUB:0 and BPSK:0 -> BPSK-20 */
1095                         lp->hw->phy->symbol_duration = 50;
1096                 } else {
1097                         /* SUB:1 and BPSK:0 -> BPSK-40 */
1098                         lp->hw->phy->symbol_duration = 25;
1099                 }
1100         } else {
1101                 if (page == 0)
1102                         /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1103                         lp->hw->phy->symbol_duration = 40;
1104                 else
1105                         /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1106                         lp->hw->phy->symbol_duration = 16;
1107         }
1108
1109         lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1110                                    lp->hw->phy->symbol_duration;
1111         lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1112                                    lp->hw->phy->symbol_duration;
1113
1114         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1115 }
1116
1117 static int
1118 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1119 {
1120         struct at86rf230_local *lp = hw->priv;
1121         int rc;
1122
1123         rc = lp->data->set_channel(lp, page, channel);
1124         /* Wait for PLL */
1125         usleep_range(lp->data->t_channel_switch,
1126                      lp->data->t_channel_switch + 10);
1127
1128         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1129         return rc;
1130 }
1131
1132 static int
1133 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1134                            struct ieee802154_hw_addr_filt *filt,
1135                            unsigned long changed)
1136 {
1137         struct at86rf230_local *lp = hw->priv;
1138
1139         if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1140                 u16 addr = le16_to_cpu(filt->short_addr);
1141
1142                 dev_vdbg(&lp->spi->dev,
1143                          "at86rf230_set_hw_addr_filt called for saddr\n");
1144                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1145                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1146         }
1147
1148         if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1149                 u16 pan = le16_to_cpu(filt->pan_id);
1150
1151                 dev_vdbg(&lp->spi->dev,
1152                          "at86rf230_set_hw_addr_filt called for pan id\n");
1153                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1154                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1155         }
1156
1157         if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1158                 u8 i, addr[8];
1159
1160                 memcpy(addr, &filt->ieee_addr, 8);
1161                 dev_vdbg(&lp->spi->dev,
1162                          "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1163                 for (i = 0; i < 8; i++)
1164                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1165         }
1166
1167         if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1168                 dev_vdbg(&lp->spi->dev,
1169                          "at86rf230_set_hw_addr_filt called for panc change\n");
1170                 if (filt->pan_coord)
1171                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1172                 else
1173                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1174         }
1175
1176         return 0;
1177 }
1178
1179 static int
1180 at86rf230_set_txpower(struct ieee802154_hw *hw, s8 db)
1181 {
1182         struct at86rf230_local *lp = hw->priv;
1183
1184         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1185          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1186          * 0dB.
1187          * thus, supported values for db range from -26 to 5, for 31dB of
1188          * reduction to 0dB of reduction.
1189          */
1190         if (db > 5 || db < -26)
1191                 return -EINVAL;
1192
1193         db = -(db - 5);
1194
1195         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1196 }
1197
1198 static int
1199 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1200 {
1201         struct at86rf230_local *lp = hw->priv;
1202
1203         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1204 }
1205
1206 static int
1207 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1208                        const struct wpan_phy_cca *cca)
1209 {
1210         struct at86rf230_local *lp = hw->priv;
1211         u8 val;
1212
1213         /* mapping 802.15.4 to driver spec */
1214         switch (cca->mode) {
1215         case NL802154_CCA_ENERGY:
1216                 val = 1;
1217                 break;
1218         case NL802154_CCA_CARRIER:
1219                 val = 2;
1220                 break;
1221         case NL802154_CCA_ENERGY_CARRIER:
1222                 switch (cca->opt) {
1223                 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1224                         val = 3;
1225                         break;
1226                 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1227                         val = 0;
1228                         break;
1229                 default:
1230                         return -EINVAL;
1231                 }
1232                 break;
1233         default:
1234                 return -EINVAL;
1235         }
1236
1237         return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1238 }
1239
1240 static int
1241 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1242 {
1243         return (level - lp->data->rssi_base_val) * 100 / 207;
1244 }
1245
1246 static int
1247 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1248 {
1249         return (level - lp->data->rssi_base_val) / 2;
1250 }
1251
1252 static int
1253 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1254 {
1255         struct at86rf230_local *lp = hw->priv;
1256
1257         if (level < lp->data->rssi_base_val || level > 30)
1258                 return -EINVAL;
1259
1260         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1261                                       lp->data->get_desense_steps(lp, level));
1262 }
1263
1264 static int
1265 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1266                           u8 retries)
1267 {
1268         struct at86rf230_local *lp = hw->priv;
1269         int rc;
1270
1271         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1272         if (rc)
1273                 return rc;
1274
1275         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1276         if (rc)
1277                 return rc;
1278
1279         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1280 }
1281
1282 static int
1283 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1284 {
1285         struct at86rf230_local *lp = hw->priv;
1286         int rc = 0;
1287
1288         lp->tx_aret = retries >= 0;
1289         lp->max_frame_retries = retries;
1290
1291         if (retries >= 0)
1292                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1293
1294         return rc;
1295 }
1296
1297 static int
1298 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1299 {
1300         struct at86rf230_local *lp = hw->priv;
1301         int rc;
1302
1303         if (on) {
1304                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1305                 if (rc < 0)
1306                         return rc;
1307
1308                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1309                 if (rc < 0)
1310                         return rc;
1311         } else {
1312                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1313                 if (rc < 0)
1314                         return rc;
1315
1316                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1317                 if (rc < 0)
1318                         return rc;
1319         }
1320
1321         return 0;
1322 }
1323
1324 static const struct ieee802154_ops at86rf230_ops = {
1325         .owner = THIS_MODULE,
1326         .xmit_async = at86rf230_xmit,
1327         .ed = at86rf230_ed,
1328         .set_channel = at86rf230_channel,
1329         .start = at86rf230_start,
1330         .stop = at86rf230_stop,
1331         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1332         .set_txpower = at86rf230_set_txpower,
1333         .set_lbt = at86rf230_set_lbt,
1334         .set_cca_mode = at86rf230_set_cca_mode,
1335         .set_cca_ed_level = at86rf230_set_cca_ed_level,
1336         .set_csma_params = at86rf230_set_csma_params,
1337         .set_frame_retries = at86rf230_set_frame_retries,
1338         .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1339 };
1340
1341 static struct at86rf2xx_chip_data at86rf233_data = {
1342         .t_sleep_cycle = 330,
1343         .t_channel_switch = 11,
1344         .t_reset_to_off = 26,
1345         .t_off_to_aack = 80,
1346         .t_off_to_tx_on = 80,
1347         .t_frame = 4096,
1348         .t_p_ack = 545,
1349         .rssi_base_val = -91,
1350         .set_channel = at86rf23x_set_channel,
1351         .get_desense_steps = at86rf23x_get_desens_steps
1352 };
1353
1354 static struct at86rf2xx_chip_data at86rf231_data = {
1355         .t_sleep_cycle = 330,
1356         .t_channel_switch = 24,
1357         .t_reset_to_off = 37,
1358         .t_off_to_aack = 110,
1359         .t_off_to_tx_on = 110,
1360         .t_frame = 4096,
1361         .t_p_ack = 545,
1362         .rssi_base_val = -91,
1363         .set_channel = at86rf23x_set_channel,
1364         .get_desense_steps = at86rf23x_get_desens_steps
1365 };
1366
1367 static struct at86rf2xx_chip_data at86rf212_data = {
1368         .t_sleep_cycle = 330,
1369         .t_channel_switch = 11,
1370         .t_reset_to_off = 26,
1371         .t_off_to_aack = 200,
1372         .t_off_to_tx_on = 200,
1373         .t_frame = 4096,
1374         .t_p_ack = 545,
1375         .rssi_base_val = -100,
1376         .set_channel = at86rf212_set_channel,
1377         .get_desense_steps = at86rf212_get_desens_steps
1378 };
1379
1380 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1381 {
1382         int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1383         unsigned int dvdd;
1384         u8 csma_seed[2];
1385
1386         rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1387         if (rc)
1388                 return rc;
1389
1390         irq_type = irq_get_trigger_type(lp->spi->irq);
1391         if (irq_type == IRQ_TYPE_EDGE_RISING ||
1392             irq_type == IRQ_TYPE_EDGE_FALLING)
1393                 dev_warn(&lp->spi->dev,
1394                          "Using edge triggered irq's are not recommended!\n");
1395         if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1396             irq_type == IRQ_TYPE_LEVEL_LOW)
1397                 irq_pol = IRQ_ACTIVE_LOW;
1398
1399         rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1400         if (rc)
1401                 return rc;
1402
1403         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1404         if (rc)
1405                 return rc;
1406
1407         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1408         if (rc)
1409                 return rc;
1410
1411         /* reset values differs in at86rf231 and at86rf233 */
1412         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1413         if (rc)
1414                 return rc;
1415
1416         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1417         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1418         if (rc)
1419                 return rc;
1420         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1421         if (rc)
1422                 return rc;
1423
1424         /* CLKM changes are applied immediately */
1425         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1426         if (rc)
1427                 return rc;
1428
1429         /* Turn CLKM Off */
1430         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1431         if (rc)
1432                 return rc;
1433         /* Wait the next SLEEP cycle */
1434         usleep_range(lp->data->t_sleep_cycle,
1435                      lp->data->t_sleep_cycle + 100);
1436
1437         /* xtal_trim value is calculated by:
1438          * CL = 0.5 * (CX + CTRIM + CPAR)
1439          *
1440          * whereas:
1441          * CL = capacitor of used crystal
1442          * CX = connected capacitors at xtal pins
1443          * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1444          *        but this is different on each board setup. You need to fine
1445          *        tuning this value via CTRIM.
1446          * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1447          *         0 pF upto 4.5 pF.
1448          *
1449          * Examples:
1450          * atben transceiver:
1451          *
1452          * CL = 8 pF
1453          * CX = 12 pF
1454          * CPAR = 3 pF (We assume the magic constant from datasheet)
1455          * CTRIM = 0.9 pF
1456          *
1457          * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1458          *
1459          * xtal_trim = 0x3
1460          *
1461          * openlabs transceiver:
1462          *
1463          * CL = 16 pF
1464          * CX = 22 pF
1465          * CPAR = 3 pF (We assume the magic constant from datasheet)
1466          * CTRIM = 4.5 pF
1467          *
1468          * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1469          *
1470          * xtal_trim = 0xf
1471          */
1472         rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1473         if (rc)
1474                 return rc;
1475
1476         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1477         if (rc)
1478                 return rc;
1479         if (!dvdd) {
1480                 dev_err(&lp->spi->dev, "DVDD error\n");
1481                 return -EINVAL;
1482         }
1483
1484         /* Force setting slotted operation bit to 0. Sometimes the atben
1485          * sets this bit and I don't know why. We set this always force
1486          * to zero while probing.
1487          */
1488         return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1489 }
1490
1491 static int
1492 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1493                     u8 *xtal_trim)
1494 {
1495         struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1496         int ret;
1497
1498         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1499                 if (!pdata)
1500                         return -ENOENT;
1501
1502                 *rstn = pdata->rstn;
1503                 *slp_tr = pdata->slp_tr;
1504                 *xtal_trim = pdata->xtal_trim;
1505                 return 0;
1506         }
1507
1508         *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1509         *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1510         ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1511         if (ret < 0 && ret != -EINVAL)
1512                 return ret;
1513
1514         return 0;
1515 }
1516
1517 static int
1518 at86rf230_detect_device(struct at86rf230_local *lp)
1519 {
1520         unsigned int part, version, val;
1521         u16 man_id = 0;
1522         const char *chip;
1523         int rc;
1524
1525         rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1526         if (rc)
1527                 return rc;
1528         man_id |= val;
1529
1530         rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1531         if (rc)
1532                 return rc;
1533         man_id |= (val << 8);
1534
1535         rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1536         if (rc)
1537                 return rc;
1538
1539         rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1540         if (rc)
1541                 return rc;
1542
1543         if (man_id != 0x001f) {
1544                 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1545                         man_id >> 8, man_id & 0xFF);
1546                 return -EINVAL;
1547         }
1548
1549         lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1550                         IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1551                         IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1552
1553         lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1554
1555         switch (part) {
1556         case 2:
1557                 chip = "at86rf230";
1558                 rc = -ENOTSUPP;
1559                 break;
1560         case 3:
1561                 chip = "at86rf231";
1562                 lp->data = &at86rf231_data;
1563                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1564                 lp->hw->phy->current_channel = 11;
1565                 lp->hw->phy->symbol_duration = 16;
1566                 break;
1567         case 7:
1568                 chip = "at86rf212";
1569                 lp->data = &at86rf212_data;
1570                 lp->hw->flags |= IEEE802154_HW_LBT;
1571                 lp->hw->phy->channels_supported[0] = 0x00007FF;
1572                 lp->hw->phy->channels_supported[2] = 0x00007FF;
1573                 lp->hw->phy->current_channel = 5;
1574                 lp->hw->phy->symbol_duration = 25;
1575                 break;
1576         case 11:
1577                 chip = "at86rf233";
1578                 lp->data = &at86rf233_data;
1579                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1580                 lp->hw->phy->current_channel = 13;
1581                 lp->hw->phy->symbol_duration = 16;
1582                 break;
1583         default:
1584                 chip = "unknown";
1585                 rc = -ENOTSUPP;
1586                 break;
1587         }
1588
1589         dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1590
1591         return rc;
1592 }
1593
1594 static void
1595 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1596 {
1597         lp->state.lp = lp;
1598         lp->state.irq = lp->spi->irq;
1599         spi_message_init(&lp->state.msg);
1600         lp->state.msg.context = &lp->state;
1601         lp->state.trx.len = 2;
1602         lp->state.trx.tx_buf = lp->state.buf;
1603         lp->state.trx.rx_buf = lp->state.buf;
1604         spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1605         hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1606         lp->state.timer.function = at86rf230_async_state_timer;
1607
1608         lp->irq.lp = lp;
1609         lp->irq.irq = lp->spi->irq;
1610         spi_message_init(&lp->irq.msg);
1611         lp->irq.msg.context = &lp->irq;
1612         lp->irq.trx.len = 2;
1613         lp->irq.trx.tx_buf = lp->irq.buf;
1614         lp->irq.trx.rx_buf = lp->irq.buf;
1615         spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1616         hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1617         lp->irq.timer.function = at86rf230_async_state_timer;
1618
1619         lp->tx.lp = lp;
1620         lp->tx.irq = lp->spi->irq;
1621         spi_message_init(&lp->tx.msg);
1622         lp->tx.msg.context = &lp->tx;
1623         lp->tx.trx.len = 2;
1624         lp->tx.trx.tx_buf = lp->tx.buf;
1625         lp->tx.trx.rx_buf = lp->tx.buf;
1626         spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1627         hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1628         lp->tx.timer.function = at86rf230_async_state_timer;
1629 }
1630
1631 static int at86rf230_probe(struct spi_device *spi)
1632 {
1633         struct ieee802154_hw *hw;
1634         struct at86rf230_local *lp;
1635         unsigned int status;
1636         int rc, irq_type, rstn, slp_tr;
1637         u8 xtal_trim = 0;
1638
1639         if (!spi->irq) {
1640                 dev_err(&spi->dev, "no IRQ specified\n");
1641                 return -EINVAL;
1642         }
1643
1644         rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1645         if (rc < 0) {
1646                 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1647                 return rc;
1648         }
1649
1650         if (gpio_is_valid(rstn)) {
1651                 rc = devm_gpio_request_one(&spi->dev, rstn,
1652                                            GPIOF_OUT_INIT_HIGH, "rstn");
1653                 if (rc)
1654                         return rc;
1655         }
1656
1657         if (gpio_is_valid(slp_tr)) {
1658                 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1659                                            GPIOF_OUT_INIT_LOW, "slp_tr");
1660                 if (rc)
1661                         return rc;
1662         }
1663
1664         /* Reset */
1665         if (gpio_is_valid(rstn)) {
1666                 udelay(1);
1667                 gpio_set_value(rstn, 0);
1668                 udelay(1);
1669                 gpio_set_value(rstn, 1);
1670                 usleep_range(120, 240);
1671         }
1672
1673         hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1674         if (!hw)
1675                 return -ENOMEM;
1676
1677         lp = hw->priv;
1678         lp->hw = hw;
1679         lp->spi = spi;
1680         hw->parent = &spi->dev;
1681         hw->vif_data_size = sizeof(*lp);
1682         ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1683
1684         lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1685         if (IS_ERR(lp->regmap)) {
1686                 rc = PTR_ERR(lp->regmap);
1687                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1688                         rc);
1689                 goto free_dev;
1690         }
1691
1692         at86rf230_setup_spi_messages(lp);
1693
1694         rc = at86rf230_detect_device(lp);
1695         if (rc < 0)
1696                 goto free_dev;
1697
1698         init_completion(&lp->state_complete);
1699
1700         spi_set_drvdata(spi, lp);
1701
1702         rc = at86rf230_hw_init(lp, xtal_trim);
1703         if (rc)
1704                 goto free_dev;
1705
1706         /* Read irq status register to reset irq line */
1707         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1708         if (rc)
1709                 goto free_dev;
1710
1711         irq_type = irq_get_trigger_type(spi->irq);
1712         if (!irq_type)
1713                 irq_type = IRQF_TRIGGER_RISING;
1714
1715         rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1716                               IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1717         if (rc)
1718                 goto free_dev;
1719
1720         rc = ieee802154_register_hw(lp->hw);
1721         if (rc)
1722                 goto free_dev;
1723
1724         return rc;
1725
1726 free_dev:
1727         ieee802154_free_hw(lp->hw);
1728
1729         return rc;
1730 }
1731
1732 static int at86rf230_remove(struct spi_device *spi)
1733 {
1734         struct at86rf230_local *lp = spi_get_drvdata(spi);
1735
1736         /* mask all at86rf230 irq's */
1737         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1738         ieee802154_unregister_hw(lp->hw);
1739         ieee802154_free_hw(lp->hw);
1740         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1741
1742         return 0;
1743 }
1744
1745 static const struct of_device_id at86rf230_of_match[] = {
1746         { .compatible = "atmel,at86rf230", },
1747         { .compatible = "atmel,at86rf231", },
1748         { .compatible = "atmel,at86rf233", },
1749         { .compatible = "atmel,at86rf212", },
1750         { },
1751 };
1752 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1753
1754 static const struct spi_device_id at86rf230_device_id[] = {
1755         { .name = "at86rf230", },
1756         { .name = "at86rf231", },
1757         { .name = "at86rf233", },
1758         { .name = "at86rf212", },
1759         { },
1760 };
1761 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1762
1763 static struct spi_driver at86rf230_driver = {
1764         .id_table = at86rf230_device_id,
1765         .driver = {
1766                 .of_match_table = of_match_ptr(at86rf230_of_match),
1767                 .name   = "at86rf230",
1768                 .owner  = THIS_MODULE,
1769         },
1770         .probe      = at86rf230_probe,
1771         .remove     = at86rf230_remove,
1772 };
1773
1774 module_spi_driver(at86rf230_driver);
1775
1776 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1777 MODULE_LICENSE("GPL v2");