sound/soc/omap/omap-dmic.c

   1 /*
   2  * omap-dmic.c  --  OMAP ASoC DMIC DAI driver
   3  *
   4  * Copyright (C) 2010 - 2011 Texas Instruments
   5  *
   6  * Author: David Lambert <[email protected]>
   7  *         Misael Lopez Cruz <[email protected]>
   8  *         Liam Girdwood <[email protected]>
   9  *         Peter Ujfalusi <[email protected]>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/err.h>
  31 #include <linux/clk.h>
  32 #include <linux/io.h>
  33 #include <linux/slab.h>
  34 #include <linux/pm_runtime.h>
  35 #include <linux/of_device.h>
  36
  37 #include <sound/core.h>
  38 #include <sound/pcm.h>
  39 #include <sound/pcm_params.h>
  40 #include <sound/initval.h>
  41 #include <sound/soc.h>
  42 #include <sound/dmaengine_pcm.h>
  43
  44 #include "omap-dmic.h"
  45 #include "sdma-pcm.h"
  46
  47 struct omap_dmic {
  48         struct device *dev;
  49         void __iomem *io_base;
  50         struct clk *fclk;
  51         int fclk_freq;
  52         int out_freq;
  53         int clk_div;
  54         int sysclk;
  55         int threshold;
  56         u32 ch_enabled;
  57         bool active;
  58         struct mutex mutex;
  59
  60         struct snd_dmaengine_dai_dma_data dma_data;
  61 };
  62
  63 static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
  64 {
  65         writel_relaxed(val, dmic->io_base + reg);
  66 }
  67
  68 static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
  69 {
  70         return readl_relaxed(dmic->io_base + reg);
  71 }
  72
  73 static inline void omap_dmic_start(struct omap_dmic *dmic)
  74 {
  75         u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
  76
  77         /* Configure DMA controller */
  78         omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
  79                         OMAP_DMIC_DMA_ENABLE);
  80
  81         omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
  82 }
  83
  84 static inline void omap_dmic_stop(struct omap_dmic *dmic)
  85 {
  86         u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
  87         omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
  88                         ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
  89
  90         /* Disable DMA request generation */
  91         omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
  92                         OMAP_DMIC_DMA_ENABLE);
  93
  94 }
  95
  96 static inline int dmic_is_enabled(struct omap_dmic *dmic)
  97 {
  98         return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
  99                                                 OMAP_DMIC_UP_ENABLE_MASK;
 100 }
 101
 102 static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
 103                                   struct snd_soc_dai *dai)
 104 {
 105         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 106         int ret = 0;
 107
 108         mutex_lock(&dmic->mutex);
 109
 110         if (!dai->active)
 111                 dmic->active = 1;
 112         else
 113                 ret = -EBUSY;
 114
 115         mutex_unlock(&dmic->mutex);
 116
 117         return ret;
 118 }
 119
 120 static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
 121                                     struct snd_soc_dai *dai)
 122 {
 123         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 124
 125         mutex_lock(&dmic->mutex);
 126
 127         if (!dai->active)
 128                 dmic->active = 0;
 129
 130         mutex_unlock(&dmic->mutex);
 131 }
 132
 133 static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
 134 {
 135         int divider = -EINVAL;
 136
 137         /*
 138          * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
 139          * configuration.
 140          */
 141         if (sample_rate == 192000) {
 142                 if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
 143                         divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
 144                 else
 145                         dev_err(dmic->dev,
 146                                 "invalid clock configuration for 192KHz\n");
 147
 148                 return divider;
 149         }
 150
 151         switch (dmic->out_freq) {
 152         case 1536000:
 153                 if (dmic->fclk_freq != 24576000)
 154                         goto div_err;
 155                 divider = 0x4; /* Divider: 16 */
 156                 break;
 157         case 2400000:
 158                 switch (dmic->fclk_freq) {
 159                 case 12000000:
 160                         divider = 0x5; /* Divider: 5 */
 161                         break;
 162                 case 19200000:
 163                         divider = 0x0; /* Divider: 8 */
 164                         break;
 165                 case 24000000:
 166                         divider = 0x2; /* Divider: 10 */
 167                         break;
 168                 default:
 169                         goto div_err;
 170                 }
 171                 break;
 172         case 3072000:
 173                 if (dmic->fclk_freq != 24576000)
 174                         goto div_err;
 175                 divider = 0x3; /* Divider: 8 */
 176                 break;
 177         case 3840000:
 178                 if (dmic->fclk_freq != 19200000)
 179                         goto div_err;
 180                 divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
 181                 break;
 182         default:
 183                 dev_err(dmic->dev, "invalid out frequency: %dHz\n",
 184                         dmic->out_freq);
 185                 break;
 186         }
 187
 188         return divider;
 189
 190 div_err:
 191         dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
 192                 dmic->out_freq, dmic->fclk_freq);
 193         return -EINVAL;
 194 }
 195
 196 static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
 197                                     struct snd_pcm_hw_params *params,
 198                                     struct snd_soc_dai *dai)
 199 {
 200         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 201         struct snd_dmaengine_dai_dma_data *dma_data;
 202         int channels;
 203
 204         dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
 205         if (dmic->clk_div < 0) {
 206                 dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
 207                         dmic->out_freq, dmic->fclk_freq);
 208                 return -EINVAL;
 209         }
 210
 211         dmic->ch_enabled = 0;
 212         channels = params_channels(params);
 213         switch (channels) {
 214         case 6:
 215                 dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
 216                 /* fall through */
 217         case 4:
 218                 dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
 219                 /* fall through */
 220         case 2:
 221                 dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
 222                 break;
 223         default:
 224                 dev_err(dmic->dev, "invalid number of legacy channels\n");
 225                 return -EINVAL;
 226         }
 227
 228         /* packet size is threshold * channels */
 229         dma_data = snd_soc_dai_get_dma_data(dai, substream);
 230         dma_data->maxburst = dmic->threshold * channels;
 231
 232         return 0;
 233 }
 234
 235 static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
 236                                   struct snd_soc_dai *dai)
 237 {
 238         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 239         u32 ctrl;
 240
 241         /* Configure uplink threshold */
 242         omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
 243
 244         ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
 245
 246         /* Set dmic out format */
 247         ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
 248         ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
 249                  OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
 250
 251         /* Configure dmic clock divider */
 252         ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
 253         ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
 254
 255         omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
 256
 257         omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
 258                         ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
 259                         OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
 260
 261         return 0;
 262 }
 263
 264 static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
 265                                   int cmd, struct snd_soc_dai *dai)
 266 {
 267         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 268
 269         switch (cmd) {
 270         case SNDRV_PCM_TRIGGER_START:
 271                 omap_dmic_start(dmic);
 272                 break;
 273         case SNDRV_PCM_TRIGGER_STOP:
 274                 omap_dmic_stop(dmic);
 275                 break;
 276         default:
 277                 break;
 278         }
 279
 280         return 0;
 281 }
 282
 283 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
 284                                  unsigned int freq)
 285 {
 286         struct clk *parent_clk, *mux;
 287         char *parent_clk_name;
 288         int ret = 0;
 289
 290         switch (freq) {
 291         case 12000000:
 292         case 19200000:
 293         case 24000000:
 294         case 24576000:
 295                 break;
 296         default:
 297                 dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
 298                 dmic->fclk_freq = 0;
 299                 return -EINVAL;
 300         }
 301
 302         if (dmic->sysclk == clk_id) {
 303                 dmic->fclk_freq = freq;
 304                 return 0;
 305         }
 306
 307         /* re-parent not allowed if a stream is ongoing */
 308         if (dmic->active && dmic_is_enabled(dmic)) {
 309                 dev_err(dmic->dev, "can't re-parent when DMIC active\n");
 310                 return -EBUSY;
 311         }
 312
 313         switch (clk_id) {
 314         case OMAP_DMIC_SYSCLK_PAD_CLKS:
 315                 parent_clk_name = "pad_clks_ck";
 316                 break;
 317         case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
 318                 parent_clk_name = "slimbus_clk";
 319                 break;
 320         case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
 321                 parent_clk_name = "dmic_sync_mux_ck";
 322                 break;
 323         default:
 324                 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
 325                 return -EINVAL;
 326         }
 327
 328         parent_clk = clk_get(dmic->dev, parent_clk_name);
 329         if (IS_ERR(parent_clk)) {
 330                 dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
 331                 return -ENODEV;
 332         }
 333
 334         mux = clk_get_parent(dmic->fclk);
 335         if (IS_ERR(mux)) {
 336                 dev_err(dmic->dev, "can't get fck mux parent\n");
 337                 clk_put(parent_clk);
 338                 return -ENODEV;
 339         }
 340
 341         mutex_lock(&dmic->mutex);
 342         if (dmic->active) {
 343                 /* disable clock while reparenting */
 344                 pm_runtime_put_sync(dmic->dev);
 345                 ret = clk_set_parent(mux, parent_clk);
 346                 pm_runtime_get_sync(dmic->dev);
 347         } else {
 348                 ret = clk_set_parent(mux, parent_clk);
 349         }
 350         mutex_unlock(&dmic->mutex);
 351
 352         if (ret < 0) {
 353                 dev_err(dmic->dev, "re-parent failed\n");
 354                 goto err_busy;
 355         }
 356
 357         dmic->sysclk = clk_id;
 358         dmic->fclk_freq = freq;
 359
 360 err_busy:
 361         clk_put(mux);
 362         clk_put(parent_clk);
 363
 364         return ret;
 365 }
 366
 367 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
 368                                     unsigned int freq)
 369 {
 370         int ret = 0;
 371
 372         if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
 373                 dev_err(dmic->dev, "output clk_id (%d) not supported\n",
 374                         clk_id);
 375                 return -EINVAL;
 376         }
 377
 378         switch (freq) {
 379         case 1536000:
 380         case 2400000:
 381         case 3072000:
 382         case 3840000:
 383                 dmic->out_freq = freq;
 384                 break;
 385         default:
 386                 dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
 387                 dmic->out_freq = 0;
 388                 ret = -EINVAL;
 389         }
 390
 391         return ret;
 392 }
 393
 394 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
 395                                     unsigned int freq, int dir)
 396 {
 397         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 398
 399         if (dir == SND_SOC_CLOCK_IN)
 400                 return omap_dmic_select_fclk(dmic, clk_id, freq);
 401         else if (dir == SND_SOC_CLOCK_OUT)
 402                 return omap_dmic_select_outclk(dmic, clk_id, freq);
 403
 404         dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
 405         return -EINVAL;
 406 }
 407
 408 static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
 409         .startup        = omap_dmic_dai_startup,
 410         .shutdown       = omap_dmic_dai_shutdown,
 411         .hw_params      = omap_dmic_dai_hw_params,
 412         .prepare        = omap_dmic_dai_prepare,
 413         .trigger        = omap_dmic_dai_trigger,
 414         .set_sysclk     = omap_dmic_set_dai_sysclk,
 415 };
 416
 417 static int omap_dmic_probe(struct snd_soc_dai *dai)
 418 {
 419         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 420
 421         pm_runtime_enable(dmic->dev);
 422
 423         /* Disable lines while request is ongoing */
 424         pm_runtime_get_sync(dmic->dev);
 425         omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
 426         pm_runtime_put_sync(dmic->dev);
 427
 428         /* Configure DMIC threshold value */
 429         dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
 430
 431         snd_soc_dai_init_dma_data(dai, NULL, &dmic->dma_data);
 432
 433         return 0;
 434 }
 435
 436 static int omap_dmic_remove(struct snd_soc_dai *dai)
 437 {
 438         struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
 439
 440         pm_runtime_disable(dmic->dev);
 441
 442         return 0;
 443 }
 444
 445 static struct snd_soc_dai_driver omap_dmic_dai = {
 446         .name = "omap-dmic",
 447         .probe = omap_dmic_probe,
 448         .remove = omap_dmic_remove,
 449         .capture = {
 450                 .channels_min = 2,
 451                 .channels_max = 6,
 452                 .rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
 453                 .formats = SNDRV_PCM_FMTBIT_S32_LE,
 454                 .sig_bits = 24,
 455         },
 456         .ops = &omap_dmic_dai_ops,
 457 };
 458
 459 static const struct snd_soc_component_driver omap_dmic_component = {
 460         .name           = "omap-dmic",
 461 };
 462
 463 static int asoc_dmic_probe(struct platform_device *pdev)
 464 {
 465         struct omap_dmic *dmic;
 466         struct resource *res;
 467         int ret;
 468
 469         dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
 470         if (!dmic)
 471                 return -ENOMEM;
 472
 473         platform_set_drvdata(pdev, dmic);
 474         dmic->dev = &pdev->dev;
 475         dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
 476
 477         mutex_init(&dmic->mutex);
 478
 479         dmic->fclk = devm_clk_get(dmic->dev, "fck");
 480         if (IS_ERR(dmic->fclk)) {
 481                 dev_err(dmic->dev, "cant get fck\n");
 482                 return -ENODEV;
 483         }
 484
 485         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 486         if (!res) {
 487                 dev_err(dmic->dev, "invalid dma memory resource\n");
 488                 return -ENODEV;
 489         }
 490         dmic->dma_data.addr = res->start + OMAP_DMIC_DATA_REG;
 491
 492         dmic->dma_data.filter_data = "up_link";
 493
 494         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 495         dmic->io_base = devm_ioremap_resource(&pdev->dev, res);
 496         if (IS_ERR(dmic->io_base))
 497                 return PTR_ERR(dmic->io_base);
 498
 499
 500         ret = devm_snd_soc_register_component(&pdev->dev,
 501                                               &omap_dmic_component,
 502                                               &omap_dmic_dai, 1);
 503         if (ret)
 504                 return ret;
 505
 506         ret = sdma_pcm_platform_register(&pdev->dev, NULL, "up_link");
 507         if (ret)
 508                 return ret;
 509
 510         return 0;
 511 }
 512
 513 static const struct of_device_id omap_dmic_of_match[] = {
 514         { .compatible = "ti,omap4-dmic", },
 515         { }
 516 };
 517 MODULE_DEVICE_TABLE(of, omap_dmic_of_match);
 518
 519 static struct platform_driver asoc_dmic_driver = {
 520         .driver = {
 521                 .name = "omap-dmic",
 522                 .of_match_table = omap_dmic_of_match,
 523         },
 524         .probe = asoc_dmic_probe,
 525 };
 526
 527 module_platform_driver(asoc_dmic_driver);
 528
 529 MODULE_ALIAS("platform:omap-dmic");
 530 MODULE_AUTHOR("Peter Ujfalusi <[email protected]>");
 531 MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
 532 MODULE_LICENSE("GPL");