2 * bpf_jit_comp64.c: eBPF JIT compiler
7 * Based on the powerpc classic BPF JIT compiler by Matt Evans
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
14 #include <linux/moduleloader.h>
15 #include <asm/cacheflush.h>
16 #include <asm/asm-compat.h>
17 #include <linux/netdevice.h>
18 #include <linux/filter.h>
19 #include <linux/if_vlan.h>
20 #include <asm/kprobes.h>
21 #include <linux/bpf.h>
23 #include "bpf_jit64.h"
25 static void bpf_jit_fill_ill_insns(void *area, unsigned int size)
27 memset32(area, BREAKPOINT_INSTRUCTION, size/4);
30 static inline void bpf_flush_icache(void *start, void *end)
33 flush_icache_range((unsigned long)start, (unsigned long)end);
36 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i)
38 return (ctx->seen & (1 << (31 - b2p[i])));
41 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i)
43 ctx->seen |= (1 << (31 - b2p[i]));
46 static inline bool bpf_has_stack_frame(struct codegen_context *ctx)
49 * We only need a stack frame if:
50 * - we call other functions (kernel helpers), or
51 * - the bpf program uses its stack area
52 * The latter condition is deduced from the usage of BPF_REG_FP
54 return ctx->seen & SEEN_FUNC || bpf_is_seen_register(ctx, BPF_REG_FP);
58 * When not setting up our own stackframe, the redzone usage is:
60 * [ prev sp ] <-------------
62 * sp (r1) ---> [ stack pointer ] --------------
63 * [ nv gpr save area ] 6*8
66 * [ unused red zone ] 208 bytes protected
68 static int bpf_jit_stack_local(struct codegen_context *ctx)
70 if (bpf_has_stack_frame(ctx))
71 return STACK_FRAME_MIN_SIZE + ctx->stack_size;
73 return -(BPF_PPC_STACK_SAVE + 16);
76 static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx)
78 return bpf_jit_stack_local(ctx) + 8;
81 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
83 if (reg >= BPF_PPC_NVR_MIN && reg < 32)
84 return (bpf_has_stack_frame(ctx) ?
85 (BPF_PPC_STACKFRAME + ctx->stack_size) : 0)
88 pr_err("BPF JIT is asking about unknown registers");
92 static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
97 * Initialize tail_call_cnt if we do tail calls.
98 * Otherwise, put in NOPs so that it can be skipped when we are
99 * invoked through a tail call.
101 if (ctx->seen & SEEN_TAILCALL) {
102 PPC_LI(b2p[TMP_REG_1], 0);
103 /* this goes in the redzone */
104 PPC_BPF_STL(b2p[TMP_REG_1], 1, -(BPF_PPC_STACK_SAVE + 8));
110 #define BPF_TAILCALL_PROLOGUE_SIZE 8
112 if (bpf_has_stack_frame(ctx)) {
114 * We need a stack frame, but we don't necessarily need to
115 * save/restore LR unless we call other functions
117 if (ctx->seen & SEEN_FUNC) {
118 EMIT(PPC_INST_MFLR | __PPC_RT(R0));
119 PPC_BPF_STL(0, 1, PPC_LR_STKOFF);
122 PPC_BPF_STLU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size));
126 * Back up non-volatile regs -- BPF registers 6-10
127 * If we haven't created our own stack frame, we save these
128 * in the protected zone below the previous stack frame
130 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
131 if (bpf_is_seen_register(ctx, i))
132 PPC_BPF_STL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
134 /* Setup frame pointer to point to the bpf stack area */
135 if (bpf_is_seen_register(ctx, BPF_REG_FP))
136 PPC_ADDI(b2p[BPF_REG_FP], 1,
137 STACK_FRAME_MIN_SIZE + ctx->stack_size);
140 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx)
145 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
146 if (bpf_is_seen_register(ctx, i))
147 PPC_BPF_LL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
149 /* Tear down our stack frame */
150 if (bpf_has_stack_frame(ctx)) {
151 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME + ctx->stack_size);
152 if (ctx->seen & SEEN_FUNC) {
153 PPC_BPF_LL(0, 1, PPC_LR_STKOFF);
159 static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
161 bpf_jit_emit_common_epilogue(image, ctx);
163 /* Move result to r3 */
164 PPC_MR(3, b2p[BPF_REG_0]);
169 static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func)
171 unsigned int i, ctx_idx = ctx->idx;
173 /* Load function address into r12 */
176 /* For bpf-to-bpf function calls, the callee's address is unknown
177 * until the last extra pass. As seen above, we use PPC_LI64() to
178 * load the callee's address, but this may optimize the number of
179 * instructions required based on the nature of the address.
181 * Since we don't want the number of instructions emitted to change,
182 * we pad the optimized PPC_LI64() call with NOPs to guarantee that
183 * we always have a five-instruction sequence, which is the maximum
184 * that PPC_LI64() can emit.
186 for (i = ctx->idx - ctx_idx; i < 5; i++)
189 #ifdef PPC64_ELF_ABI_v1
191 * Load TOC from function descriptor at offset 8.
192 * We can clobber r2 since we get called through a
193 * function pointer (so caller will save/restore r2)
194 * and since we don't use a TOC ourself.
196 PPC_BPF_LL(2, 12, 8);
197 /* Load actual entry point from function descriptor */
198 PPC_BPF_LL(12, 12, 0);
205 static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)
208 * By now, the eBPF program has already setup parameters in r3, r4 and r5
209 * r3/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program
210 * r4/BPF_REG_2 - pointer to bpf_array
211 * r5/BPF_REG_3 - index in bpf_array
213 int b2p_bpf_array = b2p[BPF_REG_2];
214 int b2p_index = b2p[BPF_REG_3];
217 * if (index >= array->map.max_entries)
220 PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries));
221 PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31);
222 PPC_CMPLW(b2p_index, b2p[TMP_REG_1]);
223 PPC_BCC(COND_GE, out);
226 * if (tail_call_cnt > MAX_TAIL_CALL_CNT)
229 PPC_LD(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
230 PPC_CMPLWI(b2p[TMP_REG_1], MAX_TAIL_CALL_CNT);
231 PPC_BCC(COND_GT, out);
236 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], 1);
237 PPC_BPF_STL(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
239 /* prog = array->ptrs[index]; */
240 PPC_MULI(b2p[TMP_REG_1], b2p_index, 8);
241 PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array);
242 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs));
248 PPC_CMPLDI(b2p[TMP_REG_1], 0);
249 PPC_BCC(COND_EQ, out);
251 /* goto *(prog->bpf_func + prologue_size); */
252 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_prog, bpf_func));
253 #ifdef PPC64_ELF_ABI_v1
254 /* skip past the function descriptor */
255 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1],
256 FUNCTION_DESCR_SIZE + BPF_TAILCALL_PROLOGUE_SIZE);
258 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], BPF_TAILCALL_PROLOGUE_SIZE);
260 PPC_MTCTR(b2p[TMP_REG_1]);
262 /* tear down stack, restore NVRs, ... */
263 bpf_jit_emit_common_epilogue(image, ctx);
269 /* Assemble the body code between the prologue & epilogue */
270 static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
271 struct codegen_context *ctx,
272 u32 *addrs, bool extra_pass)
274 const struct bpf_insn *insn = fp->insnsi;
278 /* Start of epilogue code - will only be valid 2nd pass onwards */
279 u32 exit_addr = addrs[flen];
281 for (i = 0; i < flen; i++) {
282 u32 code = insn[i].code;
283 u32 dst_reg = b2p[insn[i].dst_reg];
284 u32 src_reg = b2p[insn[i].src_reg];
285 s16 off = insn[i].off;
286 s32 imm = insn[i].imm;
293 * addrs[] maps a BPF bytecode address into a real offset from
294 * the start of the body code.
296 addrs[i] = ctx->idx * 4;
299 * As an optimization, we note down which non-volatile registers
300 * are used so that we can only save/restore those in our
301 * prologue and epilogue. We do this here regardless of whether
302 * the actual BPF instruction uses src/dst registers or not
303 * (for instance, BPF_CALL does not use them). The expectation
304 * is that those instructions will have src_reg/dst_reg set to
305 * 0. Even otherwise, we just lose some prologue/epilogue
306 * optimization but everything else should work without
309 if (dst_reg >= BPF_PPC_NVR_MIN && dst_reg < 32)
310 bpf_set_seen_register(ctx, insn[i].dst_reg);
311 if (src_reg >= BPF_PPC_NVR_MIN && src_reg < 32)
312 bpf_set_seen_register(ctx, insn[i].src_reg);
316 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG
318 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */
319 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */
320 PPC_ADD(dst_reg, dst_reg, src_reg);
321 goto bpf_alu32_trunc;
322 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */
323 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
324 PPC_SUB(dst_reg, dst_reg, src_reg);
325 goto bpf_alu32_trunc;
326 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */
327 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
328 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */
329 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */
330 if (BPF_OP(code) == BPF_SUB)
333 if (imm >= -32768 && imm < 32768)
334 PPC_ADDI(dst_reg, dst_reg, IMM_L(imm));
336 PPC_LI32(b2p[TMP_REG_1], imm);
337 PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]);
340 goto bpf_alu32_trunc;
341 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */
342 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */
343 if (BPF_CLASS(code) == BPF_ALU)
344 PPC_MULW(dst_reg, dst_reg, src_reg);
346 PPC_MULD(dst_reg, dst_reg, src_reg);
347 goto bpf_alu32_trunc;
348 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */
349 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */
350 if (imm >= -32768 && imm < 32768)
351 PPC_MULI(dst_reg, dst_reg, IMM_L(imm));
353 PPC_LI32(b2p[TMP_REG_1], imm);
354 if (BPF_CLASS(code) == BPF_ALU)
355 PPC_MULW(dst_reg, dst_reg,
358 PPC_MULD(dst_reg, dst_reg,
361 goto bpf_alu32_trunc;
362 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */
363 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */
364 if (BPF_OP(code) == BPF_MOD) {
365 PPC_DIVWU(b2p[TMP_REG_1], dst_reg, src_reg);
366 PPC_MULW(b2p[TMP_REG_1], src_reg,
368 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
370 PPC_DIVWU(dst_reg, dst_reg, src_reg);
371 goto bpf_alu32_trunc;
372 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
373 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
374 if (BPF_OP(code) == BPF_MOD) {
375 PPC_DIVD(b2p[TMP_REG_1], dst_reg, src_reg);
376 PPC_MULD(b2p[TMP_REG_1], src_reg,
378 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
380 PPC_DIVD(dst_reg, dst_reg, src_reg);
382 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
383 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
384 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */
385 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */
389 goto bpf_alu32_trunc;
391 PPC_LI32(b2p[TMP_REG_1], imm);
392 switch (BPF_CLASS(code)) {
394 if (BPF_OP(code) == BPF_MOD) {
395 PPC_DIVWU(b2p[TMP_REG_2], dst_reg,
397 PPC_MULW(b2p[TMP_REG_1],
400 PPC_SUB(dst_reg, dst_reg,
403 PPC_DIVWU(dst_reg, dst_reg,
407 if (BPF_OP(code) == BPF_MOD) {
408 PPC_DIVD(b2p[TMP_REG_2], dst_reg,
410 PPC_MULD(b2p[TMP_REG_1],
413 PPC_SUB(dst_reg, dst_reg,
416 PPC_DIVD(dst_reg, dst_reg,
420 goto bpf_alu32_trunc;
421 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */
422 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
423 PPC_NEG(dst_reg, dst_reg);
424 goto bpf_alu32_trunc;
427 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH
429 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */
430 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
431 PPC_AND(dst_reg, dst_reg, src_reg);
432 goto bpf_alu32_trunc;
433 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */
434 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
436 PPC_ANDI(dst_reg, dst_reg, IMM_L(imm));
439 PPC_LI32(b2p[TMP_REG_1], imm);
440 PPC_AND(dst_reg, dst_reg, b2p[TMP_REG_1]);
442 goto bpf_alu32_trunc;
443 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
444 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
445 PPC_OR(dst_reg, dst_reg, src_reg);
446 goto bpf_alu32_trunc;
447 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */
448 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */
449 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
451 PPC_LI32(b2p[TMP_REG_1], imm);
452 PPC_OR(dst_reg, dst_reg, b2p[TMP_REG_1]);
455 PPC_ORI(dst_reg, dst_reg, IMM_L(imm));
457 PPC_ORIS(dst_reg, dst_reg, IMM_H(imm));
459 goto bpf_alu32_trunc;
460 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */
461 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */
462 PPC_XOR(dst_reg, dst_reg, src_reg);
463 goto bpf_alu32_trunc;
464 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */
465 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */
466 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
468 PPC_LI32(b2p[TMP_REG_1], imm);
469 PPC_XOR(dst_reg, dst_reg, b2p[TMP_REG_1]);
472 PPC_XORI(dst_reg, dst_reg, IMM_L(imm));
474 PPC_XORIS(dst_reg, dst_reg, IMM_H(imm));
476 goto bpf_alu32_trunc;
477 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */
478 /* slw clears top 32 bits */
479 PPC_SLW(dst_reg, dst_reg, src_reg);
481 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */
482 PPC_SLD(dst_reg, dst_reg, src_reg);
484 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */
485 /* with imm 0, we still need to clear top 32 bits */
486 PPC_SLWI(dst_reg, dst_reg, imm);
488 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */
490 PPC_SLDI(dst_reg, dst_reg, imm);
492 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */
493 PPC_SRW(dst_reg, dst_reg, src_reg);
495 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */
496 PPC_SRD(dst_reg, dst_reg, src_reg);
498 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */
499 PPC_SRWI(dst_reg, dst_reg, imm);
501 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */
503 PPC_SRDI(dst_reg, dst_reg, imm);
505 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
506 PPC_SRAD(dst_reg, dst_reg, src_reg);
508 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
510 PPC_SRADI(dst_reg, dst_reg, imm);
516 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
517 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
518 PPC_MR(dst_reg, src_reg);
519 goto bpf_alu32_trunc;
520 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
521 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */
522 PPC_LI32(dst_reg, imm);
524 goto bpf_alu32_trunc;
528 /* Truncate to 32-bits */
529 if (BPF_CLASS(code) == BPF_ALU)
530 PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31);
536 case BPF_ALU | BPF_END | BPF_FROM_LE:
537 case BPF_ALU | BPF_END | BPF_FROM_BE:
538 #ifdef __BIG_ENDIAN__
539 if (BPF_SRC(code) == BPF_FROM_BE)
541 #else /* !__BIG_ENDIAN__ */
542 if (BPF_SRC(code) == BPF_FROM_LE)
547 /* Rotate 8 bits left & mask with 0x0000ff00 */
548 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 16, 23);
549 /* Rotate 8 bits right & insert LSB to reg */
550 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 24, 31);
551 /* Move result back to dst_reg */
552 PPC_MR(dst_reg, b2p[TMP_REG_1]);
556 * Rotate word left by 8 bits:
557 * 2 bytes are already in their final position
558 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4)
560 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 0, 31);
561 /* Rotate 24 bits and insert byte 1 */
562 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 0, 7);
563 /* Rotate 24 bits and insert byte 3 */
564 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 16, 23);
565 PPC_MR(dst_reg, b2p[TMP_REG_1]);
569 * Way easier and faster(?) to store the value
570 * into stack and then use ldbrx
572 * ctx->seen will be reliable in pass2, but
573 * the instructions generated will remain the
574 * same across all passes
576 PPC_STD(dst_reg, 1, bpf_jit_stack_local(ctx));
577 PPC_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx));
578 PPC_LDBRX(dst_reg, 0, b2p[TMP_REG_1]);
586 /* zero-extend 16 bits into 64 bits */
587 PPC_RLDICL(dst_reg, dst_reg, 0, 48);
590 /* zero-extend 32 bits into 64 bits */
591 PPC_RLDICL(dst_reg, dst_reg, 0, 32);
602 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */
603 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
604 if (BPF_CLASS(code) == BPF_ST) {
605 PPC_LI(b2p[TMP_REG_1], imm);
606 src_reg = b2p[TMP_REG_1];
608 PPC_STB(src_reg, dst_reg, off);
610 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
611 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
612 if (BPF_CLASS(code) == BPF_ST) {
613 PPC_LI(b2p[TMP_REG_1], imm);
614 src_reg = b2p[TMP_REG_1];
616 PPC_STH(src_reg, dst_reg, off);
618 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
619 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
620 if (BPF_CLASS(code) == BPF_ST) {
621 PPC_LI32(b2p[TMP_REG_1], imm);
622 src_reg = b2p[TMP_REG_1];
624 PPC_STW(src_reg, dst_reg, off);
626 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
627 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
628 if (BPF_CLASS(code) == BPF_ST) {
629 PPC_LI32(b2p[TMP_REG_1], imm);
630 src_reg = b2p[TMP_REG_1];
632 PPC_STD(src_reg, dst_reg, off);
636 * BPF_STX XADD (atomic_add)
638 /* *(u32 *)(dst + off) += src */
639 case BPF_STX | BPF_XADD | BPF_W:
640 /* Get EA into TMP_REG_1 */
641 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
642 tmp_idx = ctx->idx * 4;
643 /* load value from memory into TMP_REG_2 */
644 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
645 /* add value from src_reg into this */
646 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
647 /* store result back */
648 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
649 /* we're done if this succeeded */
650 PPC_BCC_SHORT(COND_NE, tmp_idx);
652 /* *(u64 *)(dst + off) += src */
653 case BPF_STX | BPF_XADD | BPF_DW:
654 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
655 tmp_idx = ctx->idx * 4;
656 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
657 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
658 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
659 PPC_BCC_SHORT(COND_NE, tmp_idx);
665 /* dst = *(u8 *)(ul) (src + off) */
666 case BPF_LDX | BPF_MEM | BPF_B:
667 PPC_LBZ(dst_reg, src_reg, off);
669 /* dst = *(u16 *)(ul) (src + off) */
670 case BPF_LDX | BPF_MEM | BPF_H:
671 PPC_LHZ(dst_reg, src_reg, off);
673 /* dst = *(u32 *)(ul) (src + off) */
674 case BPF_LDX | BPF_MEM | BPF_W:
675 PPC_LWZ(dst_reg, src_reg, off);
677 /* dst = *(u64 *)(ul) (src + off) */
678 case BPF_LDX | BPF_MEM | BPF_DW:
679 PPC_LD(dst_reg, src_reg, off);
684 * 16 byte instruction that uses two 'struct bpf_insn'
686 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
687 imm64 = ((u64)(u32) insn[i].imm) |
688 (((u64)(u32) insn[i+1].imm) << 32);
689 /* Adjust for two bpf instructions */
690 addrs[++i] = ctx->idx * 4;
691 PPC_LI64(dst_reg, imm64);
697 case BPF_JMP | BPF_EXIT:
699 * If this isn't the very last instruction, branch to
700 * the epilogue. If we _are_ the last instruction,
701 * we'll just fall through to the epilogue.
705 /* else fall through to the epilogue */
709 * Call kernel helper or bpf function
711 case BPF_JMP | BPF_CALL:
712 ctx->seen |= SEEN_FUNC;
714 /* bpf function call */
715 if (insn[i].src_reg == BPF_PSEUDO_CALL)
718 else if (fp->aux->func && off < fp->aux->func_cnt)
719 /* use the subprog id from the off
720 * field to lookup the callee address
722 func = (u8 *) fp->aux->func[off]->bpf_func;
725 /* kernel helper call */
727 func = (u8 *) __bpf_call_base + imm;
729 bpf_jit_emit_func_call(image, ctx, (u64)func);
731 /* move return value from r3 to BPF_REG_0 */
732 PPC_MR(b2p[BPF_REG_0], 3);
738 case BPF_JMP | BPF_JA:
739 PPC_JMP(addrs[i + 1 + off]);
742 case BPF_JMP | BPF_JGT | BPF_K:
743 case BPF_JMP | BPF_JGT | BPF_X:
744 case BPF_JMP | BPF_JSGT | BPF_K:
745 case BPF_JMP | BPF_JSGT | BPF_X:
748 case BPF_JMP | BPF_JLT | BPF_K:
749 case BPF_JMP | BPF_JLT | BPF_X:
750 case BPF_JMP | BPF_JSLT | BPF_K:
751 case BPF_JMP | BPF_JSLT | BPF_X:
754 case BPF_JMP | BPF_JGE | BPF_K:
755 case BPF_JMP | BPF_JGE | BPF_X:
756 case BPF_JMP | BPF_JSGE | BPF_K:
757 case BPF_JMP | BPF_JSGE | BPF_X:
760 case BPF_JMP | BPF_JLE | BPF_K:
761 case BPF_JMP | BPF_JLE | BPF_X:
762 case BPF_JMP | BPF_JSLE | BPF_K:
763 case BPF_JMP | BPF_JSLE | BPF_X:
766 case BPF_JMP | BPF_JEQ | BPF_K:
767 case BPF_JMP | BPF_JEQ | BPF_X:
770 case BPF_JMP | BPF_JNE | BPF_K:
771 case BPF_JMP | BPF_JNE | BPF_X:
774 case BPF_JMP | BPF_JSET | BPF_K:
775 case BPF_JMP | BPF_JSET | BPF_X:
781 case BPF_JMP | BPF_JGT | BPF_X:
782 case BPF_JMP | BPF_JLT | BPF_X:
783 case BPF_JMP | BPF_JGE | BPF_X:
784 case BPF_JMP | BPF_JLE | BPF_X:
785 case BPF_JMP | BPF_JEQ | BPF_X:
786 case BPF_JMP | BPF_JNE | BPF_X:
787 /* unsigned comparison */
788 PPC_CMPLD(dst_reg, src_reg);
790 case BPF_JMP | BPF_JSGT | BPF_X:
791 case BPF_JMP | BPF_JSLT | BPF_X:
792 case BPF_JMP | BPF_JSGE | BPF_X:
793 case BPF_JMP | BPF_JSLE | BPF_X:
794 /* signed comparison */
795 PPC_CMPD(dst_reg, src_reg);
797 case BPF_JMP | BPF_JSET | BPF_X:
798 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, src_reg);
800 case BPF_JMP | BPF_JNE | BPF_K:
801 case BPF_JMP | BPF_JEQ | BPF_K:
802 case BPF_JMP | BPF_JGT | BPF_K:
803 case BPF_JMP | BPF_JLT | BPF_K:
804 case BPF_JMP | BPF_JGE | BPF_K:
805 case BPF_JMP | BPF_JLE | BPF_K:
807 * Need sign-extended load, so only positive
808 * values can be used as imm in cmpldi
810 if (imm >= 0 && imm < 32768)
811 PPC_CMPLDI(dst_reg, imm);
813 /* sign-extending load */
814 PPC_LI32(b2p[TMP_REG_1], imm);
815 /* ... but unsigned comparison */
816 PPC_CMPLD(dst_reg, b2p[TMP_REG_1]);
819 case BPF_JMP | BPF_JSGT | BPF_K:
820 case BPF_JMP | BPF_JSLT | BPF_K:
821 case BPF_JMP | BPF_JSGE | BPF_K:
822 case BPF_JMP | BPF_JSLE | BPF_K:
824 * signed comparison, so any 16-bit value
825 * can be used in cmpdi
827 if (imm >= -32768 && imm < 32768)
828 PPC_CMPDI(dst_reg, imm);
830 PPC_LI32(b2p[TMP_REG_1], imm);
831 PPC_CMPD(dst_reg, b2p[TMP_REG_1]);
834 case BPF_JMP | BPF_JSET | BPF_K:
835 /* andi does not sign-extend the immediate */
836 if (imm >= 0 && imm < 32768)
837 /* PPC_ANDI is _only/always_ dot-form */
838 PPC_ANDI(b2p[TMP_REG_1], dst_reg, imm);
840 PPC_LI32(b2p[TMP_REG_1], imm);
841 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg,
846 PPC_BCC(true_cond, addrs[i + 1 + off]);
852 case BPF_JMP | BPF_TAIL_CALL:
853 ctx->seen |= SEEN_TAILCALL;
854 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]);
859 * The filter contains something cruel & unusual.
860 * We don't handle it, but also there shouldn't be
861 * anything missing from our list.
863 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n",
869 /* Set end-of-body-code address for exit. */
870 addrs[i] = ctx->idx * 4;
875 struct powerpc64_jit_data {
876 struct bpf_binary_header *header;
880 struct codegen_context ctx;
883 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
890 struct powerpc64_jit_data *jit_data;
891 struct codegen_context cgctx;
894 struct bpf_binary_header *bpf_hdr;
895 struct bpf_prog *org_fp = fp;
896 struct bpf_prog *tmp_fp;
897 bool bpf_blinded = false;
898 bool extra_pass = false;
900 if (!fp->jit_requested)
903 tmp_fp = bpf_jit_blind_constants(org_fp);
907 if (tmp_fp != org_fp) {
912 jit_data = fp->aux->jit_data;
914 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
919 fp->aux->jit_data = jit_data;
923 addrs = jit_data->addrs;
925 cgctx = jit_data->ctx;
926 image = jit_data->image;
927 bpf_hdr = jit_data->header;
928 proglen = jit_data->proglen;
929 alloclen = proglen + FUNCTION_DESCR_SIZE;
934 addrs = kcalloc(flen + 1, sizeof(*addrs), GFP_KERNEL);
940 memset(&cgctx, 0, sizeof(struct codegen_context));
942 /* Make sure that the stack is quadword aligned. */
943 cgctx.stack_size = round_up(fp->aux->stack_depth, 16);
945 /* Scouting faux-generate pass 0 */
946 if (bpf_jit_build_body(fp, 0, &cgctx, addrs, false)) {
947 /* We hit something illegal or unsupported. */
953 * Pretend to build prologue, given the features we've seen. This will
954 * update ctgtx.idx as it pretends to output instructions, then we can
955 * calculate total size from idx.
957 bpf_jit_build_prologue(0, &cgctx);
958 bpf_jit_build_epilogue(0, &cgctx);
960 proglen = cgctx.idx * 4;
961 alloclen = proglen + FUNCTION_DESCR_SIZE;
963 bpf_hdr = bpf_jit_binary_alloc(alloclen, &image, 4,
964 bpf_jit_fill_ill_insns);
971 code_base = (u32 *)(image + FUNCTION_DESCR_SIZE);
973 /* Code generation passes 1-2 */
974 for (pass = 1; pass < 3; pass++) {
975 /* Now build the prologue, body code & epilogue for real. */
977 bpf_jit_build_prologue(code_base, &cgctx);
978 bpf_jit_build_body(fp, code_base, &cgctx, addrs, extra_pass);
979 bpf_jit_build_epilogue(code_base, &cgctx);
981 if (bpf_jit_enable > 1)
982 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
983 proglen - (cgctx.idx * 4), cgctx.seen);
986 if (bpf_jit_enable > 1)
988 * Note that we output the base address of the code_base
989 * rather than image, since opcodes are in code_base.
991 bpf_jit_dump(flen, proglen, pass, code_base);
993 #ifdef PPC64_ELF_ABI_v1
994 /* Function descriptor nastiness: Address + TOC */
995 ((u64 *)image)[0] = (u64)code_base;
996 ((u64 *)image)[1] = local_paca->kernel_toc;
999 fp->bpf_func = (void *)image;
1001 fp->jited_len = alloclen;
1003 bpf_flush_icache(bpf_hdr, (u8 *)bpf_hdr + (bpf_hdr->pages * PAGE_SIZE));
1004 if (!fp->is_func || extra_pass) {
1008 fp->aux->jit_data = NULL;
1010 jit_data->addrs = addrs;
1011 jit_data->ctx = cgctx;
1012 jit_data->proglen = proglen;
1013 jit_data->image = image;
1014 jit_data->header = bpf_hdr;
1019 bpf_jit_prog_release_other(fp, fp == org_fp ? tmp_fp : org_fp);
1024 /* Overriding bpf_jit_free() as we don't set images read-only. */
1025 void bpf_jit_free(struct bpf_prog *fp)
1027 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1028 struct bpf_binary_header *bpf_hdr = (void *)addr;
1031 bpf_jit_binary_free(bpf_hdr);
1033 bpf_prog_unlock_free(fp);