arch/sh/cchips/hd6446x/hd64465/setup.c

   1 /*
   2  * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
   3  *
   4  * Setup and IRQ handling code for the HD64465 companion chip.
   5  * by Greg Banks <[email protected]>
   6  * Copyright (c) 2000 PocketPenguins Inc
   7  *
   8  * Derived from setup_hd64461.c which bore the message:
   9  * Copyright (C) 2000 YAEGASHI Takeshi
  10  */
  11
  12 #include <linux/sched.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/param.h>
  16 #include <linux/ioport.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/init.h>
  19 #include <linux/irq.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/irq.h>
  23
  24 #include <asm/hd64465/hd64465.h>
  25
  26 static void disable_hd64465_irq(unsigned int irq)
  27 {
  28         unsigned short nimr;
  29         unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
  30
  31         pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
  32         nimr = inw(HD64465_REG_NIMR);
  33         nimr |= mask;
  34         outw(nimr, HD64465_REG_NIMR);
  35 }
  36
  37
  38 static void enable_hd64465_irq(unsigned int irq)
  39 {
  40         unsigned short nimr;
  41         unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
  42
  43         pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
  44         nimr = inw(HD64465_REG_NIMR);
  45         nimr &= ~mask;
  46         outw(nimr, HD64465_REG_NIMR);
  47 }
  48
  49
  50 static void mask_and_ack_hd64465(unsigned int irq)
  51 {
  52         disable_hd64465_irq(irq);
  53 }
  54
  55
  56 static void end_hd64465_irq(unsigned int irq)
  57 {
  58         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  59                 enable_hd64465_irq(irq);
  60 }
  61
  62
  63 static unsigned int startup_hd64465_irq(unsigned int irq)
  64 {
  65         enable_hd64465_irq(irq);
  66         return 0;
  67 }
  68
  69
  70 static void shutdown_hd64465_irq(unsigned int irq)
  71 {
  72         disable_hd64465_irq(irq);
  73 }
  74
  75
  76 static struct hw_interrupt_type hd64465_irq_type = {
  77         .typename       = "HD64465-IRQ",
  78         .startup        = startup_hd64465_irq,
  79         .shutdown       = shutdown_hd64465_irq,
  80         .enable         = enable_hd64465_irq,
  81         .disable        = disable_hd64465_irq,
  82         .ack            = mask_and_ack_hd64465,
  83         .end            = end_hd64465_irq,
  84 };
  85
  86
  87 static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
  88 {
  89         printk(KERN_INFO
  90                "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
  91                inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
  92
  93         return IRQ_NONE;
  94 }
  95
  96
  97 /*====================================================*/
  98
  99 /*
 100  * Support for a secondary IRQ demux step.  This is necessary
 101  * because the HD64465 presents a very thin interface to the
 102  * PCMCIA bus; a lot of features (such as remapping interrupts)
 103  * normally done in hardware by other PCMCIA host bridges is
 104  * instead done in software.
 105  */
 106 static struct
 107 {
 108     int (*func)(int, void *);
 109     void *dev;
 110 } hd64465_demux[HD64465_IRQ_NUM];
 111
 112 void hd64465_register_irq_demux(int irq,
 113                 int (*demux)(int irq, void *dev), void *dev)
 114 {
 115         hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
 116         hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
 117 }
 118 EXPORT_SYMBOL(hd64465_register_irq_demux);
 119
 120 void hd64465_unregister_irq_demux(int irq)
 121 {
 122         hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
 123 }
 124 EXPORT_SYMBOL(hd64465_unregister_irq_demux);
 125
 126
 127
 128 int hd64465_irq_demux(int irq)
 129 {
 130         if (irq == CONFIG_HD64465_IRQ) {
 131                 unsigned short i, bit;
 132                 unsigned short nirr = inw(HD64465_REG_NIRR);
 133                 unsigned short nimr = inw(HD64465_REG_NIMR);
 134
 135                 pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
 136                 nirr &= ~nimr;
 137                 for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
 138                     if (nirr & bit)
 139                         break;
 140
 141                 if (i < HD64465_IRQ_NUM) {
 142                     irq = HD64465_IRQ_BASE + i;
 143                     if (hd64465_demux[i].func != 0)
 144                         irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
 145                 }
 146         }
 147         return irq;
 148 }
 149
 150 static struct irqaction irq0  = {
 151         .handler = hd64465_interrupt,
 152         .flags = IRQF_DISABLED,
 153         .mask = CPU_MASK_NONE,
 154         .name = "HD64465",
 155 };
 156
 157
 158 static int __init setup_hd64465(void)
 159 {
 160         int i;
 161         unsigned short rev;
 162         unsigned short smscr;
 163
 164         if (!MACH_HD64465)
 165                 return 0;
 166
 167         printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
 168                CONFIG_HD64465_IOBASE,
 169                CONFIG_HD64465_IRQ,
 170                HD64465_IRQ_BASE,
 171                HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
 172
 173         if (inw(HD64465_REG_SDID) != HD64465_SDID) {
 174                 printk(KERN_ERR "HD64465 device ID not found, check base address\n");
 175         }
 176
 177         rev = inw(HD64465_REG_SRR);
 178         printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
 179
 180         outw(0xffff, HD64465_REG_NIMR);         /* mask all interrupts */
 181
 182         for (i = 0; i < HD64465_IRQ_NUM ; i++) {
 183                 irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
 184         }
 185
 186         setup_irq(CONFIG_HD64465_IRQ, &irq0);
 187
 188 #ifdef CONFIG_SERIAL
 189         /* wake up the UART from STANDBY at this point */
 190         smscr = inw(HD64465_REG_SMSCR);
 191         outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
 192
 193         /* remap IO ports for first ISA serial port to HD64465 UART */
 194         hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
 195 #endif
 196
 197         return 0;
 198 }
 199
 200 module_init(setup_hd64465);