4 * Copyright (C) 2013-2015 Altera Corporation
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/mutex.h>
19 #include <linux/platform_device.h>
21 #ifndef _LINUX_FPGA_MGR_H
22 #define _LINUX_FPGA_MGR_H
27 * enum fpga_mgr_states - fpga framework states
28 * @FPGA_MGR_STATE_UNKNOWN: can't determine state
29 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
30 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
31 * @FPGA_MGR_STATE_RESET: FPGA in reset state
32 * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
33 * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
34 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
35 * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
36 * @FPGA_MGR_STATE_WRITE: writing image to FPGA
37 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
38 * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
39 * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
40 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
42 enum fpga_mgr_states {
43 /* default FPGA states */
44 FPGA_MGR_STATE_UNKNOWN,
45 FPGA_MGR_STATE_POWER_OFF,
46 FPGA_MGR_STATE_POWER_UP,
49 /* getting an image for loading */
50 FPGA_MGR_STATE_FIRMWARE_REQ,
51 FPGA_MGR_STATE_FIRMWARE_REQ_ERR,
53 /* write sequence: init, write, complete */
54 FPGA_MGR_STATE_WRITE_INIT,
55 FPGA_MGR_STATE_WRITE_INIT_ERR,
57 FPGA_MGR_STATE_WRITE_ERR,
58 FPGA_MGR_STATE_WRITE_COMPLETE,
59 FPGA_MGR_STATE_WRITE_COMPLETE_ERR,
61 /* fpga is programmed and operating */
62 FPGA_MGR_STATE_OPERATING,
67 * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
69 #define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
72 * struct fpga_image_info - information specific to a FPGA image
73 * @flags: boolean flags as defined above
74 * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
75 * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
77 struct fpga_image_info {
79 u32 enable_timeout_us;
80 u32 disable_timeout_us;
84 * struct fpga_manager_ops - ops for low level fpga manager drivers
85 * @state: returns an enum value of the FPGA's state
86 * @write_init: prepare the FPGA to receive confuration data
87 * @write: write count bytes of configuration data to the FPGA
88 * @write_complete: set FPGA to operating state after writing is done
89 * @fpga_remove: optional: Set FPGA into a specific state during driver remove
91 * fpga_manager_ops are the low level functions implemented by a specific
92 * fpga manager driver. The optional ones are tested for NULL before being
93 * called, so leaving them out is fine.
95 struct fpga_manager_ops {
96 enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
97 int (*write_init)(struct fpga_manager *mgr,
98 struct fpga_image_info *info,
99 const char *buf, size_t count);
100 int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
101 int (*write_complete)(struct fpga_manager *mgr,
102 struct fpga_image_info *info);
103 void (*fpga_remove)(struct fpga_manager *mgr);
107 * struct fpga_manager - fpga manager structure
108 * @name: name of low level fpga manager
109 * @dev: fpga manager device
110 * @ref_mutex: only allows one reference to fpga manager
111 * @state: state of fpga manager
112 * @mops: pointer to struct of fpga manager ops
113 * @priv: low level driver private date
115 struct fpga_manager {
118 struct mutex ref_mutex;
119 enum fpga_mgr_states state;
120 const struct fpga_manager_ops *mops;
124 #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
126 int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
127 const char *buf, size_t count);
129 int fpga_mgr_firmware_load(struct fpga_manager *mgr,
130 struct fpga_image_info *info,
131 const char *image_name);
133 struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
135 struct fpga_manager *fpga_mgr_get(struct device *dev);
137 void fpga_mgr_put(struct fpga_manager *mgr);
139 int fpga_mgr_register(struct device *dev, const char *name,
140 const struct fpga_manager_ops *mops, void *priv);
142 void fpga_mgr_unregister(struct device *dev);
144 #endif /*_LINUX_FPGA_MGR_H */