1 // SPDX-License-Identifier: GPL-2.0
3 * AD5686R, AD5685R, AD5684R Digital to analog converters driver
5 * Copyright 2011 Analog Devices Inc.
8 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/sysfs.h>
15 #include <linux/regulator/consumer.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
22 static const char * const ad5686_powerdown_modes[] = {
28 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
29 const struct iio_chan_spec *chan)
31 struct ad5686_state *st = iio_priv(indio_dev);
33 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
36 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
37 const struct iio_chan_spec *chan,
40 struct ad5686_state *st = iio_priv(indio_dev);
42 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
43 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
48 static const struct iio_enum ad5686_powerdown_mode_enum = {
49 .items = ad5686_powerdown_modes,
50 .num_items = ARRAY_SIZE(ad5686_powerdown_modes),
51 .get = ad5686_get_powerdown_mode,
52 .set = ad5686_set_powerdown_mode,
55 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
56 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
58 struct ad5686_state *st = iio_priv(indio_dev);
60 return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
61 (0x3 << (chan->channel * 2))));
64 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
66 const struct iio_chan_spec *chan,
72 struct ad5686_state *st = iio_priv(indio_dev);
73 unsigned int val, ref_bit_msk;
74 u8 shift, address = 0;
76 ret = strtobool(buf, &readin);
81 st->pwr_down_mask |= (0x3 << (chan->channel * 2));
83 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
85 switch (st->chip_info->regmap_type) {
88 ref_bit_msk = AD5310_REF_BIT_MSK;
92 ref_bit_msk = AD5683_REF_BIT_MSK;
97 /* AD5674R/AD5679R have 16 channels and 2 powerdown registers */
98 if (chan->channel > 0x7)
103 ref_bit_msk = AD5693_REF_BIT_MSK;
109 val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
110 if (!st->use_internal_vref)
113 ret = st->write(st, AD5686_CMD_POWERDOWN_DAC,
114 address, val >> (address * 2));
116 return ret ? ret : len;
119 static int ad5686_read_raw(struct iio_dev *indio_dev,
120 struct iio_chan_spec const *chan,
125 struct ad5686_state *st = iio_priv(indio_dev);
129 case IIO_CHAN_INFO_RAW:
130 mutex_lock(&indio_dev->mlock);
131 ret = st->read(st, chan->address);
132 mutex_unlock(&indio_dev->mlock);
135 *val = (ret >> chan->scan_type.shift) &
136 GENMASK(chan->scan_type.realbits - 1, 0);
138 case IIO_CHAN_INFO_SCALE:
140 *val2 = chan->scan_type.realbits;
141 return IIO_VAL_FRACTIONAL_LOG2;
146 static int ad5686_write_raw(struct iio_dev *indio_dev,
147 struct iio_chan_spec const *chan,
152 struct ad5686_state *st = iio_priv(indio_dev);
156 case IIO_CHAN_INFO_RAW:
157 if (val > (1 << chan->scan_type.realbits) || val < 0)
160 mutex_lock(&indio_dev->mlock);
162 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
164 val << chan->scan_type.shift);
165 mutex_unlock(&indio_dev->mlock);
174 static const struct iio_info ad5686_info = {
175 .read_raw = ad5686_read_raw,
176 .write_raw = ad5686_write_raw,
179 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
182 .read = ad5686_read_dac_powerdown,
183 .write = ad5686_write_dac_powerdown,
184 .shared = IIO_SEPARATE,
186 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
187 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
191 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \
192 .type = IIO_VOLTAGE, \
196 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
197 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
201 .realbits = (bits), \
205 .ext_info = ad5686_ext_info, \
208 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
209 static struct iio_chan_spec name[] = { \
210 AD5868_CHANNEL(0, 0, bits, _shift), \
213 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
214 static struct iio_chan_spec name[] = { \
215 AD5868_CHANNEL(0, 1, bits, _shift), \
216 AD5868_CHANNEL(1, 2, bits, _shift), \
217 AD5868_CHANNEL(2, 4, bits, _shift), \
218 AD5868_CHANNEL(3, 8, bits, _shift), \
221 #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \
222 static struct iio_chan_spec name[] = { \
223 AD5868_CHANNEL(0, 0, bits, _shift), \
224 AD5868_CHANNEL(1, 1, bits, _shift), \
225 AD5868_CHANNEL(2, 2, bits, _shift), \
226 AD5868_CHANNEL(3, 3, bits, _shift), \
227 AD5868_CHANNEL(4, 4, bits, _shift), \
228 AD5868_CHANNEL(5, 5, bits, _shift), \
229 AD5868_CHANNEL(6, 6, bits, _shift), \
230 AD5868_CHANNEL(7, 7, bits, _shift), \
233 #define DECLARE_AD5679_CHANNELS(name, bits, _shift) \
234 static struct iio_chan_spec name[] = { \
235 AD5868_CHANNEL(0, 0, bits, _shift), \
236 AD5868_CHANNEL(1, 1, bits, _shift), \
237 AD5868_CHANNEL(2, 2, bits, _shift), \
238 AD5868_CHANNEL(3, 3, bits, _shift), \
239 AD5868_CHANNEL(4, 4, bits, _shift), \
240 AD5868_CHANNEL(5, 5, bits, _shift), \
241 AD5868_CHANNEL(6, 6, bits, _shift), \
242 AD5868_CHANNEL(7, 7, bits, _shift), \
243 AD5868_CHANNEL(8, 8, bits, _shift), \
244 AD5868_CHANNEL(9, 9, bits, _shift), \
245 AD5868_CHANNEL(10, 10, bits, _shift), \
246 AD5868_CHANNEL(11, 11, bits, _shift), \
247 AD5868_CHANNEL(12, 12, bits, _shift), \
248 AD5868_CHANNEL(13, 13, bits, _shift), \
249 AD5868_CHANNEL(14, 14, bits, _shift), \
250 AD5868_CHANNEL(15, 15, bits, _shift), \
253 DECLARE_AD5693_CHANNELS(ad5310r_channels, 10, 2);
254 DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6);
255 DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4);
256 DECLARE_AD5679_CHANNELS(ad5674r_channels, 12, 4);
257 DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
258 DECLARE_AD5679_CHANNELS(ad5679r_channels, 16, 0);
259 DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
260 DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
261 DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
262 DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
263 DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
264 DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
266 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
268 .channels = ad5310r_channels,
271 .regmap_type = AD5310_REGMAP,
274 .channels = ad5311r_channels,
277 .regmap_type = AD5693_REGMAP,
280 .channels = ad5672_channels,
283 .regmap_type = AD5686_REGMAP,
286 .channels = ad5672_channels,
289 .regmap_type = AD5686_REGMAP,
292 .channels = ad5674r_channels,
295 .regmap_type = AD5686_REGMAP,
298 .channels = ad5676_channels,
301 .regmap_type = AD5686_REGMAP,
304 .channels = ad5676_channels,
306 .regmap_type = AD5686_REGMAP,
309 .channels = ad5676_channels,
312 .regmap_type = AD5686_REGMAP,
315 .channels = ad5679r_channels,
318 .regmap_type = AD5686_REGMAP,
321 .channels = ad5691r_channels,
324 .regmap_type = AD5683_REGMAP,
327 .channels = ad5692r_channels,
330 .regmap_type = AD5683_REGMAP,
333 .channels = ad5693_channels,
335 .regmap_type = AD5683_REGMAP,
338 .channels = ad5693_channels,
341 .regmap_type = AD5683_REGMAP,
344 .channels = ad5684_channels,
346 .regmap_type = AD5686_REGMAP,
349 .channels = ad5684_channels,
352 .regmap_type = AD5686_REGMAP,
355 .channels = ad5685r_channels,
358 .regmap_type = AD5686_REGMAP,
361 .channels = ad5686_channels,
363 .regmap_type = AD5686_REGMAP,
366 .channels = ad5686_channels,
369 .regmap_type = AD5686_REGMAP,
372 .channels = ad5691r_channels,
375 .regmap_type = AD5693_REGMAP,
378 .channels = ad5692r_channels,
381 .regmap_type = AD5693_REGMAP,
384 .channels = ad5693_channels,
386 .regmap_type = AD5693_REGMAP,
389 .channels = ad5693_channels,
392 .regmap_type = AD5693_REGMAP,
395 .channels = ad5684_channels,
397 .regmap_type = AD5686_REGMAP,
400 .channels = ad5684_channels,
403 .regmap_type = AD5686_REGMAP,
406 .channels = ad5686_channels,
408 .regmap_type = AD5686_REGMAP,
411 .channels = ad5686_channels,
414 .regmap_type = AD5686_REGMAP,
418 int ad5686_probe(struct device *dev,
419 enum ad5686_supported_device_ids chip_type,
420 const char *name, ad5686_write_func write,
421 ad5686_read_func read)
423 struct ad5686_state *st;
424 struct iio_dev *indio_dev;
425 unsigned int val, ref_bit_msk;
427 int ret, i, voltage_uv = 0;
429 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
430 if (indio_dev == NULL)
433 st = iio_priv(indio_dev);
434 dev_set_drvdata(dev, indio_dev);
440 st->reg = devm_regulator_get_optional(dev, "vcc");
441 if (!IS_ERR(st->reg)) {
442 ret = regulator_enable(st->reg);
446 ret = regulator_get_voltage(st->reg);
448 goto error_disable_reg;
453 st->chip_info = &ad5686_chip_info_tbl[chip_type];
456 st->vref_mv = voltage_uv / 1000;
458 st->vref_mv = st->chip_info->int_vref_mv;
460 /* Set all the power down mode for all channels to 1K pulldown */
461 for (i = 0; i < st->chip_info->num_channels; i++)
462 st->pwr_down_mode |= (0x01 << (i * 2));
464 indio_dev->dev.parent = dev;
465 indio_dev->name = name;
466 indio_dev->info = &ad5686_info;
467 indio_dev->modes = INDIO_DIRECT_MODE;
468 indio_dev->channels = st->chip_info->channels;
469 indio_dev->num_channels = st->chip_info->num_channels;
471 switch (st->chip_info->regmap_type) {
473 cmd = AD5686_CMD_CONTROL_REG;
474 ref_bit_msk = AD5310_REF_BIT_MSK;
475 st->use_internal_vref = !voltage_uv;
478 cmd = AD5686_CMD_CONTROL_REG;
479 ref_bit_msk = AD5683_REF_BIT_MSK;
480 st->use_internal_vref = !voltage_uv;
483 cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
487 cmd = AD5686_CMD_CONTROL_REG;
488 ref_bit_msk = AD5693_REF_BIT_MSK;
489 st->use_internal_vref = !voltage_uv;
493 goto error_disable_reg;
496 val = (voltage_uv | ref_bit_msk);
498 ret = st->write(st, cmd, 0, !!val);
500 goto error_disable_reg;
502 ret = iio_device_register(indio_dev);
504 goto error_disable_reg;
509 if (!IS_ERR(st->reg))
510 regulator_disable(st->reg);
513 EXPORT_SYMBOL_GPL(ad5686_probe);
515 int ad5686_remove(struct device *dev)
517 struct iio_dev *indio_dev = dev_get_drvdata(dev);
518 struct ad5686_state *st = iio_priv(indio_dev);
520 iio_device_unregister(indio_dev);
521 if (!IS_ERR(st->reg))
522 regulator_disable(st->reg);
526 EXPORT_SYMBOL_GPL(ad5686_remove);
529 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
530 MODULE_LICENSE("GPL v2");