2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
19 #include <linux/iommu.h>
20 #include <linux/bpf.h>
21 #include <linux/bpf_trace.h>
22 #include <linux/filter.h>
23 #include <linux/net_tstamp.h>
24 #include <linux/workqueue.h>
28 #include "nicvf_queues.h"
29 #include "thunder_bgx.h"
30 #include "../common/cavium_ptp.h"
32 #define DRV_NAME "nicvf"
33 #define DRV_VERSION "1.0"
35 /* Supported devices */
36 static const struct pci_device_id nicvf_id_table[] = {
37 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
38 PCI_DEVICE_ID_THUNDER_NIC_VF,
40 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
41 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
42 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
44 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
45 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
46 PCI_DEVICE_ID_THUNDER_NIC_VF,
48 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
49 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
50 PCI_DEVICE_ID_THUNDER_NIC_VF,
52 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
53 { 0, } /* end of table */
56 MODULE_AUTHOR("Sunil Goutham");
57 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
58 MODULE_LICENSE("GPL v2");
59 MODULE_VERSION(DRV_VERSION);
60 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
62 static int debug = 0x00;
63 module_param(debug, int, 0644);
64 MODULE_PARM_DESC(debug, "Debug message level bitmap");
66 static int cpi_alg = CPI_ALG_NONE;
67 module_param(cpi_alg, int, 0444);
68 MODULE_PARM_DESC(cpi_alg,
69 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
71 /* workqueue for handling kernel ndo_set_rx_mode() calls */
72 static struct workqueue_struct *nicvf_rx_mode_wq;
74 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
77 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
82 /* The Cavium ThunderX network controller can *only* be found in SoCs
83 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
84 * registers on this platform are implicitly strongly ordered with respect
85 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
86 * with no memory barriers in this driver. The readq()/writeq() functions add
87 * explicit ordering operation which in this case are redundant, and only
91 /* Register read/write APIs */
92 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
94 writeq_relaxed(val, nic->reg_base + offset);
97 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
99 return readq_relaxed(nic->reg_base + offset);
102 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
105 void __iomem *addr = nic->reg_base + offset;
107 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
110 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
112 void __iomem *addr = nic->reg_base + offset;
114 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
117 /* VF -> PF mailbox communication */
118 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
120 u64 *msg = (u64 *)mbx;
122 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
123 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
126 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
128 int timeout = NIC_MBOX_MSG_TIMEOUT;
131 nic->pf_acked = false;
132 nic->pf_nacked = false;
134 nicvf_write_to_mbx(nic, mbx);
136 /* Wait for previous message to be acked, timeout 2sec */
137 while (!nic->pf_acked) {
138 if (nic->pf_nacked) {
139 netdev_err(nic->netdev,
140 "PF NACK to mbox msg 0x%02x from VF%d\n",
141 (mbx->msg.msg & 0xFF), nic->vf_id);
149 netdev_err(nic->netdev,
150 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
151 (mbx->msg.msg & 0xFF), nic->vf_id);
158 /* Checks if VF is able to comminicate with PF
159 * and also gets the VNIC number this VF is associated to.
161 static int nicvf_check_pf_ready(struct nicvf *nic)
163 union nic_mbx mbx = {};
165 mbx.msg.msg = NIC_MBOX_MSG_READY;
166 if (nicvf_send_msg_to_pf(nic, &mbx)) {
167 netdev_err(nic->netdev,
168 "PF didn't respond to READY msg\n");
175 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
178 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
180 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
183 static void nicvf_handle_mbx_intr(struct nicvf *nic)
185 union nic_mbx mbx = {};
190 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
191 mbx_data = (u64 *)&mbx;
193 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
194 *mbx_data = nicvf_reg_read(nic, mbx_addr);
196 mbx_addr += sizeof(u64);
199 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
200 switch (mbx.msg.msg) {
201 case NIC_MBOX_MSG_READY:
202 nic->pf_acked = true;
203 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
204 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
205 nic->node = mbx.nic_cfg.node_id;
206 if (!nic->set_mac_pending)
207 ether_addr_copy(nic->netdev->dev_addr,
208 mbx.nic_cfg.mac_addr);
209 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
210 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
211 nic->link_up = false;
215 case NIC_MBOX_MSG_ACK:
216 nic->pf_acked = true;
218 case NIC_MBOX_MSG_NACK:
219 nic->pf_nacked = true;
221 case NIC_MBOX_MSG_RSS_SIZE:
222 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
223 nic->pf_acked = true;
225 case NIC_MBOX_MSG_BGX_STATS:
226 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
227 nic->pf_acked = true;
229 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
230 nic->pf_acked = true;
231 nic->link_up = mbx.link_status.link_up;
232 nic->duplex = mbx.link_status.duplex;
233 nic->speed = mbx.link_status.speed;
234 nic->mac_type = mbx.link_status.mac_type;
236 netdev_info(nic->netdev, "Link is Up %d Mbps %s duplex\n",
238 nic->duplex == DUPLEX_FULL ?
240 netif_carrier_on(nic->netdev);
241 netif_tx_start_all_queues(nic->netdev);
243 netdev_info(nic->netdev, "Link is Down\n");
244 netif_carrier_off(nic->netdev);
245 netif_tx_stop_all_queues(nic->netdev);
248 case NIC_MBOX_MSG_ALLOC_SQS:
249 nic->sqs_count = mbx.sqs_alloc.qs_count;
250 nic->pf_acked = true;
252 case NIC_MBOX_MSG_SNICVF_PTR:
253 /* Primary VF: make note of secondary VF's pointer
254 * to be used while packet transmission.
256 nic->snicvf[mbx.nicvf.sqs_id] =
257 (struct nicvf *)mbx.nicvf.nicvf;
258 nic->pf_acked = true;
260 case NIC_MBOX_MSG_PNICVF_PTR:
261 /* Secondary VF/Qset: make note of primary VF's pointer
262 * to be used while packet reception, to handover packet
263 * to primary VF's netdev.
265 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
266 nic->pf_acked = true;
268 case NIC_MBOX_MSG_PFC:
269 nic->pfc.autoneg = mbx.pfc.autoneg;
270 nic->pfc.fc_rx = mbx.pfc.fc_rx;
271 nic->pfc.fc_tx = mbx.pfc.fc_tx;
272 nic->pf_acked = true;
275 netdev_err(nic->netdev,
276 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
279 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
282 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
284 union nic_mbx mbx = {};
286 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
287 mbx.mac.vf_id = nic->vf_id;
288 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
290 return nicvf_send_msg_to_pf(nic, &mbx);
293 static void nicvf_config_cpi(struct nicvf *nic)
295 union nic_mbx mbx = {};
297 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
298 mbx.cpi_cfg.vf_id = nic->vf_id;
299 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
300 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
302 nicvf_send_msg_to_pf(nic, &mbx);
305 static void nicvf_get_rss_size(struct nicvf *nic)
307 union nic_mbx mbx = {};
309 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
310 mbx.rss_size.vf_id = nic->vf_id;
311 nicvf_send_msg_to_pf(nic, &mbx);
314 void nicvf_config_rss(struct nicvf *nic)
316 union nic_mbx mbx = {};
317 struct nicvf_rss_info *rss = &nic->rss_info;
318 int ind_tbl_len = rss->rss_size;
321 mbx.rss_cfg.vf_id = nic->vf_id;
322 mbx.rss_cfg.hash_bits = rss->hash_bits;
323 while (ind_tbl_len) {
324 mbx.rss_cfg.tbl_offset = nextq;
325 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
326 RSS_IND_TBL_LEN_PER_MBX_MSG);
327 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
328 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
330 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
331 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
333 nicvf_send_msg_to_pf(nic, &mbx);
335 ind_tbl_len -= mbx.rss_cfg.tbl_len;
339 void nicvf_set_rss_key(struct nicvf *nic)
341 struct nicvf_rss_info *rss = &nic->rss_info;
342 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
345 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
346 nicvf_reg_write(nic, key_addr, rss->key[idx]);
347 key_addr += sizeof(u64);
351 static int nicvf_rss_init(struct nicvf *nic)
353 struct nicvf_rss_info *rss = &nic->rss_info;
356 nicvf_get_rss_size(nic);
358 if (cpi_alg != CPI_ALG_NONE) {
366 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
367 nicvf_set_rss_key(nic);
369 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
370 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
372 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
374 for (idx = 0; idx < rss->rss_size; idx++)
375 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
377 nicvf_config_rss(nic);
381 /* Request PF to allocate additional Qsets */
382 static void nicvf_request_sqs(struct nicvf *nic)
384 union nic_mbx mbx = {};
386 int sqs_count = nic->sqs_count;
387 int rx_queues = 0, tx_queues = 0;
389 /* Only primary VF should request */
390 if (nic->sqs_mode || !nic->sqs_count)
393 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
394 mbx.sqs_alloc.vf_id = nic->vf_id;
395 mbx.sqs_alloc.qs_count = nic->sqs_count;
396 if (nicvf_send_msg_to_pf(nic, &mbx)) {
397 /* No response from PF */
402 /* Return if no Secondary Qsets available */
406 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
407 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
409 tx_queues = nic->tx_queues + nic->xdp_tx_queues;
410 if (tx_queues > MAX_SND_QUEUES_PER_QS)
411 tx_queues = tx_queues - MAX_SND_QUEUES_PER_QS;
413 /* Set no of Rx/Tx queues in each of the SQsets */
414 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
415 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
416 mbx.nicvf.vf_id = nic->vf_id;
417 mbx.nicvf.sqs_id = sqs;
418 nicvf_send_msg_to_pf(nic, &mbx);
420 nic->snicvf[sqs]->sqs_id = sqs;
421 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
422 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
423 rx_queues -= MAX_RCV_QUEUES_PER_QS;
425 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
429 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
430 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
431 tx_queues -= MAX_SND_QUEUES_PER_QS;
433 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
437 nic->snicvf[sqs]->qs->cq_cnt =
438 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
440 /* Initialize secondary Qset's queues and its interrupts */
441 nicvf_open(nic->snicvf[sqs]->netdev);
444 /* Update stack with actual Rx/Tx queue count allocated */
445 if (sqs_count != nic->sqs_count)
446 nicvf_set_real_num_queues(nic->netdev,
447 nic->tx_queues, nic->rx_queues);
450 /* Send this Qset's nicvf pointer to PF.
451 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
452 * so that packets received by these Qsets can use primary VF's netdev
454 static void nicvf_send_vf_struct(struct nicvf *nic)
456 union nic_mbx mbx = {};
458 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
459 mbx.nicvf.sqs_mode = nic->sqs_mode;
460 mbx.nicvf.nicvf = (u64)nic;
461 nicvf_send_msg_to_pf(nic, &mbx);
464 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
466 union nic_mbx mbx = {};
468 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
469 nicvf_send_msg_to_pf(nic, &mbx);
472 int nicvf_set_real_num_queues(struct net_device *netdev,
473 int tx_queues, int rx_queues)
477 err = netif_set_real_num_tx_queues(netdev, tx_queues);
480 "Failed to set no of Tx queues: %d\n", tx_queues);
484 err = netif_set_real_num_rx_queues(netdev, rx_queues);
487 "Failed to set no of Rx queues: %d\n", rx_queues);
491 static int nicvf_init_resources(struct nicvf *nic)
496 nicvf_qset_config(nic, true);
498 /* Initialize queues and HW for data transfer */
499 err = nicvf_config_data_transfer(nic, true);
501 netdev_err(nic->netdev,
502 "Failed to alloc/config VF's QSet resources\n");
509 static inline bool nicvf_xdp_rx(struct nicvf *nic, struct bpf_prog *prog,
510 struct cqe_rx_t *cqe_rx, struct snd_queue *sq,
511 struct rcv_queue *rq, struct sk_buff **skb)
517 u64 dma_addr, cpu_addr;
520 /* Retrieve packet buffer's DMA address and length */
521 len = *((u16 *)((void *)cqe_rx + (3 * sizeof(u64))));
522 dma_addr = *((u64 *)((void *)cqe_rx + (7 * sizeof(u64))));
524 cpu_addr = nicvf_iova_to_phys(nic, dma_addr);
527 cpu_addr = (u64)phys_to_virt(cpu_addr);
528 page = virt_to_page((void *)cpu_addr);
530 xdp.data_hard_start = page_address(page);
531 xdp.data = (void *)cpu_addr;
532 xdp_set_data_meta_invalid(&xdp);
533 xdp.data_end = xdp.data + len;
534 xdp.rxq = &rq->xdp_rxq;
535 orig_data = xdp.data;
538 action = bpf_prog_run_xdp(prog, &xdp);
541 len = xdp.data_end - xdp.data;
542 /* Check if XDP program has changed headers */
543 if (orig_data != xdp.data) {
544 offset = orig_data - xdp.data;
550 /* Check if it's a recycled page, if not
551 * unmap the DMA mapping.
553 * Recycled page holds an extra reference.
555 if (page_ref_count(page) == 1) {
556 dma_addr &= PAGE_MASK;
557 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
558 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
560 DMA_ATTR_SKIP_CPU_SYNC);
563 /* Build SKB and pass on packet to network stack */
564 *skb = build_skb(xdp.data,
565 RCV_FRAG_LEN - cqe_rx->align_pad + offset);
572 nicvf_xdp_sq_append_pkt(nic, sq, (u64)xdp.data, dma_addr, len);
575 bpf_warn_invalid_xdp_action(action);
578 trace_xdp_exception(nic->netdev, prog, action);
581 /* Check if it's a recycled page, if not
582 * unmap the DMA mapping.
584 * Recycled page holds an extra reference.
586 if (page_ref_count(page) == 1) {
587 dma_addr &= PAGE_MASK;
588 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
589 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
591 DMA_ATTR_SKIP_CPU_SYNC);
599 static void nicvf_snd_ptp_handler(struct net_device *netdev,
600 struct cqe_send_t *cqe_tx)
602 struct nicvf *nic = netdev_priv(netdev);
603 struct skb_shared_hwtstamps ts;
608 /* Sync for 'ptp_skb' */
611 /* New timestamp request can be queued now */
612 atomic_set(&nic->tx_ptp_skbs, 0);
614 /* Check for timestamp requested skb */
618 /* Check if timestamping is timedout, which is set to 10us */
619 if (cqe_tx->send_status == CQ_TX_ERROP_TSTMP_TIMEOUT ||
620 cqe_tx->send_status == CQ_TX_ERROP_TSTMP_CONFLICT)
623 /* Get the timestamp */
624 memset(&ts, 0, sizeof(ts));
625 ns = cavium_ptp_tstamp2time(nic->ptp_clock, cqe_tx->ptp_timestamp);
626 ts.hwtstamp = ns_to_ktime(ns);
627 skb_tstamp_tx(nic->ptp_skb, &ts);
630 /* Free the original skb */
631 dev_kfree_skb_any(nic->ptp_skb);
637 static void nicvf_snd_pkt_handler(struct net_device *netdev,
638 struct cqe_send_t *cqe_tx,
639 int budget, int *subdesc_cnt,
640 unsigned int *tx_pkts, unsigned int *tx_bytes)
642 struct sk_buff *skb = NULL;
644 struct nicvf *nic = netdev_priv(netdev);
645 struct snd_queue *sq;
646 struct sq_hdr_subdesc *hdr;
647 struct sq_hdr_subdesc *tso_sqe;
649 sq = &nic->qs->sq[cqe_tx->sq_idx];
651 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
652 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
655 /* Check for errors */
656 if (cqe_tx->send_status)
657 nicvf_check_cqe_tx_errs(nic->pnicvf, cqe_tx);
659 /* Is this a XDP designated Tx queue */
661 page = (struct page *)sq->xdp_page[cqe_tx->sqe_ptr];
662 /* Check if it's recycled page or else unmap DMA mapping */
663 if (page && (page_ref_count(page) == 1))
664 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
667 /* Release page reference for recycling */
670 sq->xdp_page[cqe_tx->sqe_ptr] = (u64)NULL;
671 *subdesc_cnt += hdr->subdesc_cnt + 1;
675 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
677 /* Check for dummy descriptor used for HW TSO offload on 88xx */
678 if (hdr->dont_send) {
679 /* Get actual TSO descriptors and free them */
681 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
682 nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2,
683 tso_sqe->subdesc_cnt);
684 *subdesc_cnt += tso_sqe->subdesc_cnt + 1;
686 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
689 *subdesc_cnt += hdr->subdesc_cnt + 1;
692 *tx_bytes += skb->len;
693 /* If timestamp is requested for this skb, don't free it */
694 if (skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
695 !nic->pnicvf->ptp_skb)
696 nic->pnicvf->ptp_skb = skb;
698 napi_consume_skb(skb, budget);
699 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
701 /* In case of SW TSO on 88xx, only last segment will have
702 * a SKB attached, so just free SQEs here.
705 *subdesc_cnt += hdr->subdesc_cnt + 1;
709 static inline void nicvf_set_rxhash(struct net_device *netdev,
710 struct cqe_rx_t *cqe_rx,
716 if (!(netdev->features & NETIF_F_RXHASH))
719 switch (cqe_rx->rss_alg) {
722 hash_type = PKT_HASH_TYPE_L4;
723 hash = cqe_rx->rss_tag;
726 hash_type = PKT_HASH_TYPE_L3;
727 hash = cqe_rx->rss_tag;
730 hash_type = PKT_HASH_TYPE_NONE;
734 skb_set_hash(skb, hash, hash_type);
737 static inline void nicvf_set_rxtstamp(struct nicvf *nic, struct sk_buff *skb)
741 if (!nic->ptp_clock || !nic->hw_rx_tstamp)
744 /* The first 8 bytes is the timestamp */
745 ns = cavium_ptp_tstamp2time(nic->ptp_clock,
746 be64_to_cpu(*(__be64 *)skb->data));
747 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
752 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
753 struct napi_struct *napi,
754 struct cqe_rx_t *cqe_rx,
755 struct snd_queue *sq, struct rcv_queue *rq)
757 struct sk_buff *skb = NULL;
758 struct nicvf *nic = netdev_priv(netdev);
759 struct nicvf *snic = nic;
763 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
766 /* Use primary VF's 'nicvf' struct */
768 netdev = nic->netdev;
771 /* Check for errors */
772 if (cqe_rx->err_level || cqe_rx->err_opcode) {
773 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
774 if (err && !cqe_rx->rb_cnt)
778 /* For XDP, ignore pkts spanning multiple pages */
779 if (nic->xdp_prog && (cqe_rx->rb_cnt == 1)) {
780 /* Packet consumed by XDP */
781 if (nicvf_xdp_rx(snic, nic->xdp_prog, cqe_rx, sq, rq, &skb))
784 skb = nicvf_get_rcv_skb(snic, cqe_rx,
785 nic->xdp_prog ? true : false);
791 if (netif_msg_pktdata(nic)) {
792 netdev_info(nic->netdev, "skb 0x%p, len=%d\n", skb, skb->len);
793 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
794 skb->data, skb->len, true);
797 /* If error packet, drop it here */
799 dev_kfree_skb_any(skb);
803 nicvf_set_rxtstamp(nic, skb);
804 nicvf_set_rxhash(netdev, cqe_rx, skb);
806 skb_record_rx_queue(skb, rq_idx);
807 if (netdev->hw_features & NETIF_F_RXCSUM) {
808 /* HW by default verifies TCP/UDP/SCTP checksums */
809 skb->ip_summed = CHECKSUM_UNNECESSARY;
811 skb_checksum_none_assert(skb);
814 skb->protocol = eth_type_trans(skb, netdev);
816 /* Check for stripped VLAN */
817 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
818 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
819 ntohs((__force __be16)cqe_rx->vlan_tci));
821 if (napi && (netdev->features & NETIF_F_GRO))
822 napi_gro_receive(napi, skb);
824 netif_receive_skb(skb);
827 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
828 struct napi_struct *napi, int budget)
830 int processed_cqe, work_done = 0, tx_done = 0;
831 int cqe_count, cqe_head;
833 struct nicvf *nic = netdev_priv(netdev);
834 struct queue_set *qs = nic->qs;
835 struct cmp_queue *cq = &qs->cq[cq_idx];
836 struct cqe_rx_t *cq_desc;
837 struct netdev_queue *txq;
838 struct snd_queue *sq = &qs->sq[cq_idx];
839 struct rcv_queue *rq = &qs->rq[cq_idx];
840 unsigned int tx_pkts = 0, tx_bytes = 0, txq_idx;
842 spin_lock_bh(&cq->lock);
845 /* Get no of valid CQ entries to process */
846 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
847 cqe_count &= CQ_CQE_COUNT;
851 /* Get head of the valid CQ entries */
852 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
855 while (processed_cqe < cqe_count) {
856 /* Get the CQ descriptor */
857 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
859 cqe_head &= (cq->dmem.q_len - 1);
860 /* Initiate prefetch for next descriptor */
861 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
863 if ((work_done >= budget) && napi &&
864 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
868 switch (cq_desc->cqe_type) {
870 nicvf_rcv_pkt_handler(netdev, napi, cq_desc, sq, rq);
874 nicvf_snd_pkt_handler(netdev, (void *)cq_desc,
875 budget, &subdesc_cnt,
876 &tx_pkts, &tx_bytes);
879 case CQE_TYPE_SEND_PTP:
880 nicvf_snd_ptp_handler(netdev, (void *)cq_desc);
882 case CQE_TYPE_INVALID:
883 case CQE_TYPE_RX_SPLIT:
884 case CQE_TYPE_RX_TCP:
891 /* Ring doorbell to inform H/W to reuse processed CQEs */
892 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
893 cq_idx, processed_cqe);
895 if ((work_done < budget) && napi)
899 /* Update SQ's descriptor free count */
901 nicvf_put_sq_desc(sq, subdesc_cnt);
903 txq_idx = nicvf_netdev_qidx(nic, cq_idx);
904 /* Handle XDP TX queues */
905 if (nic->pnicvf->xdp_prog) {
906 if (txq_idx < nic->pnicvf->xdp_tx_queues) {
907 nicvf_xdp_sq_doorbell(nic, sq, cq_idx);
911 txq_idx -= nic->pnicvf->xdp_tx_queues;
914 /* Wakeup TXQ if its stopped earlier due to SQ full */
916 (atomic_read(&sq->free_cnt) >= MIN_SQ_DESC_PER_PKT_XMIT)) {
917 netdev = nic->pnicvf->netdev;
918 txq = netdev_get_tx_queue(netdev, txq_idx);
920 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
922 /* To read updated queue and carrier status */
924 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
925 netif_tx_wake_queue(txq);
927 this_cpu_inc(nic->drv_stats->txq_wake);
928 netif_warn(nic, tx_err, netdev,
929 "Transmit queue wakeup SQ%d\n", txq_idx);
934 spin_unlock_bh(&cq->lock);
938 static int nicvf_poll(struct napi_struct *napi, int budget)
942 struct net_device *netdev = napi->dev;
943 struct nicvf *nic = netdev_priv(netdev);
944 struct nicvf_cq_poll *cq;
946 cq = container_of(napi, struct nicvf_cq_poll, napi);
947 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
949 if (work_done < budget) {
950 /* Slow packet rate, exit polling */
951 napi_complete_done(napi, work_done);
952 /* Re-enable interrupts */
953 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
955 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
956 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
957 cq->cq_idx, cq_head);
958 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
963 /* Qset error interrupt handler
965 * As of now only CQ errors are handled
967 static void nicvf_handle_qs_err(unsigned long data)
969 struct nicvf *nic = (struct nicvf *)data;
970 struct queue_set *qs = nic->qs;
974 netif_tx_disable(nic->netdev);
976 /* Check if it is CQ err */
977 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
978 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
980 if (!(status & CQ_ERR_MASK))
982 /* Process already queued CQEs and reconfig CQ */
983 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
984 nicvf_sq_disable(nic, qidx);
985 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
986 nicvf_cmp_queue_config(nic, qs, qidx, true);
987 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
988 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
990 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
993 netif_tx_start_all_queues(nic->netdev);
994 /* Re-enable Qset error interrupt */
995 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
998 static void nicvf_dump_intr_status(struct nicvf *nic)
1000 netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n",
1001 nicvf_reg_read(nic, NIC_VF_INT));
1004 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
1006 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1009 nicvf_dump_intr_status(nic);
1011 intr = nicvf_reg_read(nic, NIC_VF_INT);
1012 /* Check for spurious interrupt */
1013 if (!(intr & NICVF_INTR_MBOX_MASK))
1016 nicvf_handle_mbx_intr(nic);
1021 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
1023 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
1024 struct nicvf *nic = cq_poll->nicvf;
1025 int qidx = cq_poll->cq_idx;
1027 nicvf_dump_intr_status(nic);
1029 /* Disable interrupts */
1030 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1033 napi_schedule_irqoff(&cq_poll->napi);
1035 /* Clear interrupt */
1036 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1041 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
1043 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1047 nicvf_dump_intr_status(nic);
1049 /* Disable RBDR interrupt and schedule softirq */
1050 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
1051 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
1053 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1054 tasklet_hi_schedule(&nic->rbdr_task);
1055 /* Clear interrupt */
1056 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1062 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
1064 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1066 nicvf_dump_intr_status(nic);
1068 /* Disable Qset err interrupt and schedule softirq */
1069 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1070 tasklet_hi_schedule(&nic->qs_err_task);
1071 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1076 static void nicvf_set_irq_affinity(struct nicvf *nic)
1080 for (vec = 0; vec < nic->num_vec; vec++) {
1081 if (!nic->irq_allocated[vec])
1084 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
1087 if (vec < NICVF_INTR_ID_SQ)
1088 /* Leave CPU0 for RBDR and other interrupts */
1089 cpu = nicvf_netdev_qidx(nic, vec) + 1;
1093 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
1094 nic->affinity_mask[vec]);
1095 irq_set_affinity_hint(pci_irq_vector(nic->pdev, vec),
1096 nic->affinity_mask[vec]);
1100 static int nicvf_register_interrupts(struct nicvf *nic)
1104 for_each_cq_irq(irq)
1105 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
1106 nic->pnicvf->netdev->name,
1107 nicvf_netdev_qidx(nic, irq));
1109 for_each_sq_irq(irq)
1110 sprintf(nic->irq_name[irq], "%s-sq-%d",
1111 nic->pnicvf->netdev->name,
1112 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
1114 for_each_rbdr_irq(irq)
1115 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
1116 nic->pnicvf->netdev->name,
1117 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1119 /* Register CQ interrupts */
1120 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
1121 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1123 0, nic->irq_name[irq], nic->napi[irq]);
1126 nic->irq_allocated[irq] = true;
1129 /* Register RBDR interrupt */
1130 for (irq = NICVF_INTR_ID_RBDR;
1131 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
1132 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1133 nicvf_rbdr_intr_handler,
1134 0, nic->irq_name[irq], nic);
1137 nic->irq_allocated[irq] = true;
1140 /* Register QS error interrupt */
1141 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
1142 nic->pnicvf->netdev->name,
1143 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1144 irq = NICVF_INTR_ID_QS_ERR;
1145 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1146 nicvf_qs_err_intr_handler,
1147 0, nic->irq_name[irq], nic);
1151 nic->irq_allocated[irq] = true;
1153 /* Set IRQ affinities */
1154 nicvf_set_irq_affinity(nic);
1158 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
1163 static void nicvf_unregister_interrupts(struct nicvf *nic)
1165 struct pci_dev *pdev = nic->pdev;
1168 /* Free registered interrupts */
1169 for (irq = 0; irq < nic->num_vec; irq++) {
1170 if (!nic->irq_allocated[irq])
1173 irq_set_affinity_hint(pci_irq_vector(pdev, irq), NULL);
1174 free_cpumask_var(nic->affinity_mask[irq]);
1176 if (irq < NICVF_INTR_ID_SQ)
1177 free_irq(pci_irq_vector(pdev, irq), nic->napi[irq]);
1179 free_irq(pci_irq_vector(pdev, irq), nic);
1181 nic->irq_allocated[irq] = false;
1185 pci_free_irq_vectors(pdev);
1189 /* Initialize MSIX vectors and register MISC interrupt.
1190 * Send READY message to PF to check if its alive
1192 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1195 int irq = NICVF_INTR_ID_MISC;
1197 /* Return if mailbox interrupt is already registered */
1198 if (nic->pdev->msix_enabled)
1202 nic->num_vec = pci_msix_vec_count(nic->pdev);
1203 ret = pci_alloc_irq_vectors(nic->pdev, nic->num_vec, nic->num_vec,
1206 netdev_err(nic->netdev,
1207 "Req for #%d msix vectors failed\n", nic->num_vec);
1211 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1212 /* Register Misc interrupt */
1213 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1214 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1218 nic->irq_allocated[irq] = true;
1220 /* Enable mailbox interrupt */
1221 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1223 /* Check if VF is able to communicate with PF */
1224 if (!nicvf_check_pf_ready(nic)) {
1225 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1226 nicvf_unregister_interrupts(nic);
1233 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1235 struct nicvf *nic = netdev_priv(netdev);
1236 int qid = skb_get_queue_mapping(skb);
1237 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1239 struct snd_queue *sq;
1242 /* Check for minimum packet length */
1243 if (skb->len <= ETH_HLEN) {
1245 return NETDEV_TX_OK;
1248 /* In XDP case, initial HW tx queues are used for XDP,
1249 * but stack's queue mapping starts at '0', so skip the
1250 * Tx queues attached to Rx queues for XDP.
1253 qid += nic->xdp_tx_queues;
1256 /* Get secondary Qset's SQ structure */
1257 if (qid >= MAX_SND_QUEUES_PER_QS) {
1258 tmp = qid / MAX_SND_QUEUES_PER_QS;
1259 snic = (struct nicvf *)nic->snicvf[tmp - 1];
1261 netdev_warn(nic->netdev,
1262 "Secondary Qset#%d's ptr not initialized\n",
1265 return NETDEV_TX_OK;
1267 qid = qid % MAX_SND_QUEUES_PER_QS;
1270 sq = &snic->qs->sq[qid];
1271 if (!netif_tx_queue_stopped(txq) &&
1272 !nicvf_sq_append_skb(snic, sq, skb, qid)) {
1273 netif_tx_stop_queue(txq);
1275 /* Barrier, so that stop_queue visible to other cpus */
1278 /* Check again, incase another cpu freed descriptors */
1279 if (atomic_read(&sq->free_cnt) > MIN_SQ_DESC_PER_PKT_XMIT) {
1280 netif_tx_wake_queue(txq);
1282 this_cpu_inc(nic->drv_stats->txq_stop);
1283 netif_warn(nic, tx_err, netdev,
1284 "Transmit ring full, stopping SQ%d\n", qid);
1286 return NETDEV_TX_BUSY;
1289 return NETDEV_TX_OK;
1292 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1294 struct nicvf_cq_poll *cq_poll;
1297 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1298 cq_poll = nic->napi[qidx];
1301 nic->napi[qidx] = NULL;
1306 int nicvf_stop(struct net_device *netdev)
1309 struct nicvf *nic = netdev_priv(netdev);
1310 struct queue_set *qs = nic->qs;
1311 struct nicvf_cq_poll *cq_poll = NULL;
1312 union nic_mbx mbx = {};
1314 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1315 nicvf_send_msg_to_pf(nic, &mbx);
1317 netif_carrier_off(netdev);
1318 netif_tx_stop_all_queues(nic->netdev);
1319 nic->link_up = false;
1321 /* Teardown secondary qsets first */
1322 if (!nic->sqs_mode) {
1323 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1324 if (!nic->snicvf[qidx])
1326 nicvf_stop(nic->snicvf[qidx]->netdev);
1327 nic->snicvf[qidx] = NULL;
1331 /* Disable RBDR & QS error interrupts */
1332 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1333 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1334 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1336 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1337 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1339 /* Wait for pending IRQ handlers to finish */
1340 for (irq = 0; irq < nic->num_vec; irq++)
1341 synchronize_irq(pci_irq_vector(nic->pdev, irq));
1343 tasklet_kill(&nic->rbdr_task);
1344 tasklet_kill(&nic->qs_err_task);
1345 if (nic->rb_work_scheduled)
1346 cancel_delayed_work_sync(&nic->rbdr_work);
1348 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1349 cq_poll = nic->napi[qidx];
1352 napi_synchronize(&cq_poll->napi);
1353 /* CQ intr is enabled while napi_complete,
1356 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1357 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1358 napi_disable(&cq_poll->napi);
1359 netif_napi_del(&cq_poll->napi);
1362 netif_tx_disable(netdev);
1364 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1365 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1367 /* Free resources */
1368 nicvf_config_data_transfer(nic, false);
1370 /* Disable HW Qset */
1371 nicvf_qset_config(nic, false);
1373 /* disable mailbox interrupt */
1374 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1376 nicvf_unregister_interrupts(nic);
1378 nicvf_free_cq_poll(nic);
1380 /* Free any pending SKB saved to receive timestamp */
1382 dev_kfree_skb_any(nic->ptp_skb);
1383 nic->ptp_skb = NULL;
1386 /* Clear multiqset info */
1392 static int nicvf_config_hw_rx_tstamp(struct nicvf *nic, bool enable)
1394 union nic_mbx mbx = {};
1396 mbx.ptp.msg = NIC_MBOX_MSG_PTP_CFG;
1397 mbx.ptp.enable = enable;
1399 return nicvf_send_msg_to_pf(nic, &mbx);
1402 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1404 union nic_mbx mbx = {};
1406 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1407 mbx.frs.max_frs = mtu;
1408 mbx.frs.vf_id = nic->vf_id;
1410 return nicvf_send_msg_to_pf(nic, &mbx);
1413 int nicvf_open(struct net_device *netdev)
1416 struct nicvf *nic = netdev_priv(netdev);
1417 struct queue_set *qs = nic->qs;
1418 struct nicvf_cq_poll *cq_poll = NULL;
1419 union nic_mbx mbx = {};
1421 netif_carrier_off(netdev);
1423 err = nicvf_register_misc_interrupt(nic);
1427 /* Register NAPI handler for processing CQEs */
1428 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1429 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1434 cq_poll->cq_idx = qidx;
1435 cq_poll->nicvf = nic;
1436 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1438 napi_enable(&cq_poll->napi);
1439 nic->napi[qidx] = cq_poll;
1442 /* Check if we got MAC address from PF or else generate a radom MAC */
1443 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1444 eth_hw_addr_random(netdev);
1445 nicvf_hw_set_mac_addr(nic, netdev);
1448 if (nic->set_mac_pending) {
1449 nic->set_mac_pending = false;
1450 nicvf_hw_set_mac_addr(nic, netdev);
1453 /* Init tasklet for handling Qset err interrupt */
1454 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1455 (unsigned long)nic);
1457 /* Init RBDR tasklet which will refill RBDR */
1458 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1459 (unsigned long)nic);
1460 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1462 /* Configure CPI alorithm */
1463 nic->cpi_alg = cpi_alg;
1465 nicvf_config_cpi(nic);
1467 nicvf_request_sqs(nic);
1469 nicvf_get_primary_vf_struct(nic);
1471 /* Configure PTP timestamp */
1473 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1474 atomic_set(&nic->tx_ptp_skbs, 0);
1475 nic->ptp_skb = NULL;
1477 /* Configure receive side scaling and MTU */
1478 if (!nic->sqs_mode) {
1479 nicvf_rss_init(nic);
1480 err = nicvf_update_hw_max_frs(nic, netdev->mtu);
1484 /* Clear percpu stats */
1485 for_each_possible_cpu(cpu)
1486 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1487 sizeof(struct nicvf_drv_stats));
1490 err = nicvf_register_interrupts(nic);
1494 /* Initialize the queues */
1495 err = nicvf_init_resources(nic);
1499 /* Make sure queue initialization is written */
1502 nicvf_reg_write(nic, NIC_VF_INT, -1);
1503 /* Enable Qset err interrupt */
1504 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1506 /* Enable completion queue interrupt */
1507 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1508 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1510 /* Enable RBDR threshold interrupt */
1511 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1512 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1514 /* Send VF config done msg to PF */
1515 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
1516 nicvf_write_to_mbx(nic, &mbx);
1520 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1521 nicvf_unregister_interrupts(nic);
1522 tasklet_kill(&nic->qs_err_task);
1523 tasklet_kill(&nic->rbdr_task);
1525 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1526 cq_poll = nic->napi[qidx];
1529 napi_disable(&cq_poll->napi);
1530 netif_napi_del(&cq_poll->napi);
1532 nicvf_free_cq_poll(nic);
1536 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1538 struct nicvf *nic = netdev_priv(netdev);
1539 int orig_mtu = netdev->mtu;
1541 netdev->mtu = new_mtu;
1543 if (!netif_running(netdev))
1546 if (nicvf_update_hw_max_frs(nic, new_mtu)) {
1547 netdev->mtu = orig_mtu;
1554 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1556 struct sockaddr *addr = p;
1557 struct nicvf *nic = netdev_priv(netdev);
1559 if (!is_valid_ether_addr(addr->sa_data))
1560 return -EADDRNOTAVAIL;
1562 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1564 if (nic->pdev->msix_enabled) {
1565 if (nicvf_hw_set_mac_addr(nic, netdev))
1568 nic->set_mac_pending = true;
1574 void nicvf_update_lmac_stats(struct nicvf *nic)
1577 union nic_mbx mbx = {};
1579 if (!netif_running(nic->netdev))
1582 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1583 mbx.bgx_stats.vf_id = nic->vf_id;
1585 mbx.bgx_stats.rx = 1;
1586 while (stat < BGX_RX_STATS_COUNT) {
1587 mbx.bgx_stats.idx = stat;
1588 if (nicvf_send_msg_to_pf(nic, &mbx))
1596 mbx.bgx_stats.rx = 0;
1597 while (stat < BGX_TX_STATS_COUNT) {
1598 mbx.bgx_stats.idx = stat;
1599 if (nicvf_send_msg_to_pf(nic, &mbx))
1605 void nicvf_update_stats(struct nicvf *nic)
1609 struct nicvf_hw_stats *stats = &nic->hw_stats;
1610 struct nicvf_drv_stats *drv_stats;
1611 struct queue_set *qs = nic->qs;
1613 #define GET_RX_STATS(reg) \
1614 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1615 #define GET_TX_STATS(reg) \
1616 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1618 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1619 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1620 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1621 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1622 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1623 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1624 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1625 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1626 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1627 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1628 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1629 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1630 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1631 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1633 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1634 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1635 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1636 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1637 stats->tx_drops = GET_TX_STATS(TX_DROP);
1639 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1640 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1641 * pointed by dummy SQE and results in tx_drops counter being
1642 * incremented. Subtracting it from tx_tso counter will give
1643 * exact tx_drops counter.
1645 if (nic->t88 && nic->hw_tso) {
1646 for_each_possible_cpu(cpu) {
1647 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1648 tmp_stats += drv_stats->tx_tso;
1650 stats->tx_drops = tmp_stats - stats->tx_drops;
1652 stats->tx_frames = stats->tx_ucast_frames +
1653 stats->tx_bcast_frames +
1654 stats->tx_mcast_frames;
1655 stats->rx_frames = stats->rx_ucast_frames +
1656 stats->rx_bcast_frames +
1657 stats->rx_mcast_frames;
1658 stats->rx_drops = stats->rx_drop_red +
1659 stats->rx_drop_overrun;
1661 /* Update RQ and SQ stats */
1662 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1663 nicvf_update_rq_stats(nic, qidx);
1664 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1665 nicvf_update_sq_stats(nic, qidx);
1668 static void nicvf_get_stats64(struct net_device *netdev,
1669 struct rtnl_link_stats64 *stats)
1671 struct nicvf *nic = netdev_priv(netdev);
1672 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1674 nicvf_update_stats(nic);
1676 stats->rx_bytes = hw_stats->rx_bytes;
1677 stats->rx_packets = hw_stats->rx_frames;
1678 stats->rx_dropped = hw_stats->rx_drops;
1679 stats->multicast = hw_stats->rx_mcast_frames;
1681 stats->tx_bytes = hw_stats->tx_bytes;
1682 stats->tx_packets = hw_stats->tx_frames;
1683 stats->tx_dropped = hw_stats->tx_drops;
1687 static void nicvf_tx_timeout(struct net_device *dev)
1689 struct nicvf *nic = netdev_priv(dev);
1691 netif_warn(nic, tx_err, dev, "Transmit timed out, resetting\n");
1693 this_cpu_inc(nic->drv_stats->tx_timeout);
1694 schedule_work(&nic->reset_task);
1697 static void nicvf_reset_task(struct work_struct *work)
1701 nic = container_of(work, struct nicvf, reset_task);
1703 if (!netif_running(nic->netdev))
1706 nicvf_stop(nic->netdev);
1707 nicvf_open(nic->netdev);
1708 netif_trans_update(nic->netdev);
1711 static int nicvf_config_loopback(struct nicvf *nic,
1712 netdev_features_t features)
1714 union nic_mbx mbx = {};
1716 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1717 mbx.lbk.vf_id = nic->vf_id;
1718 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1720 return nicvf_send_msg_to_pf(nic, &mbx);
1723 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1724 netdev_features_t features)
1726 struct nicvf *nic = netdev_priv(netdev);
1728 if ((features & NETIF_F_LOOPBACK) &&
1729 netif_running(netdev) && !nic->loopback_supported)
1730 features &= ~NETIF_F_LOOPBACK;
1735 static int nicvf_set_features(struct net_device *netdev,
1736 netdev_features_t features)
1738 struct nicvf *nic = netdev_priv(netdev);
1739 netdev_features_t changed = features ^ netdev->features;
1741 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1742 nicvf_config_vlan_stripping(nic, features);
1744 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1745 return nicvf_config_loopback(nic, features);
1750 static void nicvf_set_xdp_queues(struct nicvf *nic, bool bpf_attached)
1752 u8 cq_count, txq_count;
1754 /* Set XDP Tx queue count same as Rx queue count */
1756 nic->xdp_tx_queues = 0;
1758 nic->xdp_tx_queues = nic->rx_queues;
1760 /* If queue count > MAX_CMP_QUEUES_PER_QS, then additional qsets
1761 * needs to be allocated, check how many.
1763 txq_count = nic->xdp_tx_queues + nic->tx_queues;
1764 cq_count = max(nic->rx_queues, txq_count);
1765 if (cq_count > MAX_CMP_QUEUES_PER_QS) {
1766 nic->sqs_count = roundup(cq_count, MAX_CMP_QUEUES_PER_QS);
1767 nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1;
1772 /* Set primary Qset's resources */
1773 nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS);
1774 nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS);
1775 nic->qs->cq_cnt = max_t(u8, nic->qs->rq_cnt, nic->qs->sq_cnt);
1778 nicvf_set_real_num_queues(nic->netdev, nic->tx_queues, nic->rx_queues);
1781 static int nicvf_xdp_setup(struct nicvf *nic, struct bpf_prog *prog)
1783 struct net_device *dev = nic->netdev;
1784 bool if_up = netif_running(nic->netdev);
1785 struct bpf_prog *old_prog;
1786 bool bpf_attached = false;
1789 /* For now just support only the usual MTU sized frames */
1790 if (prog && (dev->mtu > 1500)) {
1791 netdev_warn(dev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1796 /* ALL SQs attached to CQs i.e same as RQs, are treated as
1797 * XDP Tx queues and more Tx queues are allocated for
1798 * network stack to send pkts out.
1800 * No of Tx queues are either same as Rx queues or whatever
1801 * is left in max no of queues possible.
1803 if ((nic->rx_queues + nic->tx_queues) > nic->max_queues) {
1805 "Failed to attach BPF prog, RXQs + TXQs > Max %d\n",
1811 nicvf_stop(nic->netdev);
1813 old_prog = xchg(&nic->xdp_prog, prog);
1814 /* Detach old prog, if any */
1816 bpf_prog_put(old_prog);
1818 if (nic->xdp_prog) {
1819 /* Attach BPF program */
1820 nic->xdp_prog = bpf_prog_add(nic->xdp_prog, nic->rx_queues - 1);
1821 if (!IS_ERR(nic->xdp_prog)) {
1822 bpf_attached = true;
1824 ret = PTR_ERR(nic->xdp_prog);
1825 nic->xdp_prog = NULL;
1829 /* Calculate Tx queues needed for XDP and network stack */
1830 nicvf_set_xdp_queues(nic, bpf_attached);
1833 /* Reinitialize interface, clean slate */
1834 nicvf_open(nic->netdev);
1835 netif_trans_update(nic->netdev);
1841 static int nicvf_xdp(struct net_device *netdev, struct netdev_bpf *xdp)
1843 struct nicvf *nic = netdev_priv(netdev);
1845 /* To avoid checks while retrieving buffer address from CQE_RX,
1846 * do not support XDP for T88 pass1.x silicons which are anyway
1847 * not in use widely.
1849 if (pass1_silicon(nic->pdev))
1852 switch (xdp->command) {
1853 case XDP_SETUP_PROG:
1854 return nicvf_xdp_setup(nic, xdp->prog);
1855 case XDP_QUERY_PROG:
1856 xdp->prog_id = nic->xdp_prog ? nic->xdp_prog->aux->id : 0;
1863 static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)
1865 struct hwtstamp_config config;
1866 struct nicvf *nic = netdev_priv(netdev);
1868 if (!nic->ptp_clock)
1871 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1874 /* reserved for future extensions */
1878 switch (config.tx_type) {
1879 case HWTSTAMP_TX_OFF:
1880 case HWTSTAMP_TX_ON:
1886 switch (config.rx_filter) {
1887 case HWTSTAMP_FILTER_NONE:
1888 nic->hw_rx_tstamp = false;
1890 case HWTSTAMP_FILTER_ALL:
1891 case HWTSTAMP_FILTER_SOME:
1892 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1893 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1894 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1895 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1896 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1897 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1898 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1899 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1900 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1901 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1902 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1903 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1904 nic->hw_rx_tstamp = true;
1905 config.rx_filter = HWTSTAMP_FILTER_ALL;
1911 if (netif_running(netdev))
1912 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1914 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
1920 static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
1924 return nicvf_config_hwtstamp(netdev, req);
1930 static void __nicvf_set_rx_mode_task(u8 mode, struct xcast_addr_list *mc_addrs,
1933 union nic_mbx mbx = {};
1936 /* From the inside of VM code flow we have only 128 bits memory
1937 * available to send message to host's PF, so send all mc addrs
1938 * one by one, starting from flush command in case if kernel
1939 * requests to configure specific MAC filtering
1942 /* flush DMAC filters and reset RX mode */
1943 mbx.xcast.msg = NIC_MBOX_MSG_RESET_XCAST;
1944 nicvf_send_msg_to_pf(nic, &mbx);
1946 if (mode & BGX_XCAST_MCAST_FILTER) {
1947 /* once enabling filtering, we need to signal to PF to add
1948 * its' own LMAC to the filter to accept packets for it.
1950 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1951 mbx.xcast.data.mac = 0;
1952 nicvf_send_msg_to_pf(nic, &mbx);
1955 /* check if we have any specific MACs to be added to PF DMAC filter */
1957 /* now go through kernel list of MACs and add them one by one */
1958 for (idx = 0; idx < mc_addrs->count; idx++) {
1959 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1960 mbx.xcast.data.mac = mc_addrs->mc[idx];
1961 nicvf_send_msg_to_pf(nic, &mbx);
1966 /* and finally set rx mode for PF accordingly */
1967 mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST;
1968 mbx.xcast.data.mode = mode;
1970 nicvf_send_msg_to_pf(nic, &mbx);
1973 static void nicvf_set_rx_mode_task(struct work_struct *work_arg)
1975 struct nicvf_work *vf_work = container_of(work_arg, struct nicvf_work,
1977 struct nicvf *nic = container_of(vf_work, struct nicvf, rx_mode_work);
1979 struct xcast_addr_list *mc;
1984 /* Save message data locally to prevent them from
1985 * being overwritten by next ndo_set_rx_mode call().
1987 spin_lock(&nic->rx_mode_wq_lock);
1988 mode = vf_work->mode;
1991 spin_unlock(&nic->rx_mode_wq_lock);
1993 __nicvf_set_rx_mode_task(mode, mc, nic);
1996 static void nicvf_set_rx_mode(struct net_device *netdev)
1998 struct nicvf *nic = netdev_priv(netdev);
1999 struct netdev_hw_addr *ha;
2000 struct xcast_addr_list *mc_list = NULL;
2003 if (netdev->flags & IFF_PROMISC) {
2004 mode = BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT;
2006 if (netdev->flags & IFF_BROADCAST)
2007 mode |= BGX_XCAST_BCAST_ACCEPT;
2009 if (netdev->flags & IFF_ALLMULTI) {
2010 mode |= BGX_XCAST_MCAST_ACCEPT;
2011 } else if (netdev->flags & IFF_MULTICAST) {
2012 mode |= BGX_XCAST_MCAST_FILTER;
2013 /* here we need to copy mc addrs */
2014 if (netdev_mc_count(netdev)) {
2015 mc_list = kmalloc(offsetof(typeof(*mc_list),
2016 mc[netdev_mc_count(netdev)]),
2018 if (unlikely(!mc_list))
2021 netdev_hw_addr_list_for_each(ha, &netdev->mc) {
2022 mc_list->mc[mc_list->count] =
2023 ether_addr_to_u64(ha->addr);
2029 spin_lock(&nic->rx_mode_wq_lock);
2030 kfree(nic->rx_mode_work.mc);
2031 nic->rx_mode_work.mc = mc_list;
2032 nic->rx_mode_work.mode = mode;
2033 queue_delayed_work(nicvf_rx_mode_wq, &nic->rx_mode_work.work, 0);
2034 spin_unlock(&nic->rx_mode_wq_lock);
2037 static const struct net_device_ops nicvf_netdev_ops = {
2038 .ndo_open = nicvf_open,
2039 .ndo_stop = nicvf_stop,
2040 .ndo_start_xmit = nicvf_xmit,
2041 .ndo_change_mtu = nicvf_change_mtu,
2042 .ndo_set_mac_address = nicvf_set_mac_address,
2043 .ndo_get_stats64 = nicvf_get_stats64,
2044 .ndo_tx_timeout = nicvf_tx_timeout,
2045 .ndo_fix_features = nicvf_fix_features,
2046 .ndo_set_features = nicvf_set_features,
2047 .ndo_bpf = nicvf_xdp,
2048 .ndo_do_ioctl = nicvf_ioctl,
2049 .ndo_set_rx_mode = nicvf_set_rx_mode,
2052 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2054 struct device *dev = &pdev->dev;
2055 struct net_device *netdev;
2059 struct cavium_ptp *ptp_clock;
2061 ptp_clock = cavium_ptp_get();
2062 if (IS_ERR(ptp_clock)) {
2063 if (PTR_ERR(ptp_clock) == -ENODEV)
2064 /* In virtualized environment we proceed without ptp */
2067 return PTR_ERR(ptp_clock);
2070 err = pci_enable_device(pdev);
2072 dev_err(dev, "Failed to enable PCI device\n");
2076 err = pci_request_regions(pdev, DRV_NAME);
2078 dev_err(dev, "PCI request regions failed 0x%x\n", err);
2079 goto err_disable_device;
2082 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
2084 dev_err(dev, "Unable to get usable DMA configuration\n");
2085 goto err_release_regions;
2088 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
2090 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
2091 goto err_release_regions;
2094 qcount = netif_get_num_default_rss_queues();
2096 /* Restrict multiqset support only for host bound VFs */
2097 if (pdev->is_virtfn) {
2098 /* Set max number of queues per VF */
2099 qcount = min_t(int, num_online_cpus(),
2100 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
2103 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
2106 goto err_release_regions;
2109 pci_set_drvdata(pdev, netdev);
2111 SET_NETDEV_DEV(netdev, &pdev->dev);
2113 nic = netdev_priv(netdev);
2114 nic->netdev = netdev;
2117 nic->max_queues = qcount;
2118 /* If no of CPUs are too low, there won't be any queues left
2119 * for XDP_TX, hence double it.
2122 nic->max_queues *= 2;
2123 nic->ptp_clock = ptp_clock;
2125 /* MAP VF's configuration registers */
2126 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
2127 if (!nic->reg_base) {
2128 dev_err(dev, "Cannot map config register space, aborting\n");
2130 goto err_free_netdev;
2133 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
2134 if (!nic->drv_stats) {
2136 goto err_free_netdev;
2139 err = nicvf_set_qset_resources(nic);
2141 goto err_free_netdev;
2143 /* Check if PF is alive and get MAC address for this VF */
2144 err = nicvf_register_misc_interrupt(nic);
2146 goto err_free_netdev;
2148 nicvf_send_vf_struct(nic);
2150 if (!pass1_silicon(nic->pdev))
2153 /* Get iommu domain for iova to physical addr conversion */
2154 nic->iommu_domain = iommu_get_domain_for_dev(dev);
2156 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
2157 if (sdevid == 0xA134)
2160 /* Check if this VF is in QS only mode */
2164 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
2166 goto err_unregister_interrupts;
2168 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_SG |
2169 NETIF_F_TSO | NETIF_F_GRO | NETIF_F_TSO6 |
2170 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2171 NETIF_F_HW_VLAN_CTAG_RX);
2173 netdev->hw_features |= NETIF_F_RXHASH;
2175 netdev->features |= netdev->hw_features;
2176 netdev->hw_features |= NETIF_F_LOOPBACK;
2178 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
2179 NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
2181 netdev->netdev_ops = &nicvf_netdev_ops;
2182 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
2184 /* MTU range: 64 - 9200 */
2185 netdev->min_mtu = NIC_HW_MIN_FRS;
2186 netdev->max_mtu = NIC_HW_MAX_FRS;
2188 INIT_WORK(&nic->reset_task, nicvf_reset_task);
2190 INIT_DELAYED_WORK(&nic->rx_mode_work.work, nicvf_set_rx_mode_task);
2191 spin_lock_init(&nic->rx_mode_wq_lock);
2193 err = register_netdev(netdev);
2195 dev_err(dev, "Failed to register netdevice\n");
2196 goto err_unregister_interrupts;
2199 nic->msg_enable = debug;
2201 nicvf_set_ethtool_ops(netdev);
2205 err_unregister_interrupts:
2206 nicvf_unregister_interrupts(nic);
2208 pci_set_drvdata(pdev, NULL);
2210 free_percpu(nic->drv_stats);
2211 free_netdev(netdev);
2212 err_release_regions:
2213 pci_release_regions(pdev);
2215 pci_disable_device(pdev);
2219 static void nicvf_remove(struct pci_dev *pdev)
2221 struct net_device *netdev = pci_get_drvdata(pdev);
2223 struct net_device *pnetdev;
2228 nic = netdev_priv(netdev);
2229 pnetdev = nic->pnicvf->netdev;
2231 cancel_delayed_work_sync(&nic->rx_mode_work.work);
2233 /* Check if this Qset is assigned to different VF.
2234 * If yes, clean primary and all secondary Qsets.
2236 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
2237 unregister_netdev(pnetdev);
2238 nicvf_unregister_interrupts(nic);
2239 pci_set_drvdata(pdev, NULL);
2241 free_percpu(nic->drv_stats);
2242 cavium_ptp_put(nic->ptp_clock);
2243 free_netdev(netdev);
2244 pci_release_regions(pdev);
2245 pci_disable_device(pdev);
2248 static void nicvf_shutdown(struct pci_dev *pdev)
2253 static struct pci_driver nicvf_driver = {
2255 .id_table = nicvf_id_table,
2256 .probe = nicvf_probe,
2257 .remove = nicvf_remove,
2258 .shutdown = nicvf_shutdown,
2261 static int __init nicvf_init_module(void)
2263 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
2264 nicvf_rx_mode_wq = alloc_ordered_workqueue("nicvf_generic",
2266 return pci_register_driver(&nicvf_driver);
2269 static void __exit nicvf_cleanup_module(void)
2271 if (nicvf_rx_mode_wq) {
2272 destroy_workqueue(nicvf_rx_mode_wq);
2273 nicvf_rx_mode_wq = NULL;
2275 pci_unregister_driver(&nicvf_driver);
2278 module_init(nicvf_init_module);
2279 module_exit(nicvf_cleanup_module);