2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/numa.h>
43 #include <linux/pci.h>
44 #include <linux/utsname.h>
45 #include <linux/version.h>
46 #include <linux/vmalloc.h>
49 #include "ena_netdev.h"
50 #include "ena_pci_id_tbl.h"
52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
55 MODULE_DESCRIPTION(DEVICE_NAME);
56 MODULE_LICENSE("GPL");
57 MODULE_VERSION(DRV_MODULE_VERSION);
59 /* Time in jiffies before concluding the transmitter is hung. */
60 #define TX_TIMEOUT (5 * HZ)
62 #define ENA_NAPI_BUDGET 64
64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
65 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
66 static int debug = -1;
67 module_param(debug, int, 0);
68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70 static struct ena_aenq_handlers aenq_handlers;
72 static struct workqueue_struct *ena_wq;
74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
76 static int ena_rss_init_default(struct ena_adapter *adapter);
77 static void check_for_admin_com_state(struct ena_adapter *adapter);
78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
79 static int ena_restore_device(struct ena_adapter *adapter);
81 static void ena_tx_timeout(struct net_device *dev)
83 struct ena_adapter *adapter = netdev_priv(dev);
85 /* Change the state of the device to trigger reset
86 * Check that we are not in the middle or a trigger already
89 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
92 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
93 u64_stats_update_begin(&adapter->syncp);
94 adapter->dev_stats.tx_timeout++;
95 u64_stats_update_end(&adapter->syncp);
97 netif_err(adapter, tx_err, dev, "Transmit time out\n");
100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
104 for (i = 0; i < adapter->num_queues; i++)
105 adapter->rx_ring[i].mtu = mtu;
108 static int ena_change_mtu(struct net_device *dev, int new_mtu)
110 struct ena_adapter *adapter = netdev_priv(dev);
113 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
115 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
116 update_rx_ring_mtu(adapter, new_mtu);
119 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
128 #ifdef CONFIG_RFS_ACCEL
132 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
133 if (!adapter->netdev->rx_cpu_rmap)
135 for (i = 0; i < adapter->num_queues; i++) {
136 int irq_idx = ENA_IO_IRQ_IDX(i);
138 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
139 pci_irq_vector(adapter->pdev, irq_idx));
141 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
142 adapter->netdev->rx_cpu_rmap = NULL;
146 #endif /* CONFIG_RFS_ACCEL */
150 static void ena_init_io_rings_common(struct ena_adapter *adapter,
151 struct ena_ring *ring, u16 qid)
154 ring->pdev = adapter->pdev;
155 ring->dev = &adapter->pdev->dev;
156 ring->netdev = adapter->netdev;
157 ring->napi = &adapter->ena_napi[qid].napi;
158 ring->adapter = adapter;
159 ring->ena_dev = adapter->ena_dev;
160 ring->per_napi_packets = 0;
161 ring->per_napi_bytes = 0;
163 ring->first_interrupt = false;
164 ring->no_interrupt_event_cnt = 0;
165 u64_stats_init(&ring->syncp);
168 static void ena_init_io_rings(struct ena_adapter *adapter)
170 struct ena_com_dev *ena_dev;
171 struct ena_ring *txr, *rxr;
174 ena_dev = adapter->ena_dev;
176 for (i = 0; i < adapter->num_queues; i++) {
177 txr = &adapter->tx_ring[i];
178 rxr = &adapter->rx_ring[i];
180 /* TX/RX common ring state */
181 ena_init_io_rings_common(adapter, txr, i);
182 ena_init_io_rings_common(adapter, rxr, i);
184 /* TX specific ring state */
185 txr->ring_size = adapter->tx_ring_size;
186 txr->tx_max_header_size = ena_dev->tx_max_header_size;
187 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
188 txr->sgl_size = adapter->max_tx_sgl_size;
189 txr->smoothed_interval =
190 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
192 /* RX specific ring state */
193 rxr->ring_size = adapter->rx_ring_size;
194 rxr->rx_copybreak = adapter->rx_copybreak;
195 rxr->sgl_size = adapter->max_rx_sgl_size;
196 rxr->smoothed_interval =
197 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
198 rxr->empty_rx_queue = 0;
202 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
203 * @adapter: network interface device structure
206 * Return 0 on success, negative on failure
208 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
210 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
211 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
214 if (tx_ring->tx_buffer_info) {
215 netif_err(adapter, ifup,
216 adapter->netdev, "tx_buffer_info info is not NULL");
220 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
221 node = cpu_to_node(ena_irq->cpu);
223 tx_ring->tx_buffer_info = vzalloc_node(size, node);
224 if (!tx_ring->tx_buffer_info) {
225 tx_ring->tx_buffer_info = vzalloc(size);
226 if (!tx_ring->tx_buffer_info)
230 size = sizeof(u16) * tx_ring->ring_size;
231 tx_ring->free_tx_ids = vzalloc_node(size, node);
232 if (!tx_ring->free_tx_ids) {
233 tx_ring->free_tx_ids = vzalloc(size);
234 if (!tx_ring->free_tx_ids) {
235 vfree(tx_ring->tx_buffer_info);
240 size = tx_ring->tx_max_header_size;
241 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
242 if (!tx_ring->push_buf_intermediate_buf) {
243 tx_ring->push_buf_intermediate_buf = vzalloc(size);
244 if (!tx_ring->push_buf_intermediate_buf) {
245 vfree(tx_ring->tx_buffer_info);
246 vfree(tx_ring->free_tx_ids);
251 /* Req id ring for TX out of order completions */
252 for (i = 0; i < tx_ring->ring_size; i++)
253 tx_ring->free_tx_ids[i] = i;
255 /* Reset tx statistics */
256 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
258 tx_ring->next_to_use = 0;
259 tx_ring->next_to_clean = 0;
260 tx_ring->cpu = ena_irq->cpu;
264 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
265 * @adapter: network interface device structure
268 * Free all transmit software resources
270 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
272 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
274 vfree(tx_ring->tx_buffer_info);
275 tx_ring->tx_buffer_info = NULL;
277 vfree(tx_ring->free_tx_ids);
278 tx_ring->free_tx_ids = NULL;
280 vfree(tx_ring->push_buf_intermediate_buf);
281 tx_ring->push_buf_intermediate_buf = NULL;
284 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
285 * @adapter: private structure
287 * Return 0 on success, negative on failure
289 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
293 for (i = 0; i < adapter->num_queues; i++) {
294 rc = ena_setup_tx_resources(adapter, i);
303 netif_err(adapter, ifup, adapter->netdev,
304 "Tx queue %d: allocation failed\n", i);
306 /* rewind the index freeing the rings as we go */
308 ena_free_tx_resources(adapter, i);
312 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
313 * @adapter: board private structure
315 * Free all transmit software resources
317 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
321 for (i = 0; i < adapter->num_queues; i++)
322 ena_free_tx_resources(adapter, i);
325 static inline int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
327 if (likely(req_id < rx_ring->ring_size))
330 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
331 "Invalid rx req_id: %hu\n", req_id);
333 u64_stats_update_begin(&rx_ring->syncp);
334 rx_ring->rx_stats.bad_req_id++;
335 u64_stats_update_end(&rx_ring->syncp);
337 /* Trigger device reset */
338 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
339 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
343 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
344 * @adapter: network interface device structure
347 * Returns 0 on success, negative on failure
349 static int ena_setup_rx_resources(struct ena_adapter *adapter,
352 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
353 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
356 if (rx_ring->rx_buffer_info) {
357 netif_err(adapter, ifup, adapter->netdev,
358 "rx_buffer_info is not NULL");
362 /* alloc extra element so in rx path
363 * we can always prefetch rx_info + 1
365 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
366 node = cpu_to_node(ena_irq->cpu);
368 rx_ring->rx_buffer_info = vzalloc_node(size, node);
369 if (!rx_ring->rx_buffer_info) {
370 rx_ring->rx_buffer_info = vzalloc(size);
371 if (!rx_ring->rx_buffer_info)
375 size = sizeof(u16) * rx_ring->ring_size;
376 rx_ring->free_rx_ids = vzalloc_node(size, node);
377 if (!rx_ring->free_rx_ids) {
378 rx_ring->free_rx_ids = vzalloc(size);
379 if (!rx_ring->free_rx_ids) {
380 vfree(rx_ring->rx_buffer_info);
385 /* Req id ring for receiving RX pkts out of order */
386 for (i = 0; i < rx_ring->ring_size; i++)
387 rx_ring->free_rx_ids[i] = i;
389 /* Reset rx statistics */
390 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
392 rx_ring->next_to_clean = 0;
393 rx_ring->next_to_use = 0;
394 rx_ring->cpu = ena_irq->cpu;
399 /* ena_free_rx_resources - Free I/O Rx Resources
400 * @adapter: network interface device structure
403 * Free all receive software resources
405 static void ena_free_rx_resources(struct ena_adapter *adapter,
408 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
410 vfree(rx_ring->rx_buffer_info);
411 rx_ring->rx_buffer_info = NULL;
413 vfree(rx_ring->free_rx_ids);
414 rx_ring->free_rx_ids = NULL;
417 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
418 * @adapter: board private structure
420 * Return 0 on success, negative on failure
422 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
426 for (i = 0; i < adapter->num_queues; i++) {
427 rc = ena_setup_rx_resources(adapter, i);
436 netif_err(adapter, ifup, adapter->netdev,
437 "Rx queue %d: allocation failed\n", i);
439 /* rewind the index freeing the rings as we go */
441 ena_free_rx_resources(adapter, i);
445 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
446 * @adapter: board private structure
448 * Free all receive software resources
450 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
454 for (i = 0; i < adapter->num_queues; i++)
455 ena_free_rx_resources(adapter, i);
458 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,
459 struct ena_rx_buffer *rx_info, gfp_t gfp)
461 struct ena_com_buf *ena_buf;
465 /* if previous allocated page is not used */
466 if (unlikely(rx_info->page))
469 page = alloc_page(gfp);
470 if (unlikely(!page)) {
471 u64_stats_update_begin(&rx_ring->syncp);
472 rx_ring->rx_stats.page_alloc_fail++;
473 u64_stats_update_end(&rx_ring->syncp);
477 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
479 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
480 u64_stats_update_begin(&rx_ring->syncp);
481 rx_ring->rx_stats.dma_mapping_err++;
482 u64_stats_update_end(&rx_ring->syncp);
487 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
488 "alloc page %p, rx_info %p\n", page, rx_info);
490 rx_info->page = page;
491 rx_info->page_offset = 0;
492 ena_buf = &rx_info->ena_buf;
493 ena_buf->paddr = dma;
494 ena_buf->len = ENA_PAGE_SIZE;
499 static void ena_free_rx_page(struct ena_ring *rx_ring,
500 struct ena_rx_buffer *rx_info)
502 struct page *page = rx_info->page;
503 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
505 if (unlikely(!page)) {
506 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
507 "Trying to free unallocated buffer\n");
511 dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE,
515 rx_info->page = NULL;
518 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
520 u16 next_to_use, req_id;
524 next_to_use = rx_ring->next_to_use;
526 for (i = 0; i < num; i++) {
527 struct ena_rx_buffer *rx_info;
529 req_id = rx_ring->free_rx_ids[next_to_use];
530 rc = validate_rx_req_id(rx_ring, req_id);
531 if (unlikely(rc < 0))
534 rx_info = &rx_ring->rx_buffer_info[req_id];
537 rc = ena_alloc_rx_page(rx_ring, rx_info,
538 GFP_ATOMIC | __GFP_COMP);
539 if (unlikely(rc < 0)) {
540 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
541 "failed to alloc buffer for rx queue %d\n",
545 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
549 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
550 "failed to add buffer for rx queue %d\n",
554 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
558 if (unlikely(i < num)) {
559 u64_stats_update_begin(&rx_ring->syncp);
560 rx_ring->rx_stats.refil_partial++;
561 u64_stats_update_end(&rx_ring->syncp);
562 netdev_warn(rx_ring->netdev,
563 "refilled rx qid %d with only %d buffers (from %d)\n",
564 rx_ring->qid, i, num);
567 /* ena_com_write_sq_doorbell issues a wmb() */
569 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
571 rx_ring->next_to_use = next_to_use;
576 static void ena_free_rx_bufs(struct ena_adapter *adapter,
579 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
582 for (i = 0; i < rx_ring->ring_size; i++) {
583 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
586 ena_free_rx_page(rx_ring, rx_info);
590 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
591 * @adapter: board private structure
594 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
596 struct ena_ring *rx_ring;
599 for (i = 0; i < adapter->num_queues; i++) {
600 rx_ring = &adapter->rx_ring[i];
601 bufs_num = rx_ring->ring_size - 1;
602 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
604 if (unlikely(rc != bufs_num))
605 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
606 "refilling Queue %d failed. allocated %d buffers from: %d\n",
611 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
615 for (i = 0; i < adapter->num_queues; i++)
616 ena_free_rx_bufs(adapter, i);
619 static inline void ena_unmap_tx_skb(struct ena_ring *tx_ring,
620 struct ena_tx_buffer *tx_info)
622 struct ena_com_buf *ena_buf;
626 ena_buf = tx_info->bufs;
627 cnt = tx_info->num_of_bufs;
632 if (tx_info->map_linear_data) {
633 dma_unmap_single(tx_ring->dev,
634 dma_unmap_addr(ena_buf, paddr),
635 dma_unmap_len(ena_buf, len),
641 /* unmap remaining mapped pages */
642 for (i = 0; i < cnt; i++) {
643 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
644 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
649 /* ena_free_tx_bufs - Free Tx Buffers per Queue
650 * @tx_ring: TX ring for which buffers be freed
652 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
654 bool print_once = true;
657 for (i = 0; i < tx_ring->ring_size; i++) {
658 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
664 netdev_notice(tx_ring->netdev,
665 "free uncompleted tx skb qid %d idx 0x%x\n",
669 netdev_dbg(tx_ring->netdev,
670 "free uncompleted tx skb qid %d idx 0x%x\n",
674 ena_unmap_tx_skb(tx_ring, tx_info);
676 dev_kfree_skb_any(tx_info->skb);
678 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
682 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
684 struct ena_ring *tx_ring;
687 for (i = 0; i < adapter->num_queues; i++) {
688 tx_ring = &adapter->tx_ring[i];
689 ena_free_tx_bufs(tx_ring);
693 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
698 for (i = 0; i < adapter->num_queues; i++) {
699 ena_qid = ENA_IO_TXQ_IDX(i);
700 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
704 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
709 for (i = 0; i < adapter->num_queues; i++) {
710 ena_qid = ENA_IO_RXQ_IDX(i);
711 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
715 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
717 ena_destroy_all_tx_queues(adapter);
718 ena_destroy_all_rx_queues(adapter);
721 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
723 struct ena_tx_buffer *tx_info = NULL;
725 if (likely(req_id < tx_ring->ring_size)) {
726 tx_info = &tx_ring->tx_buffer_info[req_id];
727 if (likely(tx_info->skb))
732 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
733 "tx_info doesn't have valid skb\n");
735 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
736 "Invalid req_id: %hu\n", req_id);
738 u64_stats_update_begin(&tx_ring->syncp);
739 tx_ring->tx_stats.bad_req_id++;
740 u64_stats_update_end(&tx_ring->syncp);
742 /* Trigger device reset */
743 tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
744 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
748 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
750 struct netdev_queue *txq;
759 next_to_clean = tx_ring->next_to_clean;
760 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
762 while (tx_pkts < budget) {
763 struct ena_tx_buffer *tx_info;
766 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
771 rc = validate_tx_req_id(tx_ring, req_id);
775 tx_info = &tx_ring->tx_buffer_info[req_id];
778 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
782 tx_info->last_jiffies = 0;
784 ena_unmap_tx_skb(tx_ring, tx_info);
786 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
787 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
790 tx_bytes += skb->len;
793 total_done += tx_info->tx_descs;
795 tx_ring->free_tx_ids[next_to_clean] = req_id;
796 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
800 tx_ring->next_to_clean = next_to_clean;
801 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
802 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
804 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
806 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
807 "tx_poll: q %d done. total pkts: %d\n",
808 tx_ring->qid, tx_pkts);
810 /* need to make the rings circular update visible to
811 * ena_start_xmit() before checking for netif_queue_stopped().
815 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
816 ENA_TX_WAKEUP_THRESH);
817 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
818 __netif_tx_lock(txq, smp_processor_id());
820 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
821 ENA_TX_WAKEUP_THRESH);
822 if (netif_tx_queue_stopped(txq) && above_thresh) {
823 netif_tx_wake_queue(txq);
824 u64_stats_update_begin(&tx_ring->syncp);
825 tx_ring->tx_stats.queue_wakeup++;
826 u64_stats_update_end(&tx_ring->syncp);
828 __netif_tx_unlock(txq);
831 tx_ring->per_napi_bytes += tx_bytes;
832 tx_ring->per_napi_packets += tx_pkts;
837 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
842 skb = napi_get_frags(rx_ring->napi);
844 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
845 rx_ring->rx_copybreak);
847 if (unlikely(!skb)) {
848 u64_stats_update_begin(&rx_ring->syncp);
849 rx_ring->rx_stats.skb_alloc_fail++;
850 u64_stats_update_end(&rx_ring->syncp);
851 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
852 "Failed to allocate skb. frags: %d\n", frags);
859 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
860 struct ena_com_rx_buf_info *ena_bufs,
865 struct ena_rx_buffer *rx_info;
866 u16 len, req_id, buf = 0;
869 len = ena_bufs[buf].len;
870 req_id = ena_bufs[buf].req_id;
871 rx_info = &rx_ring->rx_buffer_info[req_id];
873 if (unlikely(!rx_info->page)) {
874 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
879 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
880 "rx_info %p page %p\n",
881 rx_info, rx_info->page);
883 /* save virt address of first buffer */
884 va = page_address(rx_info->page) + rx_info->page_offset;
885 prefetch(va + NET_IP_ALIGN);
887 if (len <= rx_ring->rx_copybreak) {
888 skb = ena_alloc_skb(rx_ring, false);
892 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
893 "rx allocated small packet. len %d. data_len %d\n",
894 skb->len, skb->data_len);
896 /* sync this buffer for CPU use */
897 dma_sync_single_for_cpu(rx_ring->dev,
898 dma_unmap_addr(&rx_info->ena_buf, paddr),
901 skb_copy_to_linear_data(skb, va, len);
902 dma_sync_single_for_device(rx_ring->dev,
903 dma_unmap_addr(&rx_info->ena_buf, paddr),
908 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
909 rx_ring->free_rx_ids[*next_to_clean] = req_id;
910 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
915 skb = ena_alloc_skb(rx_ring, true);
920 dma_unmap_page(rx_ring->dev,
921 dma_unmap_addr(&rx_info->ena_buf, paddr),
922 ENA_PAGE_SIZE, DMA_FROM_DEVICE);
924 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
925 rx_info->page_offset, len, ENA_PAGE_SIZE);
927 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
928 "rx skb updated. len %d. data_len %d\n",
929 skb->len, skb->data_len);
931 rx_info->page = NULL;
933 rx_ring->free_rx_ids[*next_to_clean] = req_id;
935 ENA_RX_RING_IDX_NEXT(*next_to_clean,
937 if (likely(--descs == 0))
941 len = ena_bufs[buf].len;
942 req_id = ena_bufs[buf].req_id;
943 rx_info = &rx_ring->rx_buffer_info[req_id];
949 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
950 * @adapter: structure containing adapter specific data
951 * @ena_rx_ctx: received packet context/metadata
952 * @skb: skb currently being received and modified
954 static inline void ena_rx_checksum(struct ena_ring *rx_ring,
955 struct ena_com_rx_ctx *ena_rx_ctx,
958 /* Rx csum disabled */
959 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
960 skb->ip_summed = CHECKSUM_NONE;
964 /* For fragmented packets the checksum isn't valid */
965 if (ena_rx_ctx->frag) {
966 skb->ip_summed = CHECKSUM_NONE;
970 /* if IP and error */
971 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
972 (ena_rx_ctx->l3_csum_err))) {
973 /* ipv4 checksum error */
974 skb->ip_summed = CHECKSUM_NONE;
975 u64_stats_update_begin(&rx_ring->syncp);
976 rx_ring->rx_stats.bad_csum++;
977 u64_stats_update_end(&rx_ring->syncp);
978 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
979 "RX IPv4 header checksum error\n");
984 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
985 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
986 if (unlikely(ena_rx_ctx->l4_csum_err)) {
987 /* TCP/UDP checksum error */
988 u64_stats_update_begin(&rx_ring->syncp);
989 rx_ring->rx_stats.bad_csum++;
990 u64_stats_update_end(&rx_ring->syncp);
991 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
992 "RX L4 checksum error\n");
993 skb->ip_summed = CHECKSUM_NONE;
997 if (likely(ena_rx_ctx->l4_csum_checked)) {
998 skb->ip_summed = CHECKSUM_UNNECESSARY;
1000 u64_stats_update_begin(&rx_ring->syncp);
1001 rx_ring->rx_stats.csum_unchecked++;
1002 u64_stats_update_end(&rx_ring->syncp);
1003 skb->ip_summed = CHECKSUM_NONE;
1006 skb->ip_summed = CHECKSUM_NONE;
1012 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1013 struct ena_com_rx_ctx *ena_rx_ctx,
1014 struct sk_buff *skb)
1016 enum pkt_hash_types hash_type;
1018 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1019 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1020 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1022 hash_type = PKT_HASH_TYPE_L4;
1024 hash_type = PKT_HASH_TYPE_NONE;
1026 /* Override hash type if the packet is fragmented */
1027 if (ena_rx_ctx->frag)
1028 hash_type = PKT_HASH_TYPE_NONE;
1030 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1034 /* ena_clean_rx_irq - Cleanup RX irq
1035 * @rx_ring: RX ring to clean
1036 * @napi: napi handler
1037 * @budget: how many packets driver is allowed to clean
1039 * Returns the number of cleaned buffers.
1041 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1044 u16 next_to_clean = rx_ring->next_to_clean;
1045 u32 res_budget, work_done;
1047 struct ena_com_rx_ctx ena_rx_ctx;
1048 struct ena_adapter *adapter;
1049 struct sk_buff *skb;
1050 int refill_required;
1051 int refill_threshold;
1054 int rx_copybreak_pkt = 0;
1057 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1058 "%s qid %d\n", __func__, rx_ring->qid);
1059 res_budget = budget;
1062 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1063 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1064 ena_rx_ctx.descs = 0;
1065 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1066 rx_ring->ena_com_io_sq,
1071 if (unlikely(ena_rx_ctx.descs == 0))
1074 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1075 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1076 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1077 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1079 /* allocate skb and fill it */
1080 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
1083 /* exit if we failed to retrieve a buffer */
1084 if (unlikely(!skb)) {
1085 for (i = 0; i < ena_rx_ctx.descs; i++) {
1086 rx_ring->free_tx_ids[next_to_clean] =
1087 rx_ring->ena_bufs[i].req_id;
1089 ENA_RX_RING_IDX_NEXT(next_to_clean,
1090 rx_ring->ring_size);
1095 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1097 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1099 skb_record_rx_queue(skb, rx_ring->qid);
1101 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1102 total_len += rx_ring->ena_bufs[0].len;
1104 napi_gro_receive(napi, skb);
1106 total_len += skb->len;
1107 napi_gro_frags(napi);
1111 } while (likely(res_budget));
1113 work_done = budget - res_budget;
1114 rx_ring->per_napi_bytes += total_len;
1115 rx_ring->per_napi_packets += work_done;
1116 u64_stats_update_begin(&rx_ring->syncp);
1117 rx_ring->rx_stats.bytes += total_len;
1118 rx_ring->rx_stats.cnt += work_done;
1119 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1120 u64_stats_update_end(&rx_ring->syncp);
1122 rx_ring->next_to_clean = next_to_clean;
1124 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1126 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1127 ENA_RX_REFILL_THRESH_PACKET);
1129 /* Optimization, try to batch new rx buffers */
1130 if (refill_required > refill_threshold) {
1131 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1132 ena_refill_rx_bufs(rx_ring, refill_required);
1138 adapter = netdev_priv(rx_ring->netdev);
1140 u64_stats_update_begin(&rx_ring->syncp);
1141 rx_ring->rx_stats.bad_desc_num++;
1142 u64_stats_update_end(&rx_ring->syncp);
1144 /* Too many desc from the device. Trigger reset */
1145 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1146 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1151 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1152 struct ena_ring *tx_ring)
1154 /* We apply adaptive moderation on Rx path only.
1155 * Tx uses static interrupt moderation.
1157 ena_com_calculate_interrupt_delay(rx_ring->ena_dev,
1158 rx_ring->per_napi_packets,
1159 rx_ring->per_napi_bytes,
1160 &rx_ring->smoothed_interval,
1161 &rx_ring->moder_tbl_idx);
1163 /* Reset per napi packets/bytes */
1164 tx_ring->per_napi_packets = 0;
1165 tx_ring->per_napi_bytes = 0;
1166 rx_ring->per_napi_packets = 0;
1167 rx_ring->per_napi_bytes = 0;
1170 static inline void ena_unmask_interrupt(struct ena_ring *tx_ring,
1171 struct ena_ring *rx_ring)
1173 struct ena_eth_io_intr_reg intr_reg;
1175 /* Update intr register: rx intr delay,
1176 * tx intr delay and interrupt unmask
1178 ena_com_update_intr_reg(&intr_reg,
1179 rx_ring->smoothed_interval,
1180 tx_ring->smoothed_interval,
1183 /* It is a shared MSI-X.
1184 * Tx and Rx CQ have pointer to it.
1185 * So we use one of them to reach the intr reg
1187 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1190 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1191 struct ena_ring *rx_ring)
1193 int cpu = get_cpu();
1196 /* Check only one ring since the 2 rings are running on the same cpu */
1197 if (likely(tx_ring->cpu == cpu))
1200 numa_node = cpu_to_node(cpu);
1203 if (numa_node != NUMA_NO_NODE) {
1204 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1205 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1216 static int ena_io_poll(struct napi_struct *napi, int budget)
1218 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1219 struct ena_ring *tx_ring, *rx_ring;
1224 int napi_comp_call = 0;
1227 tx_ring = ena_napi->tx_ring;
1228 rx_ring = ena_napi->rx_ring;
1230 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1232 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1233 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1234 napi_complete_done(napi, 0);
1238 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1239 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1241 /* If the device is about to reset or down, avoid unmask
1242 * the interrupt and return 0 so NAPI won't reschedule
1244 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1245 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1246 napi_complete_done(napi, 0);
1249 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1252 /* Update numa and unmask the interrupt only when schedule
1253 * from the interrupt context (vs from sk_busy_loop)
1255 if (napi_complete_done(napi, rx_work_done)) {
1256 /* Tx and Rx share the same interrupt vector */
1257 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1258 ena_adjust_intr_moderation(rx_ring, tx_ring);
1260 ena_unmask_interrupt(tx_ring, rx_ring);
1263 ena_update_ring_numa_node(tx_ring, rx_ring);
1270 u64_stats_update_begin(&tx_ring->syncp);
1271 tx_ring->tx_stats.napi_comp += napi_comp_call;
1272 tx_ring->tx_stats.tx_poll++;
1273 u64_stats_update_end(&tx_ring->syncp);
1278 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1280 struct ena_adapter *adapter = (struct ena_adapter *)data;
1282 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1284 /* Don't call the aenq handler before probe is done */
1285 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1286 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1291 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1292 * @irq: interrupt number
1293 * @data: pointer to a network interface private napi device structure
1295 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1297 struct ena_napi *ena_napi = data;
1299 ena_napi->tx_ring->first_interrupt = true;
1300 ena_napi->rx_ring->first_interrupt = true;
1302 napi_schedule_irqoff(&ena_napi->napi);
1307 /* Reserve a single MSI-X vector for management (admin + aenq).
1308 * plus reserve one vector for each potential io queue.
1309 * the number of potential io queues is the minimum of what the device
1310 * supports and the number of vCPUs.
1312 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1314 int msix_vecs, irq_cnt;
1316 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1317 netif_err(adapter, probe, adapter->netdev,
1318 "Error, MSI-X is already enabled\n");
1322 /* Reserved the max msix vectors we might need */
1323 msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1324 netif_dbg(adapter, probe, adapter->netdev,
1325 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1327 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1328 msix_vecs, PCI_IRQ_MSIX);
1331 netif_err(adapter, probe, adapter->netdev,
1332 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1336 if (irq_cnt != msix_vecs) {
1337 netif_notice(adapter, probe, adapter->netdev,
1338 "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1339 irq_cnt, msix_vecs);
1340 adapter->num_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1343 if (ena_init_rx_cpu_rmap(adapter))
1344 netif_warn(adapter, probe, adapter->netdev,
1345 "Failed to map IRQs to CPUs\n");
1347 adapter->msix_vecs = irq_cnt;
1348 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1353 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1357 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1358 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1359 pci_name(adapter->pdev));
1360 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1361 ena_intr_msix_mgmnt;
1362 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1363 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1364 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1365 cpu = cpumask_first(cpu_online_mask);
1366 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1367 cpumask_set_cpu(cpu,
1368 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1371 static void ena_setup_io_intr(struct ena_adapter *adapter)
1373 struct net_device *netdev;
1374 int irq_idx, i, cpu;
1376 netdev = adapter->netdev;
1378 for (i = 0; i < adapter->num_queues; i++) {
1379 irq_idx = ENA_IO_IRQ_IDX(i);
1380 cpu = i % num_online_cpus();
1382 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1383 "%s-Tx-Rx-%d", netdev->name, i);
1384 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1385 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1386 adapter->irq_tbl[irq_idx].vector =
1387 pci_irq_vector(adapter->pdev, irq_idx);
1388 adapter->irq_tbl[irq_idx].cpu = cpu;
1390 cpumask_set_cpu(cpu,
1391 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1395 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1397 unsigned long flags = 0;
1398 struct ena_irq *irq;
1401 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1402 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1405 netif_err(adapter, probe, adapter->netdev,
1406 "failed to request admin irq\n");
1410 netif_dbg(adapter, probe, adapter->netdev,
1411 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1412 irq->affinity_hint_mask.bits[0], irq->vector);
1414 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1419 static int ena_request_io_irq(struct ena_adapter *adapter)
1421 unsigned long flags = 0;
1422 struct ena_irq *irq;
1425 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1426 netif_err(adapter, ifup, adapter->netdev,
1427 "Failed to request I/O IRQ: MSI-X is not enabled\n");
1431 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1432 irq = &adapter->irq_tbl[i];
1433 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1436 netif_err(adapter, ifup, adapter->netdev,
1437 "Failed to request I/O IRQ. index %d rc %d\n",
1442 netif_dbg(adapter, ifup, adapter->netdev,
1443 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1444 i, irq->affinity_hint_mask.bits[0], irq->vector);
1446 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1452 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1453 irq = &adapter->irq_tbl[k];
1454 free_irq(irq->vector, irq->data);
1460 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1462 struct ena_irq *irq;
1464 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1465 synchronize_irq(irq->vector);
1466 irq_set_affinity_hint(irq->vector, NULL);
1467 free_irq(irq->vector, irq->data);
1470 static void ena_free_io_irq(struct ena_adapter *adapter)
1472 struct ena_irq *irq;
1475 #ifdef CONFIG_RFS_ACCEL
1476 if (adapter->msix_vecs >= 1) {
1477 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1478 adapter->netdev->rx_cpu_rmap = NULL;
1480 #endif /* CONFIG_RFS_ACCEL */
1482 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1483 irq = &adapter->irq_tbl[i];
1484 irq_set_affinity_hint(irq->vector, NULL);
1485 free_irq(irq->vector, irq->data);
1489 static void ena_disable_msix(struct ena_adapter *adapter)
1491 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1492 pci_free_irq_vectors(adapter->pdev);
1495 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1499 if (!netif_running(adapter->netdev))
1502 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1503 synchronize_irq(adapter->irq_tbl[i].vector);
1506 static void ena_del_napi(struct ena_adapter *adapter)
1510 for (i = 0; i < adapter->num_queues; i++)
1511 netif_napi_del(&adapter->ena_napi[i].napi);
1514 static void ena_init_napi(struct ena_adapter *adapter)
1516 struct ena_napi *napi;
1519 for (i = 0; i < adapter->num_queues; i++) {
1520 napi = &adapter->ena_napi[i];
1522 netif_napi_add(adapter->netdev,
1523 &adapter->ena_napi[i].napi,
1526 napi->rx_ring = &adapter->rx_ring[i];
1527 napi->tx_ring = &adapter->tx_ring[i];
1532 static void ena_napi_disable_all(struct ena_adapter *adapter)
1536 for (i = 0; i < adapter->num_queues; i++)
1537 napi_disable(&adapter->ena_napi[i].napi);
1540 static void ena_napi_enable_all(struct ena_adapter *adapter)
1544 for (i = 0; i < adapter->num_queues; i++)
1545 napi_enable(&adapter->ena_napi[i].napi);
1548 static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1550 adapter->tx_usecs = 0;
1551 adapter->rx_usecs = 0;
1552 adapter->tx_frames = 1;
1553 adapter->rx_frames = 1;
1556 /* Configure the Rx forwarding */
1557 static int ena_rss_configure(struct ena_adapter *adapter)
1559 struct ena_com_dev *ena_dev = adapter->ena_dev;
1562 /* In case the RSS table wasn't initialized by probe */
1563 if (!ena_dev->rss.tbl_log_size) {
1564 rc = ena_rss_init_default(adapter);
1565 if (rc && (rc != -EOPNOTSUPP)) {
1566 netif_err(adapter, ifup, adapter->netdev,
1567 "Failed to init RSS rc: %d\n", rc);
1572 /* Set indirect table */
1573 rc = ena_com_indirect_table_set(ena_dev);
1574 if (unlikely(rc && rc != -EOPNOTSUPP))
1577 /* Configure hash function (if supported) */
1578 rc = ena_com_set_hash_function(ena_dev);
1579 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1582 /* Configure hash inputs (if supported) */
1583 rc = ena_com_set_hash_ctrl(ena_dev);
1584 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1590 static int ena_up_complete(struct ena_adapter *adapter)
1594 rc = ena_rss_configure(adapter);
1598 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1600 ena_refill_all_rx_bufs(adapter);
1602 /* enable transmits */
1603 netif_tx_start_all_queues(adapter->netdev);
1605 ena_restore_ethtool_params(adapter);
1607 ena_napi_enable_all(adapter);
1612 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1614 struct ena_com_create_io_ctx ctx;
1615 struct ena_com_dev *ena_dev;
1616 struct ena_ring *tx_ring;
1621 ena_dev = adapter->ena_dev;
1623 tx_ring = &adapter->tx_ring[qid];
1624 msix_vector = ENA_IO_IRQ_IDX(qid);
1625 ena_qid = ENA_IO_TXQ_IDX(qid);
1627 memset(&ctx, 0x0, sizeof(ctx));
1629 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1631 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1632 ctx.msix_vector = msix_vector;
1633 ctx.queue_size = adapter->tx_ring_size;
1634 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1636 rc = ena_com_create_io_queue(ena_dev, &ctx);
1638 netif_err(adapter, ifup, adapter->netdev,
1639 "Failed to create I/O TX queue num %d rc: %d\n",
1644 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1645 &tx_ring->ena_com_io_sq,
1646 &tx_ring->ena_com_io_cq);
1648 netif_err(adapter, ifup, adapter->netdev,
1649 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1651 ena_com_destroy_io_queue(ena_dev, ena_qid);
1655 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1659 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1661 struct ena_com_dev *ena_dev = adapter->ena_dev;
1664 for (i = 0; i < adapter->num_queues; i++) {
1665 rc = ena_create_io_tx_queue(adapter, i);
1674 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1679 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1681 struct ena_com_dev *ena_dev;
1682 struct ena_com_create_io_ctx ctx;
1683 struct ena_ring *rx_ring;
1688 ena_dev = adapter->ena_dev;
1690 rx_ring = &adapter->rx_ring[qid];
1691 msix_vector = ENA_IO_IRQ_IDX(qid);
1692 ena_qid = ENA_IO_RXQ_IDX(qid);
1694 memset(&ctx, 0x0, sizeof(ctx));
1697 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1698 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1699 ctx.msix_vector = msix_vector;
1700 ctx.queue_size = adapter->rx_ring_size;
1701 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1703 rc = ena_com_create_io_queue(ena_dev, &ctx);
1705 netif_err(adapter, ifup, adapter->netdev,
1706 "Failed to create I/O RX queue num %d rc: %d\n",
1711 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1712 &rx_ring->ena_com_io_sq,
1713 &rx_ring->ena_com_io_cq);
1715 netif_err(adapter, ifup, adapter->netdev,
1716 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1718 ena_com_destroy_io_queue(ena_dev, ena_qid);
1722 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1727 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1729 struct ena_com_dev *ena_dev = adapter->ena_dev;
1732 for (i = 0; i < adapter->num_queues; i++) {
1733 rc = ena_create_io_rx_queue(adapter, i);
1742 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1747 static int ena_up(struct ena_adapter *adapter)
1751 netdev_dbg(adapter->netdev, "%s\n", __func__);
1753 ena_setup_io_intr(adapter);
1755 /* napi poll functions should be initialized before running
1756 * request_irq(), to handle a rare condition where there is a pending
1757 * interrupt, causing the ISR to fire immediately while the poll
1758 * function wasn't set yet, causing a null dereference
1760 ena_init_napi(adapter);
1762 rc = ena_request_io_irq(adapter);
1766 /* allocate transmit descriptors */
1767 rc = ena_setup_all_tx_resources(adapter);
1771 /* allocate receive descriptors */
1772 rc = ena_setup_all_rx_resources(adapter);
1776 /* Create TX queues */
1777 rc = ena_create_all_io_tx_queues(adapter);
1779 goto err_create_tx_queues;
1781 /* Create RX queues */
1782 rc = ena_create_all_io_rx_queues(adapter);
1784 goto err_create_rx_queues;
1786 rc = ena_up_complete(adapter);
1790 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1791 netif_carrier_on(adapter->netdev);
1793 u64_stats_update_begin(&adapter->syncp);
1794 adapter->dev_stats.interface_up++;
1795 u64_stats_update_end(&adapter->syncp);
1797 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1799 /* Enable completion queues interrupt */
1800 for (i = 0; i < adapter->num_queues; i++)
1801 ena_unmask_interrupt(&adapter->tx_ring[i],
1802 &adapter->rx_ring[i]);
1804 /* schedule napi in case we had pending packets
1805 * from the last time we disable napi
1807 for (i = 0; i < adapter->num_queues; i++)
1808 napi_schedule(&adapter->ena_napi[i].napi);
1813 ena_destroy_all_rx_queues(adapter);
1814 err_create_rx_queues:
1815 ena_destroy_all_tx_queues(adapter);
1816 err_create_tx_queues:
1817 ena_free_all_io_rx_resources(adapter);
1819 ena_free_all_io_tx_resources(adapter);
1821 ena_free_io_irq(adapter);
1827 static void ena_down(struct ena_adapter *adapter)
1829 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1831 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1833 u64_stats_update_begin(&adapter->syncp);
1834 adapter->dev_stats.interface_down++;
1835 u64_stats_update_end(&adapter->syncp);
1837 netif_carrier_off(adapter->netdev);
1838 netif_tx_disable(adapter->netdev);
1840 /* After this point the napi handler won't enable the tx queue */
1841 ena_napi_disable_all(adapter);
1843 /* After destroy the queue there won't be any new interrupts */
1845 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1848 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
1850 dev_err(&adapter->pdev->dev, "Device reset failed\n");
1851 /* stop submitting admin commands on a device that was reset */
1852 ena_com_set_admin_running_state(adapter->ena_dev, false);
1855 ena_destroy_all_io_queues(adapter);
1857 ena_disable_io_intr_sync(adapter);
1858 ena_free_io_irq(adapter);
1859 ena_del_napi(adapter);
1861 ena_free_all_tx_bufs(adapter);
1862 ena_free_all_rx_bufs(adapter);
1863 ena_free_all_io_tx_resources(adapter);
1864 ena_free_all_io_rx_resources(adapter);
1867 /* ena_open - Called when a network interface is made active
1868 * @netdev: network interface device structure
1870 * Returns 0 on success, negative value on failure
1872 * The open entry point is called when a network interface is made
1873 * active by the system (IFF_UP). At this point all resources needed
1874 * for transmit and receive operations are allocated, the interrupt
1875 * handler is registered with the OS, the watchdog timer is started,
1876 * and the stack is notified that the interface is ready.
1878 static int ena_open(struct net_device *netdev)
1880 struct ena_adapter *adapter = netdev_priv(netdev);
1883 /* Notify the stack of the actual queue counts. */
1884 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1886 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1890 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
1892 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1896 rc = ena_up(adapter);
1903 /* ena_close - Disables a network interface
1904 * @netdev: network interface device structure
1906 * Returns 0, this is not allowed to fail
1908 * The close entry point is called when an interface is de-activated
1909 * by the OS. The hardware is still under the drivers control, but
1910 * needs to be disabled. A global MAC reset is issued to stop the
1911 * hardware, and all transmit and receive resources are freed.
1913 static int ena_close(struct net_device *netdev)
1915 struct ena_adapter *adapter = netdev_priv(netdev);
1917 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
1919 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
1922 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
1925 /* Check for device status and issue reset if needed*/
1926 check_for_admin_com_state(adapter);
1927 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
1928 netif_err(adapter, ifdown, adapter->netdev,
1929 "Destroy failure, restarting device\n");
1930 ena_dump_stats_to_dmesg(adapter);
1931 /* rtnl lock already obtained in dev_ioctl() layer */
1932 ena_destroy_device(adapter, false);
1933 ena_restore_device(adapter);
1939 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1941 u32 mss = skb_shinfo(skb)->gso_size;
1942 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
1945 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
1946 ena_tx_ctx->l4_csum_enable = 1;
1948 ena_tx_ctx->tso_enable = 1;
1949 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
1950 ena_tx_ctx->l4_csum_partial = 0;
1952 ena_tx_ctx->tso_enable = 0;
1953 ena_meta->l4_hdr_len = 0;
1954 ena_tx_ctx->l4_csum_partial = 1;
1957 switch (ip_hdr(skb)->version) {
1959 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
1960 if (ip_hdr(skb)->frag_off & htons(IP_DF))
1963 ena_tx_ctx->l3_csum_enable = 1;
1964 l4_protocol = ip_hdr(skb)->protocol;
1967 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
1968 l4_protocol = ipv6_hdr(skb)->nexthdr;
1974 if (l4_protocol == IPPROTO_TCP)
1975 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
1977 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
1979 ena_meta->mss = mss;
1980 ena_meta->l3_hdr_len = skb_network_header_len(skb);
1981 ena_meta->l3_hdr_offset = skb_network_offset(skb);
1982 ena_tx_ctx->meta_valid = 1;
1985 ena_tx_ctx->meta_valid = 0;
1989 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
1990 struct sk_buff *skb)
1992 int num_frags, header_len, rc;
1994 num_frags = skb_shinfo(skb)->nr_frags;
1995 header_len = skb_headlen(skb);
1997 if (num_frags < tx_ring->sgl_size)
2000 if ((num_frags == tx_ring->sgl_size) &&
2001 (header_len < tx_ring->tx_max_header_size))
2004 u64_stats_update_begin(&tx_ring->syncp);
2005 tx_ring->tx_stats.linearize++;
2006 u64_stats_update_end(&tx_ring->syncp);
2008 rc = skb_linearize(skb);
2010 u64_stats_update_begin(&tx_ring->syncp);
2011 tx_ring->tx_stats.linearize_failed++;
2012 u64_stats_update_end(&tx_ring->syncp);
2018 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2019 struct ena_tx_buffer *tx_info,
2020 struct sk_buff *skb,
2024 struct ena_adapter *adapter = tx_ring->adapter;
2025 struct ena_com_buf *ena_buf;
2027 u32 skb_head_len, frag_len, last_frag;
2032 skb_head_len = skb_headlen(skb);
2034 ena_buf = tx_info->bufs;
2036 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2037 /* When the device is LLQ mode, the driver will copy
2038 * the header into the device memory space.
2039 * the ena_com layer assume the header is in a linear
2041 * This assumption might be wrong since part of the header
2042 * can be in the fragmented buffers.
2043 * Use skb_header_pointer to make sure the header is in a
2044 * linear memory space.
2047 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2048 *push_hdr = skb_header_pointer(skb, 0, push_len,
2049 tx_ring->push_buf_intermediate_buf);
2050 *header_len = push_len;
2051 if (unlikely(skb->data != *push_hdr)) {
2052 u64_stats_update_begin(&tx_ring->syncp);
2053 tx_ring->tx_stats.llq_buffer_copy++;
2054 u64_stats_update_end(&tx_ring->syncp);
2056 delta = push_len - skb_head_len;
2060 *header_len = min_t(u32, skb_head_len,
2061 tx_ring->tx_max_header_size);
2064 netif_dbg(adapter, tx_queued, adapter->netdev,
2065 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2066 *push_hdr, push_len);
2068 if (skb_head_len > push_len) {
2069 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2070 skb_head_len - push_len, DMA_TO_DEVICE);
2071 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2072 goto error_report_dma_error;
2074 ena_buf->paddr = dma;
2075 ena_buf->len = skb_head_len - push_len;
2078 tx_info->num_of_bufs++;
2079 tx_info->map_linear_data = 1;
2081 tx_info->map_linear_data = 0;
2084 last_frag = skb_shinfo(skb)->nr_frags;
2086 for (i = 0; i < last_frag; i++) {
2087 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2089 frag_len = skb_frag_size(frag);
2091 if (unlikely(delta >= frag_len)) {
2096 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2097 frag_len - delta, DMA_TO_DEVICE);
2098 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2099 goto error_report_dma_error;
2101 ena_buf->paddr = dma;
2102 ena_buf->len = frag_len - delta;
2104 tx_info->num_of_bufs++;
2110 error_report_dma_error:
2111 u64_stats_update_begin(&tx_ring->syncp);
2112 tx_ring->tx_stats.dma_mapping_err++;
2113 u64_stats_update_end(&tx_ring->syncp);
2114 netdev_warn(adapter->netdev, "failed to map skb\n");
2116 tx_info->skb = NULL;
2118 tx_info->num_of_bufs += i;
2119 ena_unmap_tx_skb(tx_ring, tx_info);
2124 /* Called with netif_tx_lock. */
2125 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2127 struct ena_adapter *adapter = netdev_priv(dev);
2128 struct ena_tx_buffer *tx_info;
2129 struct ena_com_tx_ctx ena_tx_ctx;
2130 struct ena_ring *tx_ring;
2131 struct netdev_queue *txq;
2133 u16 next_to_use, req_id, header_len;
2134 int qid, rc, nb_hw_desc;
2136 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2137 /* Determine which tx ring we will be placed on */
2138 qid = skb_get_queue_mapping(skb);
2139 tx_ring = &adapter->tx_ring[qid];
2140 txq = netdev_get_tx_queue(dev, qid);
2142 rc = ena_check_and_linearize_skb(tx_ring, skb);
2144 goto error_drop_packet;
2146 skb_tx_timestamp(skb);
2148 next_to_use = tx_ring->next_to_use;
2149 req_id = tx_ring->free_tx_ids[next_to_use];
2150 tx_info = &tx_ring->tx_buffer_info[req_id];
2151 tx_info->num_of_bufs = 0;
2153 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2155 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2157 goto error_drop_packet;
2159 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2160 ena_tx_ctx.ena_bufs = tx_info->bufs;
2161 ena_tx_ctx.push_header = push_hdr;
2162 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2163 ena_tx_ctx.req_id = req_id;
2164 ena_tx_ctx.header_len = header_len;
2166 /* set flags and meta data */
2167 ena_tx_csum(&ena_tx_ctx, skb);
2169 /* prepare the packet's descriptors to dma engine */
2170 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
2173 /* ena_com_prepare_tx() can't fail due to overflow of tx queue,
2174 * since the number of free descriptors in the queue is checked
2175 * after sending the previous packet. In case there isn't enough
2176 * space in the queue for the next packet, it is stopped
2177 * until there is again enough available space in the queue.
2178 * All other failure reasons of ena_com_prepare_tx() are fatal
2179 * and therefore require a device reset.
2182 netif_err(adapter, tx_queued, dev,
2183 "failed to prepare tx bufs\n");
2184 u64_stats_update_begin(&tx_ring->syncp);
2185 tx_ring->tx_stats.prepare_ctx_err++;
2186 u64_stats_update_end(&tx_ring->syncp);
2187 adapter->reset_reason = ENA_REGS_RESET_DRIVER_INVALID_STATE;
2188 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2189 goto error_unmap_dma;
2192 netdev_tx_sent_queue(txq, skb->len);
2194 u64_stats_update_begin(&tx_ring->syncp);
2195 tx_ring->tx_stats.cnt++;
2196 tx_ring->tx_stats.bytes += skb->len;
2197 u64_stats_update_end(&tx_ring->syncp);
2199 tx_info->tx_descs = nb_hw_desc;
2200 tx_info->last_jiffies = jiffies;
2201 tx_info->print_once = 0;
2203 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2204 tx_ring->ring_size);
2206 /* stop the queue when no more space available, the packet can have up
2207 * to sgl_size + 2. one for the meta descriptor and one for header
2208 * (if the header is larger than tx_max_header_size).
2210 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2211 tx_ring->sgl_size + 2))) {
2212 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2215 netif_tx_stop_queue(txq);
2216 u64_stats_update_begin(&tx_ring->syncp);
2217 tx_ring->tx_stats.queue_stop++;
2218 u64_stats_update_end(&tx_ring->syncp);
2220 /* There is a rare condition where this function decide to
2221 * stop the queue but meanwhile clean_tx_irq updates
2222 * next_to_completion and terminates.
2223 * The queue will remain stopped forever.
2224 * To solve this issue add a mb() to make sure that
2225 * netif_tx_stop_queue() write is vissible before checking if
2226 * there is additional space in the queue.
2230 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2231 ENA_TX_WAKEUP_THRESH)) {
2232 netif_tx_wake_queue(txq);
2233 u64_stats_update_begin(&tx_ring->syncp);
2234 tx_ring->tx_stats.queue_wakeup++;
2235 u64_stats_update_end(&tx_ring->syncp);
2239 if (netif_xmit_stopped(txq) || !skb->xmit_more) {
2240 /* trigger the dma engine. ena_com_write_sq_doorbell()
2243 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2244 u64_stats_update_begin(&tx_ring->syncp);
2245 tx_ring->tx_stats.doorbells++;
2246 u64_stats_update_end(&tx_ring->syncp);
2249 return NETDEV_TX_OK;
2252 ena_unmap_tx_skb(tx_ring, tx_info);
2253 tx_info->skb = NULL;
2257 return NETDEV_TX_OK;
2260 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2261 struct net_device *sb_dev,
2262 select_queue_fallback_t fallback)
2265 /* we suspect that this is good for in--kernel network services that
2266 * want to loop incoming skb rx to tx in normal user generated traffic,
2267 * most probably we will not get to this
2269 if (skb_rx_queue_recorded(skb))
2270 qid = skb_get_rx_queue(skb);
2272 qid = fallback(dev, skb, NULL);
2277 static void ena_config_host_info(struct ena_com_dev *ena_dev,
2278 struct pci_dev *pdev)
2280 struct ena_admin_host_info *host_info;
2283 /* Allocate only the host info */
2284 rc = ena_com_allocate_host_info(ena_dev);
2286 pr_err("Cannot allocate host info\n");
2290 host_info = ena_dev->host_attr.host_info;
2292 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
2293 host_info->os_type = ENA_ADMIN_OS_LINUX;
2294 host_info->kernel_ver = LINUX_VERSION_CODE;
2295 strncpy(host_info->kernel_ver_str, utsname()->version,
2296 sizeof(host_info->kernel_ver_str) - 1);
2297 host_info->os_dist = 0;
2298 strncpy(host_info->os_dist_str, utsname()->release,
2299 sizeof(host_info->os_dist_str) - 1);
2300 host_info->driver_version =
2301 (DRV_MODULE_VER_MAJOR) |
2302 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2303 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
2304 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
2305 host_info->num_cpus = num_online_cpus();
2307 rc = ena_com_set_host_attributes(ena_dev);
2309 if (rc == -EOPNOTSUPP)
2310 pr_warn("Cannot set host attributes\n");
2312 pr_err("Cannot set host attributes\n");
2320 ena_com_delete_host_info(ena_dev);
2323 static void ena_config_debug_area(struct ena_adapter *adapter)
2325 u32 debug_area_size;
2328 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2329 if (ss_count <= 0) {
2330 netif_err(adapter, drv, adapter->netdev,
2331 "SS count is negative\n");
2335 /* allocate 32 bytes for each string and 64bit for the value */
2336 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2338 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2340 pr_err("Cannot allocate debug area\n");
2344 rc = ena_com_set_host_attributes(adapter->ena_dev);
2346 if (rc == -EOPNOTSUPP)
2347 netif_warn(adapter, drv, adapter->netdev,
2348 "Cannot set host attributes\n");
2350 netif_err(adapter, drv, adapter->netdev,
2351 "Cannot set host attributes\n");
2357 ena_com_delete_debug_area(adapter->ena_dev);
2360 static void ena_get_stats64(struct net_device *netdev,
2361 struct rtnl_link_stats64 *stats)
2363 struct ena_adapter *adapter = netdev_priv(netdev);
2364 struct ena_ring *rx_ring, *tx_ring;
2369 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2372 for (i = 0; i < adapter->num_queues; i++) {
2375 tx_ring = &adapter->tx_ring[i];
2378 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2379 packets = tx_ring->tx_stats.cnt;
2380 bytes = tx_ring->tx_stats.bytes;
2381 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
2383 stats->tx_packets += packets;
2384 stats->tx_bytes += bytes;
2386 rx_ring = &adapter->rx_ring[i];
2389 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2390 packets = rx_ring->rx_stats.cnt;
2391 bytes = rx_ring->rx_stats.bytes;
2392 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2394 stats->rx_packets += packets;
2395 stats->rx_bytes += bytes;
2399 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2400 rx_drops = adapter->dev_stats.rx_drops;
2401 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
2403 stats->rx_dropped = rx_drops;
2405 stats->multicast = 0;
2406 stats->collisions = 0;
2408 stats->rx_length_errors = 0;
2409 stats->rx_crc_errors = 0;
2410 stats->rx_frame_errors = 0;
2411 stats->rx_fifo_errors = 0;
2412 stats->rx_missed_errors = 0;
2413 stats->tx_window_errors = 0;
2415 stats->rx_errors = 0;
2416 stats->tx_errors = 0;
2419 static const struct net_device_ops ena_netdev_ops = {
2420 .ndo_open = ena_open,
2421 .ndo_stop = ena_close,
2422 .ndo_start_xmit = ena_start_xmit,
2423 .ndo_select_queue = ena_select_queue,
2424 .ndo_get_stats64 = ena_get_stats64,
2425 .ndo_tx_timeout = ena_tx_timeout,
2426 .ndo_change_mtu = ena_change_mtu,
2427 .ndo_set_mac_address = NULL,
2428 .ndo_validate_addr = eth_validate_addr,
2431 static int ena_device_validate_params(struct ena_adapter *adapter,
2432 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2434 struct net_device *netdev = adapter->netdev;
2437 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2440 netif_err(adapter, drv, netdev,
2441 "Error, mac address are different\n");
2445 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2446 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2447 netif_err(adapter, drv, netdev,
2448 "Error, device doesn't support enough queues\n");
2452 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2453 netif_err(adapter, drv, netdev,
2454 "Error, device max mtu is smaller than netdev MTU\n");
2461 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2462 struct ena_com_dev_get_features_ctx *get_feat_ctx,
2465 struct device *dev = &pdev->dev;
2466 bool readless_supported;
2471 rc = ena_com_mmio_reg_read_request_init(ena_dev);
2473 dev_err(dev, "failed to init mmio read less\n");
2477 /* The PCIe configuration space revision id indicate if mmio reg
2480 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2481 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2483 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
2485 dev_err(dev, "Can not reset device\n");
2486 goto err_mmio_read_less;
2489 rc = ena_com_validate_version(ena_dev);
2491 dev_err(dev, "device version is too low\n");
2492 goto err_mmio_read_less;
2495 dma_width = ena_com_get_dma_width(ena_dev);
2496 if (dma_width < 0) {
2497 dev_err(dev, "Invalid dma width value %d", dma_width);
2499 goto err_mmio_read_less;
2502 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2504 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2505 goto err_mmio_read_less;
2508 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2510 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2512 goto err_mmio_read_less;
2515 /* ENA admin level init */
2516 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
2519 "Can not initialize ena admin queue with device\n");
2520 goto err_mmio_read_less;
2523 /* To enable the msix interrupts the driver needs to know the number
2524 * of queues. So the driver uses polling mode to retrieve this
2527 ena_com_set_admin_polling_mode(ena_dev, true);
2529 ena_config_host_info(ena_dev, pdev);
2531 /* Get Device Attributes*/
2532 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2534 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2535 goto err_admin_init;
2538 /* Try to turn all the available aenq groups */
2539 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2540 BIT(ENA_ADMIN_FATAL_ERROR) |
2541 BIT(ENA_ADMIN_WARNING) |
2542 BIT(ENA_ADMIN_NOTIFICATION) |
2543 BIT(ENA_ADMIN_KEEP_ALIVE);
2545 aenq_groups &= get_feat_ctx->aenq.supported_groups;
2547 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2549 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2550 goto err_admin_init;
2553 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2558 ena_com_delete_host_info(ena_dev);
2559 ena_com_admin_destroy(ena_dev);
2561 ena_com_mmio_reg_read_request_destroy(ena_dev);
2566 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2569 struct ena_com_dev *ena_dev = adapter->ena_dev;
2570 struct device *dev = &adapter->pdev->dev;
2573 rc = ena_enable_msix(adapter, io_vectors);
2575 dev_err(dev, "Can not reserve msix vectors\n");
2579 ena_setup_mgmnt_intr(adapter);
2581 rc = ena_request_mgmnt_irq(adapter);
2583 dev_err(dev, "Can not setup management interrupts\n");
2584 goto err_disable_msix;
2587 ena_com_set_admin_polling_mode(ena_dev, false);
2589 ena_com_admin_aenq_enable(ena_dev);
2594 ena_disable_msix(adapter);
2599 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
2601 struct net_device *netdev = adapter->netdev;
2602 struct ena_com_dev *ena_dev = adapter->ena_dev;
2605 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2608 netif_carrier_off(netdev);
2610 del_timer_sync(&adapter->timer_service);
2612 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2613 adapter->dev_up_before_reset = dev_up;
2615 ena_com_set_admin_running_state(ena_dev, false);
2617 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2620 /* Stop the device from sending AENQ events (in case reset flag is set
2621 * and device is up, ena_down() already reset the device.
2623 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
2624 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2626 ena_free_mgmnt_irq(adapter);
2628 ena_disable_msix(adapter);
2630 ena_com_abort_admin_commands(ena_dev);
2632 ena_com_wait_for_abort_completion(ena_dev);
2634 ena_com_admin_destroy(ena_dev);
2636 ena_com_mmio_reg_read_request_destroy(ena_dev);
2638 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
2640 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2641 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2644 static int ena_restore_device(struct ena_adapter *adapter)
2646 struct ena_com_dev_get_features_ctx get_feat_ctx;
2647 struct ena_com_dev *ena_dev = adapter->ena_dev;
2648 struct pci_dev *pdev = adapter->pdev;
2652 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2653 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2655 dev_err(&pdev->dev, "Can not initialize device\n");
2658 adapter->wd_state = wd_state;
2660 rc = ena_device_validate_params(adapter, &get_feat_ctx);
2662 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2663 goto err_device_destroy;
2666 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2667 /* Make sure we don't have a race with AENQ Links state handler */
2668 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2669 netif_carrier_on(adapter->netdev);
2671 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2672 adapter->num_queues);
2674 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2675 goto err_device_destroy;
2677 /* If the interface was up before the reset bring it up */
2678 if (adapter->dev_up_before_reset) {
2679 rc = ena_up(adapter);
2681 dev_err(&pdev->dev, "Failed to create I/O queues\n");
2682 goto err_disable_msix;
2686 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2687 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2689 "Device reset completed successfully, Driver info: %s\n",
2694 ena_free_mgmnt_irq(adapter);
2695 ena_disable_msix(adapter);
2697 ena_com_abort_admin_commands(ena_dev);
2698 ena_com_wait_for_abort_completion(ena_dev);
2699 ena_com_admin_destroy(ena_dev);
2700 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
2701 ena_com_mmio_reg_read_request_destroy(ena_dev);
2703 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2704 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2706 "Reset attempt failed. Can not reset the device\n");
2711 static void ena_fw_reset_device(struct work_struct *work)
2713 struct ena_adapter *adapter =
2714 container_of(work, struct ena_adapter, reset_task);
2715 struct pci_dev *pdev = adapter->pdev;
2717 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2719 "device reset schedule while reset bit is off\n");
2723 ena_destroy_device(adapter, false);
2724 ena_restore_device(adapter);
2728 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
2729 struct ena_ring *rx_ring)
2731 if (likely(rx_ring->first_interrupt))
2734 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
2737 rx_ring->no_interrupt_event_cnt++;
2739 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
2740 netif_err(adapter, rx_err, adapter->netdev,
2741 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
2743 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2744 smp_mb__before_atomic();
2745 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2752 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
2753 struct ena_ring *tx_ring)
2755 struct ena_tx_buffer *tx_buf;
2756 unsigned long last_jiffies;
2760 for (i = 0; i < tx_ring->ring_size; i++) {
2761 tx_buf = &tx_ring->tx_buffer_info[i];
2762 last_jiffies = tx_buf->last_jiffies;
2764 if (last_jiffies == 0)
2765 /* no pending Tx at this location */
2768 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
2769 2 * adapter->missing_tx_completion_to))) {
2770 /* If after graceful period interrupt is still not
2771 * received, we schedule a reset
2773 netif_err(adapter, tx_err, adapter->netdev,
2774 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
2776 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2777 smp_mb__before_atomic();
2778 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2782 if (unlikely(time_is_before_jiffies(last_jiffies +
2783 adapter->missing_tx_completion_to))) {
2784 if (!tx_buf->print_once)
2785 netif_notice(adapter, tx_err, adapter->netdev,
2786 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2789 tx_buf->print_once = 1;
2794 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
2795 netif_err(adapter, tx_err, adapter->netdev,
2796 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
2798 adapter->missing_tx_completion_threshold);
2799 adapter->reset_reason =
2800 ENA_REGS_RESET_MISS_TX_CMPL;
2801 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2805 u64_stats_update_begin(&tx_ring->syncp);
2806 tx_ring->tx_stats.missed_tx = missed_tx;
2807 u64_stats_update_end(&tx_ring->syncp);
2812 static void check_for_missing_completions(struct ena_adapter *adapter)
2814 struct ena_ring *tx_ring;
2815 struct ena_ring *rx_ring;
2818 /* Make sure the driver doesn't turn the device in other process */
2821 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2824 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2827 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
2830 budget = ENA_MONITORED_TX_QUEUES;
2832 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2833 tx_ring = &adapter->tx_ring[i];
2834 rx_ring = &adapter->rx_ring[i];
2836 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
2840 rc = check_for_rx_interrupt_queue(adapter, rx_ring);
2849 adapter->last_monitored_tx_qid = i % adapter->num_queues;
2852 /* trigger napi schedule after 2 consecutive detections */
2853 #define EMPTY_RX_REFILL 2
2854 /* For the rare case where the device runs out of Rx descriptors and the
2855 * napi handler failed to refill new Rx descriptors (due to a lack of memory
2857 * This case will lead to a deadlock:
2858 * The device won't send interrupts since all the new Rx packets will be dropped
2859 * The napi handler won't allocate new Rx descriptors so the device will be
2860 * able to send new packets.
2862 * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
2863 * It is recommended to have at least 512MB, with a minimum of 128MB for
2864 * constrained environment).
2866 * When such a situation is detected - Reschedule napi
2868 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
2870 struct ena_ring *rx_ring;
2871 int i, refill_required;
2873 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2876 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2879 for (i = 0; i < adapter->num_queues; i++) {
2880 rx_ring = &adapter->rx_ring[i];
2883 ena_com_free_desc(rx_ring->ena_com_io_sq);
2884 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
2885 rx_ring->empty_rx_queue++;
2887 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
2888 u64_stats_update_begin(&rx_ring->syncp);
2889 rx_ring->rx_stats.empty_rx_ring++;
2890 u64_stats_update_end(&rx_ring->syncp);
2892 netif_err(adapter, drv, adapter->netdev,
2893 "trigger refill for ring %d\n", i);
2895 napi_schedule(rx_ring->napi);
2896 rx_ring->empty_rx_queue = 0;
2899 rx_ring->empty_rx_queue = 0;
2904 /* Check for keep alive expiration */
2905 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
2907 unsigned long keep_alive_expired;
2909 if (!adapter->wd_state)
2912 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2915 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies +
2916 adapter->keep_alive_timeout);
2917 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
2918 netif_err(adapter, drv, adapter->netdev,
2919 "Keep alive watchdog timeout.\n");
2920 u64_stats_update_begin(&adapter->syncp);
2921 adapter->dev_stats.wd_expired++;
2922 u64_stats_update_end(&adapter->syncp);
2923 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
2924 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2928 static void check_for_admin_com_state(struct ena_adapter *adapter)
2930 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
2931 netif_err(adapter, drv, adapter->netdev,
2932 "ENA admin queue is not in running state!\n");
2933 u64_stats_update_begin(&adapter->syncp);
2934 adapter->dev_stats.admin_q_pause++;
2935 u64_stats_update_end(&adapter->syncp);
2936 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
2937 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2941 static void ena_update_hints(struct ena_adapter *adapter,
2942 struct ena_admin_ena_hw_hints *hints)
2944 struct net_device *netdev = adapter->netdev;
2946 if (hints->admin_completion_tx_timeout)
2947 adapter->ena_dev->admin_queue.completion_timeout =
2948 hints->admin_completion_tx_timeout * 1000;
2950 if (hints->mmio_read_timeout)
2951 /* convert to usec */
2952 adapter->ena_dev->mmio_read.reg_read_to =
2953 hints->mmio_read_timeout * 1000;
2955 if (hints->missed_tx_completion_count_threshold_to_reset)
2956 adapter->missing_tx_completion_threshold =
2957 hints->missed_tx_completion_count_threshold_to_reset;
2959 if (hints->missing_tx_completion_timeout) {
2960 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2961 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
2963 adapter->missing_tx_completion_to =
2964 msecs_to_jiffies(hints->missing_tx_completion_timeout);
2967 if (hints->netdev_wd_timeout)
2968 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
2970 if (hints->driver_watchdog_timeout) {
2971 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2972 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
2974 adapter->keep_alive_timeout =
2975 msecs_to_jiffies(hints->driver_watchdog_timeout);
2979 static void ena_update_host_info(struct ena_admin_host_info *host_info,
2980 struct net_device *netdev)
2982 host_info->supported_network_features[0] =
2983 netdev->features & GENMASK_ULL(31, 0);
2984 host_info->supported_network_features[1] =
2985 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
2988 static void ena_timer_service(struct timer_list *t)
2990 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
2991 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
2992 struct ena_admin_host_info *host_info =
2993 adapter->ena_dev->host_attr.host_info;
2995 check_for_missing_keep_alive(adapter);
2997 check_for_admin_com_state(adapter);
2999 check_for_missing_completions(adapter);
3001 check_for_empty_rx_ring(adapter);
3004 ena_dump_stats_to_buf(adapter, debug_area);
3007 ena_update_host_info(host_info, adapter->netdev);
3009 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3010 netif_err(adapter, drv, adapter->netdev,
3011 "Trigger reset is on\n");
3012 ena_dump_stats_to_dmesg(adapter);
3013 queue_work(ena_wq, &adapter->reset_task);
3017 /* Reset the timer */
3018 mod_timer(&adapter->timer_service, jiffies + HZ);
3021 static int ena_calc_io_queue_num(struct pci_dev *pdev,
3022 struct ena_com_dev *ena_dev,
3023 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3025 int io_sq_num, io_queue_num;
3027 /* In case of LLQ use the llq number in the get feature cmd */
3028 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3029 io_sq_num = get_feat_ctx->llq.max_llq_num;
3031 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
3033 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3034 io_queue_num = min_t(int, io_queue_num, io_sq_num);
3035 io_queue_num = min_t(int, io_queue_num,
3036 get_feat_ctx->max_queues.max_cq_num);
3037 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3038 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
3039 if (unlikely(!io_queue_num)) {
3040 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3044 return io_queue_num;
3047 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3048 struct ena_com_dev *ena_dev,
3049 struct ena_admin_feature_llq_desc *llq,
3050 struct ena_llq_configurations *llq_default_configurations)
3054 u32 llq_feature_mask;
3056 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3057 if (!(ena_dev->supported_features & llq_feature_mask)) {
3059 "LLQ is not supported Fallback to host mode policy.\n");
3060 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3064 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3066 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3069 "Failed to configure the device mode. Fallback to host mode policy.\n");
3070 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3074 /* Nothing to config, exit */
3075 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3080 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3081 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3085 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3086 pci_resource_start(pdev, ENA_MEM_BAR),
3087 pci_resource_len(pdev, ENA_MEM_BAR));
3089 if (!ena_dev->mem_bar)
3095 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3096 struct net_device *netdev)
3098 netdev_features_t dev_features = 0;
3100 /* Set offload features */
3101 if (feat->offload.tx &
3102 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3103 dev_features |= NETIF_F_IP_CSUM;
3105 if (feat->offload.tx &
3106 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3107 dev_features |= NETIF_F_IPV6_CSUM;
3109 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3110 dev_features |= NETIF_F_TSO;
3112 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3113 dev_features |= NETIF_F_TSO6;
3115 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3116 dev_features |= NETIF_F_TSO_ECN;
3118 if (feat->offload.rx_supported &
3119 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3120 dev_features |= NETIF_F_RXCSUM;
3122 if (feat->offload.rx_supported &
3123 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3124 dev_features |= NETIF_F_RXCSUM;
3132 netdev->hw_features |= netdev->features;
3133 netdev->vlan_features |= netdev->features;
3136 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3137 struct ena_com_dev_get_features_ctx *feat)
3139 struct net_device *netdev = adapter->netdev;
3141 /* Copy mac address */
3142 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3143 eth_hw_addr_random(netdev);
3144 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3146 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3147 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3150 /* Set offload features */
3151 ena_set_dev_offloads(feat, netdev);
3153 adapter->max_mtu = feat->dev_attr.max_mtu;
3154 netdev->max_mtu = adapter->max_mtu;
3155 netdev->min_mtu = ENA_MIN_MTU;
3158 static int ena_rss_init_default(struct ena_adapter *adapter)
3160 struct ena_com_dev *ena_dev = adapter->ena_dev;
3161 struct device *dev = &adapter->pdev->dev;
3165 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3167 dev_err(dev, "Cannot init indirect table\n");
3171 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3172 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
3173 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3174 ENA_IO_RXQ_IDX(val));
3175 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3176 dev_err(dev, "Cannot fill indirect table\n");
3177 goto err_fill_indir;
3181 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3182 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3183 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3184 dev_err(dev, "Cannot fill hash function\n");
3185 goto err_fill_indir;
3188 rc = ena_com_set_default_hash_ctrl(ena_dev);
3189 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3190 dev_err(dev, "Cannot fill hash control\n");
3191 goto err_fill_indir;
3197 ena_com_rss_destroy(ena_dev);
3203 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3205 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3207 pci_release_selected_regions(pdev, release_bars);
3210 static inline void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3212 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3213 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3214 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3215 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3216 llq_config->llq_ring_entry_size_value = 128;
3219 static int ena_calc_queue_size(struct pci_dev *pdev,
3220 struct ena_com_dev *ena_dev,
3221 u16 *max_tx_sgl_size,
3222 u16 *max_rx_sgl_size,
3223 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3225 u32 queue_size = ENA_DEFAULT_RING_SIZE;
3227 queue_size = min_t(u32, queue_size,
3228 get_feat_ctx->max_queues.max_cq_depth);
3229 queue_size = min_t(u32, queue_size,
3230 get_feat_ctx->max_queues.max_sq_depth);
3232 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3233 queue_size = min_t(u32, queue_size,
3234 get_feat_ctx->llq.max_llq_depth);
3236 queue_size = rounddown_pow_of_two(queue_size);
3238 if (unlikely(!queue_size)) {
3239 dev_err(&pdev->dev, "Invalid queue size\n");
3243 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3244 get_feat_ctx->max_queues.max_packet_tx_descs);
3245 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3246 get_feat_ctx->max_queues.max_packet_rx_descs);
3251 /* ena_probe - Device Initialization Routine
3252 * @pdev: PCI device information struct
3253 * @ent: entry in ena_pci_tbl
3255 * Returns 0 on success, negative on failure
3257 * ena_probe initializes an adapter identified by a pci_dev structure.
3258 * The OS initialization, configuring of the adapter private structure,
3259 * and a hardware reset occur.
3261 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3263 struct ena_com_dev_get_features_ctx get_feat_ctx;
3264 static int version_printed;
3265 struct net_device *netdev;
3266 struct ena_adapter *adapter;
3267 struct ena_llq_configurations llq_config;
3268 struct ena_com_dev *ena_dev = NULL;
3269 char *queue_type_str;
3270 static int adapters_found;
3271 int io_queue_num, bars, rc;
3273 u16 tx_sgl_size = 0;
3274 u16 rx_sgl_size = 0;
3277 dev_dbg(&pdev->dev, "%s\n", __func__);
3279 if (version_printed++ == 0)
3280 dev_info(&pdev->dev, "%s", version);
3282 rc = pci_enable_device_mem(pdev);
3284 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
3288 pci_set_master(pdev);
3290 ena_dev = vzalloc(sizeof(*ena_dev));
3293 goto err_disable_device;
3296 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3297 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
3299 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
3301 goto err_free_ena_dev;
3304 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
3305 pci_resource_start(pdev, ENA_REG_BAR),
3306 pci_resource_len(pdev, ENA_REG_BAR));
3307 if (!ena_dev->reg_bar) {
3308 dev_err(&pdev->dev, "failed to remap regs bar\n");
3310 goto err_free_region;
3313 ena_dev->dmadev = &pdev->dev;
3315 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
3317 dev_err(&pdev->dev, "ena device init failed\n");
3320 goto err_free_region;
3323 set_default_llq_configurations(&llq_config);
3325 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
3328 dev_err(&pdev->dev, "ena device init failed\n");
3329 goto err_device_destroy;
3332 /* initial Tx interrupt delay, Assumes 1 usec granularity.
3333 * Updated during device initialization with the real granularity
3335 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3336 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
3337 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
3338 &rx_sgl_size, &get_feat_ctx);
3339 if ((queue_size <= 0) || (io_queue_num <= 0)) {
3341 goto err_device_destroy;
3344 dev_info(&pdev->dev, "creating %d io queues. queue size: %d. LLQ is %s\n",
3345 io_queue_num, queue_size,
3346 (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
3347 "ENABLED" : "DISABLED");
3349 /* dev zeroed in init_etherdev */
3350 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
3352 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
3354 goto err_device_destroy;
3357 SET_NETDEV_DEV(netdev, &pdev->dev);
3359 adapter = netdev_priv(netdev);
3360 pci_set_drvdata(pdev, adapter);
3362 adapter->ena_dev = ena_dev;
3363 adapter->netdev = netdev;
3364 adapter->pdev = pdev;
3366 ena_set_conf_feat_params(adapter, &get_feat_ctx);
3368 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3369 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3371 adapter->tx_ring_size = queue_size;
3372 adapter->rx_ring_size = queue_size;
3374 adapter->max_tx_sgl_size = tx_sgl_size;
3375 adapter->max_rx_sgl_size = rx_sgl_size;
3377 adapter->num_queues = io_queue_num;
3378 adapter->last_monitored_tx_qid = 0;
3380 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3381 adapter->wd_state = wd_state;
3383 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3385 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3388 "Failed to query interrupt moderation feature\n");
3389 goto err_netdev_destroy;
3391 ena_init_io_rings(adapter);
3393 netdev->netdev_ops = &ena_netdev_ops;
3394 netdev->watchdog_timeo = TX_TIMEOUT;
3395 ena_set_ethtool_ops(netdev);
3397 netdev->priv_flags |= IFF_UNICAST_FLT;
3399 u64_stats_init(&adapter->syncp);
3401 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3404 "Failed to enable and set the admin interrupts\n");
3405 goto err_worker_destroy;
3407 rc = ena_rss_init_default(adapter);
3408 if (rc && (rc != -EOPNOTSUPP)) {
3409 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3413 ena_config_debug_area(adapter);
3415 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3417 netif_carrier_off(netdev);
3419 rc = register_netdev(netdev);
3421 dev_err(&pdev->dev, "Cannot register net device\n");
3425 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3427 adapter->last_keep_alive_jiffies = jiffies;
3428 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
3429 adapter->missing_tx_completion_to = TX_TIMEOUT;
3430 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
3432 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
3434 timer_setup(&adapter->timer_service, ena_timer_service, 0);
3435 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3437 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3438 queue_type_str = "Regular";
3440 queue_type_str = "Low Latency";
3442 dev_info(&pdev->dev,
3443 "%s found at mem %lx, mac addr %pM Queues %d, Placement policy: %s\n",
3444 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3445 netdev->dev_addr, io_queue_num, queue_type_str);
3447 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3454 ena_com_delete_debug_area(ena_dev);
3455 ena_com_rss_destroy(ena_dev);
3457 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
3458 /* stop submitting admin commands on a device that was reset */
3459 ena_com_set_admin_running_state(ena_dev, false);
3460 ena_free_mgmnt_irq(adapter);
3461 ena_disable_msix(adapter);
3463 ena_com_destroy_interrupt_moderation(ena_dev);
3464 del_timer(&adapter->timer_service);
3466 free_netdev(netdev);
3468 ena_com_delete_host_info(ena_dev);
3469 ena_com_admin_destroy(ena_dev);
3471 ena_release_bars(ena_dev, pdev);
3475 pci_disable_device(pdev);
3479 /*****************************************************************************/
3481 /* ena_remove - Device Removal Routine
3482 * @pdev: PCI device information struct
3484 * ena_remove is called by the PCI subsystem to alert the driver
3485 * that it should release a PCI device.
3487 static void ena_remove(struct pci_dev *pdev)
3489 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3490 struct ena_com_dev *ena_dev;
3491 struct net_device *netdev;
3493 ena_dev = adapter->ena_dev;
3494 netdev = adapter->netdev;
3496 #ifdef CONFIG_RFS_ACCEL
3497 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3498 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3499 netdev->rx_cpu_rmap = NULL;
3501 #endif /* CONFIG_RFS_ACCEL */
3502 del_timer_sync(&adapter->timer_service);
3504 cancel_work_sync(&adapter->reset_task);
3507 ena_destroy_device(adapter, true);
3510 unregister_netdev(netdev);
3512 free_netdev(netdev);
3514 ena_com_rss_destroy(ena_dev);
3516 ena_com_delete_debug_area(ena_dev);
3518 ena_com_delete_host_info(ena_dev);
3520 ena_release_bars(ena_dev, pdev);
3522 pci_disable_device(pdev);
3524 ena_com_destroy_interrupt_moderation(ena_dev);
3530 /* ena_suspend - PM suspend callback
3531 * @pdev: PCI device information struct
3532 * @state:power state
3534 static int ena_suspend(struct pci_dev *pdev, pm_message_t state)
3536 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3538 u64_stats_update_begin(&adapter->syncp);
3539 adapter->dev_stats.suspend++;
3540 u64_stats_update_end(&adapter->syncp);
3543 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3545 "ignoring device reset request as the device is being suspended\n");
3546 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3548 ena_destroy_device(adapter, true);
3553 /* ena_resume - PM resume callback
3554 * @pdev: PCI device information struct
3557 static int ena_resume(struct pci_dev *pdev)
3559 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3562 u64_stats_update_begin(&adapter->syncp);
3563 adapter->dev_stats.resume++;
3564 u64_stats_update_end(&adapter->syncp);
3567 rc = ena_restore_device(adapter);
3573 static struct pci_driver ena_pci_driver = {
3574 .name = DRV_MODULE_NAME,
3575 .id_table = ena_pci_tbl,
3577 .remove = ena_remove,
3579 .suspend = ena_suspend,
3580 .resume = ena_resume,
3582 .sriov_configure = pci_sriov_configure_simple,
3585 static int __init ena_init(void)
3587 pr_info("%s", version);
3589 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3591 pr_err("Failed to create workqueue\n");
3595 return pci_register_driver(&ena_pci_driver);
3598 static void __exit ena_cleanup(void)
3600 pci_unregister_driver(&ena_pci_driver);
3603 destroy_workqueue(ena_wq);
3608 /******************************************************************************
3609 ******************************** AENQ Handlers *******************************
3610 *****************************************************************************/
3611 /* ena_update_on_link_change:
3612 * Notify the network interface about the change in link status
3614 static void ena_update_on_link_change(void *adapter_data,
3615 struct ena_admin_aenq_entry *aenq_e)
3617 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3618 struct ena_admin_aenq_link_change_desc *aenq_desc =
3619 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3620 int status = aenq_desc->flags &
3621 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3624 netdev_dbg(adapter->netdev, "%s\n", __func__);
3625 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3626 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
3627 netif_carrier_on(adapter->netdev);
3629 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3630 netif_carrier_off(adapter->netdev);
3634 static void ena_keep_alive_wd(void *adapter_data,
3635 struct ena_admin_aenq_entry *aenq_e)
3637 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3638 struct ena_admin_aenq_keep_alive_desc *desc;
3641 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3642 adapter->last_keep_alive_jiffies = jiffies;
3644 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
3646 u64_stats_update_begin(&adapter->syncp);
3647 adapter->dev_stats.rx_drops = rx_drops;
3648 u64_stats_update_end(&adapter->syncp);
3651 static void ena_notification(void *adapter_data,
3652 struct ena_admin_aenq_entry *aenq_e)
3654 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3655 struct ena_admin_ena_hw_hints *hints;
3657 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3658 "Invalid group(%x) expected %x\n",
3659 aenq_e->aenq_common_desc.group,
3660 ENA_ADMIN_NOTIFICATION);
3662 switch (aenq_e->aenq_common_desc.syndrom) {
3663 case ENA_ADMIN_UPDATE_HINTS:
3664 hints = (struct ena_admin_ena_hw_hints *)
3665 (&aenq_e->inline_data_w4);
3666 ena_update_hints(adapter, hints);
3669 netif_err(adapter, drv, adapter->netdev,
3670 "Invalid aenq notification link state %d\n",
3671 aenq_e->aenq_common_desc.syndrom);
3675 /* This handler will called for unknown event group or unimplemented handlers*/
3676 static void unimplemented_aenq_handler(void *data,
3677 struct ena_admin_aenq_entry *aenq_e)
3679 struct ena_adapter *adapter = (struct ena_adapter *)data;
3681 netif_err(adapter, drv, adapter->netdev,
3682 "Unknown event was received or event with unimplemented handler\n");
3685 static struct ena_aenq_handlers aenq_handlers = {
3687 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3688 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3689 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3691 .unimplemented_handler = unimplemented_aenq_handler
3694 module_init(ena_init);
3695 module_exit(ena_cleanup);