6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Simple multiplexer clock implementation
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
17 #include <linux/err.h>
20 * DOC: basic adjustable multiplexer clock that cannot gate
22 * Traits of this clock:
23 * prepare - clk_prepare only ensures that parents are prepared
24 * enable - clk_enable only ensures that parents are enabled
25 * rate - rate is only affected by parent switching. No clk_set_rate support
26 * parent - parent is adjustable through clk_set_parent
29 int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
32 int num_parents = clk_hw_get_num_parents(hw);
37 for (i = 0; i < num_parents; i++)
43 if (val && (flags & CLK_MUX_INDEX_BIT))
46 if (val && (flags & CLK_MUX_INDEX_ONE))
49 if (val >= num_parents)
54 EXPORT_SYMBOL_GPL(clk_mux_val_to_index);
56 unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index)
58 unsigned int val = index;
63 if (flags & CLK_MUX_INDEX_BIT)
66 if (flags & CLK_MUX_INDEX_ONE)
72 EXPORT_SYMBOL_GPL(clk_mux_index_to_val);
74 static u8 clk_mux_get_parent(struct clk_hw *hw)
76 struct clk_mux *mux = to_clk_mux(hw);
79 val = clk_readl(mux->reg) >> mux->shift;
82 return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
85 static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
87 struct clk_mux *mux = to_clk_mux(hw);
88 u32 val = clk_mux_index_to_val(mux->table, mux->flags, index);
89 unsigned long flags = 0;
93 spin_lock_irqsave(mux->lock, flags);
97 if (mux->flags & CLK_MUX_HIWORD_MASK) {
98 reg = mux->mask << (mux->shift + 16);
100 reg = clk_readl(mux->reg);
101 reg &= ~(mux->mask << mux->shift);
103 val = val << mux->shift;
105 clk_writel(reg, mux->reg);
108 spin_unlock_irqrestore(mux->lock, flags);
110 __release(mux->lock);
115 static int clk_mux_determine_rate(struct clk_hw *hw,
116 struct clk_rate_request *req)
118 struct clk_mux *mux = to_clk_mux(hw);
120 return clk_mux_determine_rate_flags(hw, req, mux->flags);
123 const struct clk_ops clk_mux_ops = {
124 .get_parent = clk_mux_get_parent,
125 .set_parent = clk_mux_set_parent,
126 .determine_rate = clk_mux_determine_rate,
128 EXPORT_SYMBOL_GPL(clk_mux_ops);
130 const struct clk_ops clk_mux_ro_ops = {
131 .get_parent = clk_mux_get_parent,
133 EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
135 struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name,
136 const char * const *parent_names, u8 num_parents,
138 void __iomem *reg, u8 shift, u32 mask,
139 u8 clk_mux_flags, u32 *table, spinlock_t *lock)
143 struct clk_init_data init;
147 if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
148 width = fls(mask) - ffs(mask) + 1;
149 if (width + shift > 16) {
150 pr_err("mux value exceeds LOWORD field\n");
151 return ERR_PTR(-EINVAL);
155 /* allocate the mux */
156 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
158 return ERR_PTR(-ENOMEM);
161 if (clk_mux_flags & CLK_MUX_READ_ONLY)
162 init.ops = &clk_mux_ro_ops;
164 init.ops = &clk_mux_ops;
165 init.flags = flags | CLK_IS_BASIC;
166 init.parent_names = parent_names;
167 init.num_parents = num_parents;
169 /* struct clk_mux assignments */
173 mux->flags = clk_mux_flags;
176 mux->hw.init = &init;
179 ret = clk_hw_register(dev, hw);
187 EXPORT_SYMBOL_GPL(clk_hw_register_mux_table);
189 struct clk *clk_register_mux_table(struct device *dev, const char *name,
190 const char * const *parent_names, u8 num_parents,
192 void __iomem *reg, u8 shift, u32 mask,
193 u8 clk_mux_flags, u32 *table, spinlock_t *lock)
197 hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents,
198 flags, reg, shift, mask, clk_mux_flags,
204 EXPORT_SYMBOL_GPL(clk_register_mux_table);
206 struct clk *clk_register_mux(struct device *dev, const char *name,
207 const char * const *parent_names, u8 num_parents,
209 void __iomem *reg, u8 shift, u8 width,
210 u8 clk_mux_flags, spinlock_t *lock)
212 u32 mask = BIT(width) - 1;
214 return clk_register_mux_table(dev, name, parent_names, num_parents,
215 flags, reg, shift, mask, clk_mux_flags,
218 EXPORT_SYMBOL_GPL(clk_register_mux);
220 struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name,
221 const char * const *parent_names, u8 num_parents,
223 void __iomem *reg, u8 shift, u8 width,
224 u8 clk_mux_flags, spinlock_t *lock)
226 u32 mask = BIT(width) - 1;
228 return clk_hw_register_mux_table(dev, name, parent_names, num_parents,
229 flags, reg, shift, mask, clk_mux_flags,
232 EXPORT_SYMBOL_GPL(clk_hw_register_mux);
234 void clk_unregister_mux(struct clk *clk)
239 hw = __clk_get_hw(clk);
243 mux = to_clk_mux(hw);
248 EXPORT_SYMBOL_GPL(clk_unregister_mux);
250 void clk_hw_unregister_mux(struct clk_hw *hw)
254 mux = to_clk_mux(hw);
256 clk_hw_unregister(hw);
259 EXPORT_SYMBOL_GPL(clk_hw_unregister_mux);