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1 | // SPDX-License-Identifier: GPL-2.0 | |
2 | /* | |
3 | * NCR 5380 generic driver routines. These should make it *trivial* | |
4 | * to implement 5380 SCSI drivers under Linux with a non-trantor | |
5 | * architecture. | |
6 | * | |
7 | * Note that these routines also work with NR53c400 family chips. | |
8 | * | |
9 | * Copyright 1993, Drew Eckhardt | |
10 | * Visionary Computing | |
11 | * (Unix and Linux consulting and custom programming) | |
12 | * [email protected] | |
13 | * +1 (303) 666-5836 | |
14 | * | |
15 | * For more information, please consult | |
16 | * | |
17 | * NCR 5380 Family | |
18 | * SCSI Protocol Controller | |
19 | * Databook | |
20 | * | |
21 | * NCR Microelectronics | |
22 | * 1635 Aeroplaza Drive | |
23 | * Colorado Springs, CO 80916 | |
24 | * 1+ (719) 578-3400 | |
25 | * 1+ (800) 334-5454 | |
26 | */ | |
27 | ||
28 | /* | |
29 | * With contributions from Ray Van Tassle, Ingmar Baumgart, | |
30 | * Ronald van Cuijlenborg, Alan Cox and others. | |
31 | */ | |
32 | ||
33 | /* Ported to Atari by Roman Hodek and others. */ | |
34 | ||
35 | /* Adapted for the Sun 3 by Sam Creasey. */ | |
36 | ||
37 | /* | |
38 | * Design | |
39 | * | |
40 | * This is a generic 5380 driver. To use it on a different platform, | |
41 | * one simply writes appropriate system specific macros (ie, data | |
42 | * transfer - some PC's will use the I/O bus, 68K's must use | |
43 | * memory mapped) and drops this file in their 'C' wrapper. | |
44 | * | |
45 | * As far as command queueing, two queues are maintained for | |
46 | * each 5380 in the system - commands that haven't been issued yet, | |
47 | * and commands that are currently executing. This means that an | |
48 | * unlimited number of commands may be queued, letting | |
49 | * more commands propagate from the higher driver levels giving higher | |
50 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
51 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
52 | * while a command is already executing. | |
53 | * | |
54 | * | |
55 | * Issues specific to the NCR5380 : | |
56 | * | |
57 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead | |
58 | * piece of hardware that requires you to sit in a loop polling for | |
59 | * the REQ signal as long as you are connected. Some devices are | |
60 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
61 | * while doing long seek operations. [...] These | |
62 | * broken devices are the exception rather than the rule and I'd rather | |
63 | * spend my time optimizing for the normal case. | |
64 | * | |
65 | * Architecture : | |
66 | * | |
67 | * At the heart of the design is a coroutine, NCR5380_main, | |
68 | * which is started from a workqueue for each NCR5380 host in the | |
69 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
70 | * removing the commands from the issue queue and calling | |
71 | * NCR5380_select() if a nexus is not established. | |
72 | * | |
73 | * Once a nexus is established, the NCR5380_information_transfer() | |
74 | * phase goes through the various phases as instructed by the target. | |
75 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
76 | * the command structure is placed into the per instance disconnected | |
77 | * queue, and NCR5380_main tries to find more work. If the target is | |
78 | * idle for too long, the system will try to sleep. | |
79 | * | |
80 | * If a command has disconnected, eventually an interrupt will trigger, | |
81 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
82 | * to reestablish a nexus. This will run main if necessary. | |
83 | * | |
84 | * On command termination, the done function will be called as | |
85 | * appropriate. | |
86 | * | |
87 | * SCSI pointers are maintained in the SCp field of SCSI command | |
88 | * structures, being initialized after the command is connected | |
89 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
90 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
91 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
92 | */ | |
93 | ||
94 | /* | |
95 | * Using this file : | |
96 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
97 | * of chips. To use it, you write an architecture specific functions | |
98 | * and macros and include this file in your driver. | |
99 | * | |
100 | * These macros MUST be defined : | |
101 | * | |
102 | * NCR5380_read(register) - read from the specified register | |
103 | * | |
104 | * NCR5380_write(register, value) - write to the specific register | |
105 | * | |
106 | * NCR5380_implementation_fields - additional fields needed for this | |
107 | * specific implementation of the NCR5380 | |
108 | * | |
109 | * Either real DMA *or* pseudo DMA may be implemented | |
110 | * | |
111 | * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer | |
112 | * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 | |
113 | * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory | |
114 | * NCR5380_dma_residual - residual byte count | |
115 | * | |
116 | * The generic driver is initialized by calling NCR5380_init(instance), | |
117 | * after setting the appropriate host specific fields and ID. | |
118 | */ | |
119 | ||
120 | #ifndef NCR5380_io_delay | |
121 | #define NCR5380_io_delay(x) | |
122 | #endif | |
123 | ||
124 | #ifndef NCR5380_acquire_dma_irq | |
125 | #define NCR5380_acquire_dma_irq(x) (1) | |
126 | #endif | |
127 | ||
128 | #ifndef NCR5380_release_dma_irq | |
129 | #define NCR5380_release_dma_irq(x) | |
130 | #endif | |
131 | ||
132 | static int do_abort(struct Scsi_Host *); | |
133 | static void do_reset(struct Scsi_Host *); | |
134 | static void bus_reset_cleanup(struct Scsi_Host *); | |
135 | ||
136 | /** | |
137 | * initialize_SCp - init the scsi pointer field | |
138 | * @cmd: command block to set up | |
139 | * | |
140 | * Set up the internal fields in the SCSI command. | |
141 | */ | |
142 | ||
143 | static inline void initialize_SCp(struct scsi_cmnd *cmd) | |
144 | { | |
145 | /* | |
146 | * Initialize the Scsi Pointer field so that all of the commands in the | |
147 | * various queues are valid. | |
148 | */ | |
149 | ||
150 | if (scsi_bufflen(cmd)) { | |
151 | cmd->SCp.buffer = scsi_sglist(cmd); | |
152 | cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; | |
153 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); | |
154 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
155 | } else { | |
156 | cmd->SCp.buffer = NULL; | |
157 | cmd->SCp.buffers_residual = 0; | |
158 | cmd->SCp.ptr = NULL; | |
159 | cmd->SCp.this_residual = 0; | |
160 | } | |
161 | ||
162 | cmd->SCp.Status = 0; | |
163 | cmd->SCp.Message = 0; | |
164 | } | |
165 | ||
166 | /** | |
167 | * NCR5380_poll_politely2 - wait for two chip register values | |
168 | * @hostdata: host private data | |
169 | * @reg1: 5380 register to poll | |
170 | * @bit1: Bitmask to check | |
171 | * @val1: Expected value | |
172 | * @reg2: Second 5380 register to poll | |
173 | * @bit2: Second bitmask to check | |
174 | * @val2: Second expected value | |
175 | * @wait: Time-out in jiffies | |
176 | * | |
177 | * Polls the chip in a reasonably efficient manner waiting for an | |
178 | * event to occur. After a short quick poll we begin to yield the CPU | |
179 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
180 | * Callers may hold locks as long as they are held in irq mode. | |
181 | * | |
182 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. | |
183 | */ | |
184 | ||
185 | static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, | |
186 | unsigned int reg1, u8 bit1, u8 val1, | |
187 | unsigned int reg2, u8 bit2, u8 val2, | |
188 | unsigned long wait) | |
189 | { | |
190 | unsigned long n = hostdata->poll_loops; | |
191 | unsigned long deadline = jiffies + wait; | |
192 | ||
193 | do { | |
194 | if ((NCR5380_read(reg1) & bit1) == val1) | |
195 | return 0; | |
196 | if ((NCR5380_read(reg2) & bit2) == val2) | |
197 | return 0; | |
198 | cpu_relax(); | |
199 | } while (n--); | |
200 | ||
201 | if (irqs_disabled() || in_interrupt()) | |
202 | return -ETIMEDOUT; | |
203 | ||
204 | /* Repeatedly sleep for 1 ms until deadline */ | |
205 | while (time_is_after_jiffies(deadline)) { | |
206 | schedule_timeout_uninterruptible(1); | |
207 | if ((NCR5380_read(reg1) & bit1) == val1) | |
208 | return 0; | |
209 | if ((NCR5380_read(reg2) & bit2) == val2) | |
210 | return 0; | |
211 | } | |
212 | ||
213 | return -ETIMEDOUT; | |
214 | } | |
215 | ||
216 | #if NDEBUG | |
217 | static struct { | |
218 | unsigned char mask; | |
219 | const char *name; | |
220 | } signals[] = { | |
221 | {SR_DBP, "PARITY"}, | |
222 | {SR_RST, "RST"}, | |
223 | {SR_BSY, "BSY"}, | |
224 | {SR_REQ, "REQ"}, | |
225 | {SR_MSG, "MSG"}, | |
226 | {SR_CD, "CD"}, | |
227 | {SR_IO, "IO"}, | |
228 | {SR_SEL, "SEL"}, | |
229 | {0, NULL} | |
230 | }, | |
231 | basrs[] = { | |
232 | {BASR_END_DMA_TRANSFER, "END OF DMA"}, | |
233 | {BASR_DRQ, "DRQ"}, | |
234 | {BASR_PARITY_ERROR, "PARITY ERROR"}, | |
235 | {BASR_IRQ, "IRQ"}, | |
236 | {BASR_PHASE_MATCH, "PHASE MATCH"}, | |
237 | {BASR_BUSY_ERROR, "BUSY ERROR"}, | |
238 | {BASR_ATN, "ATN"}, | |
239 | {BASR_ACK, "ACK"}, | |
240 | {0, NULL} | |
241 | }, | |
242 | icrs[] = { | |
243 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
244 | {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, | |
245 | {ICR_ARBITRATION_LOST, "LOST ARB."}, | |
246 | {ICR_ASSERT_ACK, "ASSERT ACK"}, | |
247 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
248 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
249 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
250 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
251 | {0, NULL} | |
252 | }, | |
253 | mrs[] = { | |
254 | {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, | |
255 | {MR_TARGET, "TARGET"}, | |
256 | {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, | |
257 | {MR_ENABLE_PAR_INTR, "PARITY INTR"}, | |
258 | {MR_ENABLE_EOP_INTR, "EOP INTR"}, | |
259 | {MR_MONITOR_BSY, "MONITOR BSY"}, | |
260 | {MR_DMA_MODE, "DMA MODE"}, | |
261 | {MR_ARBITRATE, "ARBITRATE"}, | |
262 | {0, NULL} | |
263 | }; | |
264 | ||
265 | /** | |
266 | * NCR5380_print - print scsi bus signals | |
267 | * @instance: adapter state to dump | |
268 | * | |
269 | * Print the SCSI bus signals for debugging purposes | |
270 | */ | |
271 | ||
272 | static void NCR5380_print(struct Scsi_Host *instance) | |
273 | { | |
274 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
275 | unsigned char status, data, basr, mr, icr, i; | |
276 | ||
277 | data = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
278 | status = NCR5380_read(STATUS_REG); | |
279 | mr = NCR5380_read(MODE_REG); | |
280 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
281 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
282 | ||
283 | printk(KERN_DEBUG "SR = 0x%02x : ", status); | |
284 | for (i = 0; signals[i].mask; ++i) | |
285 | if (status & signals[i].mask) | |
286 | printk(KERN_CONT "%s, ", signals[i].name); | |
287 | printk(KERN_CONT "\nBASR = 0x%02x : ", basr); | |
288 | for (i = 0; basrs[i].mask; ++i) | |
289 | if (basr & basrs[i].mask) | |
290 | printk(KERN_CONT "%s, ", basrs[i].name); | |
291 | printk(KERN_CONT "\nICR = 0x%02x : ", icr); | |
292 | for (i = 0; icrs[i].mask; ++i) | |
293 | if (icr & icrs[i].mask) | |
294 | printk(KERN_CONT "%s, ", icrs[i].name); | |
295 | printk(KERN_CONT "\nMR = 0x%02x : ", mr); | |
296 | for (i = 0; mrs[i].mask; ++i) | |
297 | if (mr & mrs[i].mask) | |
298 | printk(KERN_CONT "%s, ", mrs[i].name); | |
299 | printk(KERN_CONT "\n"); | |
300 | } | |
301 | ||
302 | static struct { | |
303 | unsigned char value; | |
304 | const char *name; | |
305 | } phases[] = { | |
306 | {PHASE_DATAOUT, "DATAOUT"}, | |
307 | {PHASE_DATAIN, "DATAIN"}, | |
308 | {PHASE_CMDOUT, "CMDOUT"}, | |
309 | {PHASE_STATIN, "STATIN"}, | |
310 | {PHASE_MSGOUT, "MSGOUT"}, | |
311 | {PHASE_MSGIN, "MSGIN"}, | |
312 | {PHASE_UNKNOWN, "UNKNOWN"} | |
313 | }; | |
314 | ||
315 | /** | |
316 | * NCR5380_print_phase - show SCSI phase | |
317 | * @instance: adapter to dump | |
318 | * | |
319 | * Print the current SCSI phase for debugging purposes | |
320 | */ | |
321 | ||
322 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
323 | { | |
324 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
325 | unsigned char status; | |
326 | int i; | |
327 | ||
328 | status = NCR5380_read(STATUS_REG); | |
329 | if (!(status & SR_REQ)) | |
330 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); | |
331 | else { | |
332 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && | |
333 | (phases[i].value != (status & PHASE_MASK)); ++i) | |
334 | ; | |
335 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); | |
336 | } | |
337 | } | |
338 | #endif | |
339 | ||
340 | /** | |
341 | * NCR5380_info - report driver and host information | |
342 | * @instance: relevant scsi host instance | |
343 | * | |
344 | * For use as the host template info() handler. | |
345 | */ | |
346 | ||
347 | static const char *NCR5380_info(struct Scsi_Host *instance) | |
348 | { | |
349 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
350 | ||
351 | return hostdata->info; | |
352 | } | |
353 | ||
354 | /** | |
355 | * NCR5380_init - initialise an NCR5380 | |
356 | * @instance: adapter to configure | |
357 | * @flags: control flags | |
358 | * | |
359 | * Initializes *instance and corresponding 5380 chip, | |
360 | * with flags OR'd into the initial flags value. | |
361 | * | |
362 | * Notes : I assume that the host, hostno, and id bits have been | |
363 | * set correctly. I don't care about the irq and other fields. | |
364 | * | |
365 | * Returns 0 for success | |
366 | */ | |
367 | ||
368 | static int NCR5380_init(struct Scsi_Host *instance, int flags) | |
369 | { | |
370 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
371 | int i; | |
372 | unsigned long deadline; | |
373 | unsigned long accesses_per_ms; | |
374 | ||
375 | instance->max_lun = 7; | |
376 | ||
377 | hostdata->host = instance; | |
378 | hostdata->id_mask = 1 << instance->this_id; | |
379 | hostdata->id_higher_mask = 0; | |
380 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) | |
381 | if (i > hostdata->id_mask) | |
382 | hostdata->id_higher_mask |= i; | |
383 | for (i = 0; i < 8; ++i) | |
384 | hostdata->busy[i] = 0; | |
385 | hostdata->dma_len = 0; | |
386 | ||
387 | spin_lock_init(&hostdata->lock); | |
388 | hostdata->connected = NULL; | |
389 | hostdata->sensing = NULL; | |
390 | INIT_LIST_HEAD(&hostdata->autosense); | |
391 | INIT_LIST_HEAD(&hostdata->unissued); | |
392 | INIT_LIST_HEAD(&hostdata->disconnected); | |
393 | ||
394 | hostdata->flags = flags; | |
395 | ||
396 | INIT_WORK(&hostdata->main_task, NCR5380_main); | |
397 | hostdata->work_q = alloc_workqueue("ncr5380_%d", | |
398 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
399 | 1, instance->host_no); | |
400 | if (!hostdata->work_q) | |
401 | return -ENOMEM; | |
402 | ||
403 | snprintf(hostdata->info, sizeof(hostdata->info), | |
404 | "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}", | |
405 | instance->hostt->name, instance->irq, hostdata->io_port, | |
406 | hostdata->base, instance->can_queue, instance->cmd_per_lun, | |
407 | instance->sg_tablesize, instance->this_id, | |
408 | hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", | |
409 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", | |
410 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : ""); | |
411 | ||
412 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
413 | NCR5380_write(MODE_REG, MR_BASE); | |
414 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
415 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
416 | ||
417 | /* Calibrate register polling loop */ | |
418 | i = 0; | |
419 | deadline = jiffies + 1; | |
420 | do { | |
421 | cpu_relax(); | |
422 | } while (time_is_after_jiffies(deadline)); | |
423 | deadline += msecs_to_jiffies(256); | |
424 | do { | |
425 | NCR5380_read(STATUS_REG); | |
426 | ++i; | |
427 | cpu_relax(); | |
428 | } while (time_is_after_jiffies(deadline)); | |
429 | accesses_per_ms = i / 256; | |
430 | hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | /** | |
436 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
437 | * @instance: adapter to check | |
438 | * | |
439 | * If the system crashed, it may have crashed with a connected target and | |
440 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
441 | * currently established nexus, which we know nothing about. Failing that | |
442 | * do a bus reset. | |
443 | * | |
444 | * Note that a bus reset will cause the chip to assert IRQ. | |
445 | * | |
446 | * Returns 0 if successful, otherwise -ENXIO. | |
447 | */ | |
448 | ||
449 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
450 | { | |
451 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
452 | int pass; | |
453 | ||
454 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
455 | switch (pass) { | |
456 | case 1: | |
457 | case 3: | |
458 | case 5: | |
459 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); | |
460 | NCR5380_poll_politely(hostdata, | |
461 | STATUS_REG, SR_BSY, 0, 5 * HZ); | |
462 | break; | |
463 | case 2: | |
464 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); | |
465 | do_abort(instance); | |
466 | break; | |
467 | case 4: | |
468 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); | |
469 | do_reset(instance); | |
470 | /* Wait after a reset; the SCSI standard calls for | |
471 | * 250ms, we wait 500ms to be on the safe side. | |
472 | * But some Toshiba CD-ROMs need ten times that. | |
473 | */ | |
474 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
475 | msleep(2500); | |
476 | else | |
477 | msleep(500); | |
478 | break; | |
479 | case 6: | |
480 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); | |
481 | return -ENXIO; | |
482 | } | |
483 | } | |
484 | return 0; | |
485 | } | |
486 | ||
487 | /** | |
488 | * NCR5380_exit - remove an NCR5380 | |
489 | * @instance: adapter to remove | |
490 | * | |
491 | * Assumes that no more work can be queued (e.g. by NCR5380_intr). | |
492 | */ | |
493 | ||
494 | static void NCR5380_exit(struct Scsi_Host *instance) | |
495 | { | |
496 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
497 | ||
498 | cancel_work_sync(&hostdata->main_task); | |
499 | destroy_workqueue(hostdata->work_q); | |
500 | } | |
501 | ||
502 | /** | |
503 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
504 | * @instance: the host instance | |
505 | * @cmd: command to complete | |
506 | */ | |
507 | ||
508 | static void complete_cmd(struct Scsi_Host *instance, | |
509 | struct scsi_cmnd *cmd) | |
510 | { | |
511 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
512 | ||
513 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
514 | ||
515 | if (hostdata->sensing == cmd) { | |
516 | /* Autosense processing ends here */ | |
517 | if (status_byte(cmd->result) != GOOD) { | |
518 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
519 | } else { | |
520 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
521 | set_driver_byte(cmd, DRIVER_SENSE); | |
522 | } | |
523 | hostdata->sensing = NULL; | |
524 | } | |
525 | ||
526 | cmd->scsi_done(cmd); | |
527 | } | |
528 | ||
529 | /** | |
530 | * NCR5380_queue_command - queue a command | |
531 | * @instance: the relevant SCSI adapter | |
532 | * @cmd: SCSI command | |
533 | * | |
534 | * cmd is added to the per-instance issue queue, with minor | |
535 | * twiddling done to the host specific fields of cmd. If the | |
536 | * main coroutine is not running, it is restarted. | |
537 | */ | |
538 | ||
539 | static int NCR5380_queue_command(struct Scsi_Host *instance, | |
540 | struct scsi_cmnd *cmd) | |
541 | { | |
542 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
543 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
544 | unsigned long flags; | |
545 | ||
546 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
547 | switch (cmd->cmnd[0]) { | |
548 | case WRITE_6: | |
549 | case WRITE_10: | |
550 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); | |
551 | cmd->result = (DID_ERROR << 16); | |
552 | cmd->scsi_done(cmd); | |
553 | return 0; | |
554 | } | |
555 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ | |
556 | ||
557 | cmd->result = 0; | |
558 | ||
559 | if (!NCR5380_acquire_dma_irq(instance)) | |
560 | return SCSI_MLQUEUE_HOST_BUSY; | |
561 | ||
562 | spin_lock_irqsave(&hostdata->lock, flags); | |
563 | ||
564 | /* | |
565 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
566 | * commands are added to the head of the queue since any command will | |
567 | * clear the contingent allegiance condition that exists and the | |
568 | * sense data is only guaranteed to be valid while the condition exists. | |
569 | */ | |
570 | ||
571 | if (cmd->cmnd[0] == REQUEST_SENSE) | |
572 | list_add(&ncmd->list, &hostdata->unissued); | |
573 | else | |
574 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
575 | ||
576 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
577 | ||
578 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", | |
579 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
580 | ||
581 | /* Kick off command processing */ | |
582 | queue_work(hostdata->work_q, &hostdata->main_task); | |
583 | return 0; | |
584 | } | |
585 | ||
586 | static inline void maybe_release_dma_irq(struct Scsi_Host *instance) | |
587 | { | |
588 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
589 | ||
590 | /* Caller does the locking needed to set & test these data atomically */ | |
591 | if (list_empty(&hostdata->disconnected) && | |
592 | list_empty(&hostdata->unissued) && | |
593 | list_empty(&hostdata->autosense) && | |
594 | !hostdata->connected && | |
595 | !hostdata->selecting) { | |
596 | NCR5380_release_dma_irq(instance); | |
597 | } | |
598 | } | |
599 | ||
600 | /** | |
601 | * dequeue_next_cmd - dequeue a command for processing | |
602 | * @instance: the scsi host instance | |
603 | * | |
604 | * Priority is given to commands on the autosense queue. These commands | |
605 | * need autosense because of a CHECK CONDITION result. | |
606 | * | |
607 | * Returns a command pointer if a command is found for a target that is | |
608 | * not already busy. Otherwise returns NULL. | |
609 | */ | |
610 | ||
611 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
612 | { | |
613 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
614 | struct NCR5380_cmd *ncmd; | |
615 | struct scsi_cmnd *cmd; | |
616 | ||
617 | if (hostdata->sensing || list_empty(&hostdata->autosense)) { | |
618 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
619 | cmd = NCR5380_to_scmd(ncmd); | |
620 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
621 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
622 | ||
623 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
624 | list_del(&ncmd->list); | |
625 | dsprintk(NDEBUG_QUEUES, instance, | |
626 | "dequeue: removed %p from issue queue\n", cmd); | |
627 | return cmd; | |
628 | } | |
629 | } | |
630 | } else { | |
631 | /* Autosense processing begins here */ | |
632 | ncmd = list_first_entry(&hostdata->autosense, | |
633 | struct NCR5380_cmd, list); | |
634 | list_del(&ncmd->list); | |
635 | cmd = NCR5380_to_scmd(ncmd); | |
636 | dsprintk(NDEBUG_QUEUES, instance, | |
637 | "dequeue: removed %p from autosense queue\n", cmd); | |
638 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
639 | hostdata->sensing = cmd; | |
640 | return cmd; | |
641 | } | |
642 | return NULL; | |
643 | } | |
644 | ||
645 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
646 | { | |
647 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
648 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
649 | ||
650 | if (hostdata->sensing == cmd) { | |
651 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
652 | list_add(&ncmd->list, &hostdata->autosense); | |
653 | hostdata->sensing = NULL; | |
654 | } else | |
655 | list_add(&ncmd->list, &hostdata->unissued); | |
656 | } | |
657 | ||
658 | /** | |
659 | * NCR5380_main - NCR state machines | |
660 | * | |
661 | * NCR5380_main is a coroutine that runs as long as more work can | |
662 | * be done on the NCR5380 host adapters in a system. Both | |
663 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
664 | * in case it is not running. | |
665 | */ | |
666 | ||
667 | static void NCR5380_main(struct work_struct *work) | |
668 | { | |
669 | struct NCR5380_hostdata *hostdata = | |
670 | container_of(work, struct NCR5380_hostdata, main_task); | |
671 | struct Scsi_Host *instance = hostdata->host; | |
672 | int done; | |
673 | ||
674 | do { | |
675 | done = 1; | |
676 | ||
677 | spin_lock_irq(&hostdata->lock); | |
678 | while (!hostdata->connected && !hostdata->selecting) { | |
679 | struct scsi_cmnd *cmd = dequeue_next_cmd(instance); | |
680 | ||
681 | if (!cmd) | |
682 | break; | |
683 | ||
684 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); | |
685 | ||
686 | /* | |
687 | * Attempt to establish an I_T_L nexus here. | |
688 | * On success, instance->hostdata->connected is set. | |
689 | * On failure, we must add the command back to the | |
690 | * issue queue so we can keep trying. | |
691 | */ | |
692 | /* | |
693 | * REQUEST SENSE commands are issued without tagged | |
694 | * queueing, even on SCSI-II devices because the | |
695 | * contingent allegiance condition exists for the | |
696 | * entire unit. | |
697 | */ | |
698 | ||
699 | if (!NCR5380_select(instance, cmd)) { | |
700 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); | |
701 | maybe_release_dma_irq(instance); | |
702 | } else { | |
703 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
704 | "main: select failed, returning %p to queue\n", cmd); | |
705 | requeue_cmd(instance, cmd); | |
706 | } | |
707 | } | |
708 | if (hostdata->connected && !hostdata->dma_len) { | |
709 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); | |
710 | NCR5380_information_transfer(instance); | |
711 | done = 0; | |
712 | } | |
713 | spin_unlock_irq(&hostdata->lock); | |
714 | if (!done) | |
715 | cond_resched(); | |
716 | } while (!done); | |
717 | } | |
718 | ||
719 | /* | |
720 | * NCR5380_dma_complete - finish DMA transfer | |
721 | * @instance: the scsi host instance | |
722 | * | |
723 | * Called by the interrupt handler when DMA finishes or a phase | |
724 | * mismatch occurs (which would end the DMA transfer). | |
725 | */ | |
726 | ||
727 | static void NCR5380_dma_complete(struct Scsi_Host *instance) | |
728 | { | |
729 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
730 | int transferred; | |
731 | unsigned char **data; | |
732 | int *count; | |
733 | int saved_data = 0, overrun = 0; | |
734 | unsigned char p; | |
735 | ||
736 | if (hostdata->read_overruns) { | |
737 | p = hostdata->connected->SCp.phase; | |
738 | if (p & SR_IO) { | |
739 | udelay(10); | |
740 | if ((NCR5380_read(BUS_AND_STATUS_REG) & | |
741 | (BASR_PHASE_MATCH | BASR_ACK)) == | |
742 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
743 | saved_data = NCR5380_read(INPUT_DATA_REG); | |
744 | overrun = 1; | |
745 | dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); | |
746 | } | |
747 | } | |
748 | } | |
749 | ||
750 | #ifdef CONFIG_SUN3 | |
751 | if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { | |
752 | pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", | |
753 | instance->host_no); | |
754 | BUG(); | |
755 | } | |
756 | ||
757 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
758 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
759 | pr_err("scsi%d: BASR %02x\n", instance->host_no, | |
760 | NCR5380_read(BUS_AND_STATUS_REG)); | |
761 | pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", | |
762 | instance->host_no); | |
763 | BUG(); | |
764 | } | |
765 | #endif | |
766 | ||
767 | NCR5380_write(MODE_REG, MR_BASE); | |
768 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
769 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
770 | ||
771 | transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); | |
772 | hostdata->dma_len = 0; | |
773 | ||
774 | data = (unsigned char **)&hostdata->connected->SCp.ptr; | |
775 | count = &hostdata->connected->SCp.this_residual; | |
776 | *data += transferred; | |
777 | *count -= transferred; | |
778 | ||
779 | if (hostdata->read_overruns) { | |
780 | int cnt, toPIO; | |
781 | ||
782 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { | |
783 | cnt = toPIO = hostdata->read_overruns; | |
784 | if (overrun) { | |
785 | dsprintk(NDEBUG_DMA, instance, | |
786 | "Got an input overrun, using saved byte\n"); | |
787 | *(*data)++ = saved_data; | |
788 | (*count)--; | |
789 | cnt--; | |
790 | toPIO--; | |
791 | } | |
792 | if (toPIO > 0) { | |
793 | dsprintk(NDEBUG_DMA, instance, | |
794 | "Doing %d byte PIO to 0x%p\n", cnt, *data); | |
795 | NCR5380_transfer_pio(instance, &p, &cnt, data); | |
796 | *count -= toPIO - cnt; | |
797 | } | |
798 | } | |
799 | } | |
800 | } | |
801 | ||
802 | /** | |
803 | * NCR5380_intr - generic NCR5380 irq handler | |
804 | * @irq: interrupt number | |
805 | * @dev_id: device info | |
806 | * | |
807 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
808 | * from the disconnected queue, and restarting NCR5380_main() | |
809 | * as required. | |
810 | * | |
811 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
812 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
813 | * Three of these six conditions are latched in the Bus and Status Register: | |
814 | * - End of DMA (cleared by ending DMA Mode) | |
815 | * - Parity error (cleared by reading RPIR) | |
816 | * - Loss of BSY (cleared by reading RPIR) | |
817 | * Two conditions have flag bits that are not latched: | |
818 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
819 | * - Bus reset (non-maskable) | |
820 | * The remaining condition has no flag bit at all: | |
821 | * - Selection/reselection | |
822 | * | |
823 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
824 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
825 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
826 | * interrupts will not be lost (they can be on the DP5380)." | |
827 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
828 | * | |
829 | * Checking for bus reset by reading RST is futile because of interrupt | |
830 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
831 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
832 | * condition will clear DMA Mode. We can tell when this occurs because the | |
833 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
834 | */ | |
835 | ||
836 | static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) | |
837 | { | |
838 | struct Scsi_Host *instance = dev_id; | |
839 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
840 | int handled = 0; | |
841 | unsigned char basr; | |
842 | unsigned long flags; | |
843 | ||
844 | spin_lock_irqsave(&hostdata->lock, flags); | |
845 | ||
846 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
847 | if (basr & BASR_IRQ) { | |
848 | unsigned char mr = NCR5380_read(MODE_REG); | |
849 | unsigned char sr = NCR5380_read(STATUS_REG); | |
850 | ||
851 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", | |
852 | irq, basr, sr, mr); | |
853 | ||
854 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { | |
855 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
856 | * We ack IRQ after clearing Mode Register. Workarounds | |
857 | * for End of DMA errata need to happen in DMA Mode. | |
858 | */ | |
859 | ||
860 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); | |
861 | ||
862 | if (hostdata->connected) { | |
863 | NCR5380_dma_complete(instance); | |
864 | queue_work(hostdata->work_q, &hostdata->main_task); | |
865 | } else { | |
866 | NCR5380_write(MODE_REG, MR_BASE); | |
867 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
868 | } | |
869 | } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
870 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { | |
871 | /* Probably reselected */ | |
872 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
873 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
874 | ||
875 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); | |
876 | ||
877 | if (!hostdata->connected) { | |
878 | NCR5380_reselect(instance); | |
879 | queue_work(hostdata->work_q, &hostdata->main_task); | |
880 | } | |
881 | if (!hostdata->connected) | |
882 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
883 | } else { | |
884 | /* Probably Bus Reset */ | |
885 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
886 | ||
887 | if (sr & SR_RST) { | |
888 | /* Certainly Bus Reset */ | |
889 | shost_printk(KERN_WARNING, instance, | |
890 | "bus reset interrupt\n"); | |
891 | bus_reset_cleanup(instance); | |
892 | } else { | |
893 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); | |
894 | } | |
895 | #ifdef SUN3_SCSI_VME | |
896 | dregs->csr |= CSR_DMA_ENABLE; | |
897 | #endif | |
898 | } | |
899 | handled = 1; | |
900 | } else { | |
901 | dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); | |
902 | #ifdef SUN3_SCSI_VME | |
903 | dregs->csr |= CSR_DMA_ENABLE; | |
904 | #endif | |
905 | } | |
906 | ||
907 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
908 | ||
909 | return IRQ_RETVAL(handled); | |
910 | } | |
911 | ||
912 | /** | |
913 | * NCR5380_select - attempt arbitration and selection for a given command | |
914 | * @instance: the Scsi_Host instance | |
915 | * @cmd: the scsi_cmnd to execute | |
916 | * | |
917 | * This routine establishes an I_T_L nexus for a SCSI command. This involves | |
918 | * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message. | |
919 | * | |
920 | * Returns true if the operation should be retried. | |
921 | * Returns false if it should not be retried. | |
922 | * | |
923 | * Side effects : | |
924 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit | |
925 | * with registers as they should have been on entry - ie | |
926 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
927 | * will cease to drive any SCSI bus signals. | |
928 | * | |
929 | * If successful : the I_T_L nexus will be established, and | |
930 | * hostdata->connected will be set to cmd. | |
931 | * SELECT interrupt will be disabled. | |
932 | * | |
933 | * If failed (no target) : cmd->scsi_done() will be called, and the | |
934 | * cmd->result host byte set to DID_BAD_TARGET. | |
935 | */ | |
936 | ||
937 | static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
938 | __releases(&hostdata->lock) __acquires(&hostdata->lock) | |
939 | { | |
940 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
941 | unsigned char tmp[3], phase; | |
942 | unsigned char *data; | |
943 | int len; | |
944 | int err; | |
945 | bool ret = true; | |
946 | bool can_disconnect = instance->irq != NO_IRQ && | |
947 | cmd->cmnd[0] != REQUEST_SENSE; | |
948 | ||
949 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); | |
950 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", | |
951 | instance->this_id); | |
952 | ||
953 | /* | |
954 | * Arbitration and selection phases are slow and involve dropping the | |
955 | * lock, so we have to watch out for EH. An exception handler may | |
956 | * change 'selecting' to NULL. This function will then return false | |
957 | * so that the caller will forget about 'cmd'. (During information | |
958 | * transfer phases, EH may change 'connected' to NULL.) | |
959 | */ | |
960 | hostdata->selecting = cmd; | |
961 | ||
962 | /* | |
963 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
964 | * data bus during SELECTION. | |
965 | */ | |
966 | ||
967 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
968 | ||
969 | /* | |
970 | * Start arbitration. | |
971 | */ | |
972 | ||
973 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
974 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
975 | ||
976 | /* The chip now waits for BUS FREE phase. Then after the 800 ns | |
977 | * Bus Free Delay, arbitration will begin. | |
978 | */ | |
979 | ||
980 | spin_unlock_irq(&hostdata->lock); | |
981 | err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, | |
982 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, | |
983 | ICR_ARBITRATION_PROGRESS, HZ); | |
984 | spin_lock_irq(&hostdata->lock); | |
985 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { | |
986 | /* Reselection interrupt */ | |
987 | goto out; | |
988 | } | |
989 | if (!hostdata->selecting) { | |
990 | /* Command was aborted */ | |
991 | NCR5380_write(MODE_REG, MR_BASE); | |
992 | return false; | |
993 | } | |
994 | if (err < 0) { | |
995 | NCR5380_write(MODE_REG, MR_BASE); | |
996 | shost_printk(KERN_ERR, instance, | |
997 | "select: arbitration timeout\n"); | |
998 | goto out; | |
999 | } | |
1000 | spin_unlock_irq(&hostdata->lock); | |
1001 | ||
1002 | /* The SCSI-2 arbitration delay is 2.4 us */ | |
1003 | udelay(3); | |
1004 | ||
1005 | /* Check for lost arbitration */ | |
1006 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || | |
1007 | (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || | |
1008 | (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1009 | NCR5380_write(MODE_REG, MR_BASE); | |
1010 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); | |
1011 | spin_lock_irq(&hostdata->lock); | |
1012 | goto out; | |
1013 | } | |
1014 | ||
1015 | /* After/during arbitration, BSY should be asserted. | |
1016 | * IBM DPES-31080 Version S31Q works now | |
1017 | * Tnx to [email protected] for finding this! (Roman) | |
1018 | */ | |
1019 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1020 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1021 | ||
1022 | /* | |
1023 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1024 | * a minimum so we'll udelay ceil(1.2) | |
1025 | */ | |
1026 | ||
1027 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
1028 | udelay(15); | |
1029 | else | |
1030 | udelay(2); | |
1031 | ||
1032 | spin_lock_irq(&hostdata->lock); | |
1033 | ||
1034 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ | |
1035 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
1036 | goto out; | |
1037 | ||
1038 | if (!hostdata->selecting) { | |
1039 | NCR5380_write(MODE_REG, MR_BASE); | |
1040 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1041 | return false; | |
1042 | } | |
1043 | ||
1044 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); | |
1045 | ||
1046 | /* | |
1047 | * Now that we have won arbitration, start Selection process, asserting | |
1048 | * the host and target ID's on the SCSI bus. | |
1049 | */ | |
1050 | ||
1051 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); | |
1052 | ||
1053 | /* | |
1054 | * Raise ATN while SEL is true before BSY goes false from arbitration, | |
1055 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1056 | * phase immediately after selection. | |
1057 | */ | |
1058 | ||
1059 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | | |
1060 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1061 | NCR5380_write(MODE_REG, MR_BASE); | |
1062 | ||
1063 | /* | |
1064 | * Reselect interrupts must be turned off prior to the dropping of BSY, | |
1065 | * otherwise we will trigger an interrupt. | |
1066 | */ | |
1067 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1068 | ||
1069 | spin_unlock_irq(&hostdata->lock); | |
1070 | ||
1071 | /* | |
1072 | * The initiator shall then wait at least two deskew delays and release | |
1073 | * the BSY signal. | |
1074 | */ | |
1075 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ | |
1076 | ||
1077 | /* Reset BSY */ | |
1078 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | | |
1079 | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1080 | ||
1081 | /* | |
1082 | * Something weird happens when we cease to drive BSY - looks | |
1083 | * like the board/chip is letting us do another read before the | |
1084 | * appropriate propagation delay has expired, and we're confusing | |
1085 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1086 | * | |
1087 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1088 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
1089 | * tighter 'C' code breaks and requires this) solves the problem - | |
1090 | * the 1 us delay is arbitrary, and only used because this delay will | |
1091 | * be the same on other platforms and since it works here, it should | |
1092 | * work there. | |
1093 | * | |
1094 | * wingel suggests that this could be due to failing to wait | |
1095 | * one deskew delay. | |
1096 | */ | |
1097 | ||
1098 | udelay(1); | |
1099 | ||
1100 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); | |
1101 | ||
1102 | /* | |
1103 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1104 | * selection. | |
1105 | */ | |
1106 | ||
1107 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, | |
1108 | msecs_to_jiffies(250)); | |
1109 | ||
1110 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { | |
1111 | spin_lock_irq(&hostdata->lock); | |
1112 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1113 | NCR5380_reselect(instance); | |
1114 | if (!hostdata->connected) | |
1115 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1116 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); | |
1117 | goto out; | |
1118 | } | |
1119 | ||
1120 | if (err < 0) { | |
1121 | spin_lock_irq(&hostdata->lock); | |
1122 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1123 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1124 | ||
1125 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ | |
1126 | if (!hostdata->selecting) | |
1127 | return false; | |
1128 | ||
1129 | cmd->result = DID_BAD_TARGET << 16; | |
1130 | complete_cmd(instance, cmd); | |
1131 | dsprintk(NDEBUG_SELECTION, instance, | |
1132 | "target did not respond within 250ms\n"); | |
1133 | ret = false; | |
1134 | goto out; | |
1135 | } | |
1136 | ||
1137 | /* | |
1138 | * No less than two deskew delays after the initiator detects the | |
1139 | * BSY signal is true, it shall release the SEL signal and may | |
1140 | * change the DATA BUS. -wingel | |
1141 | */ | |
1142 | ||
1143 | udelay(1); | |
1144 | ||
1145 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1146 | ||
1147 | /* | |
1148 | * Since we followed the SCSI spec, and raised ATN while SEL | |
1149 | * was true but before BSY was false during selection, the information | |
1150 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1151 | * IDENTIFY message. | |
1152 | */ | |
1153 | ||
1154 | /* Wait for start of REQ/ACK handshake */ | |
1155 | ||
1156 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); | |
1157 | spin_lock_irq(&hostdata->lock); | |
1158 | if (err < 0) { | |
1159 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); | |
1160 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1161 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1162 | goto out; | |
1163 | } | |
1164 | if (!hostdata->selecting) { | |
1165 | do_abort(instance); | |
1166 | return false; | |
1167 | } | |
1168 | ||
1169 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", | |
1170 | scmd_id(cmd)); | |
1171 | tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun); | |
1172 | ||
1173 | len = 1; | |
1174 | data = tmp; | |
1175 | phase = PHASE_MSGOUT; | |
1176 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1177 | if (len) { | |
1178 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1179 | cmd->result = DID_ERROR << 16; | |
1180 | complete_cmd(instance, cmd); | |
1181 | dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n"); | |
1182 | ret = false; | |
1183 | goto out; | |
1184 | } | |
1185 | ||
1186 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); | |
1187 | ||
1188 | hostdata->connected = cmd; | |
1189 | hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; | |
1190 | ||
1191 | #ifdef SUN3_SCSI_VME | |
1192 | dregs->csr |= CSR_INTR; | |
1193 | #endif | |
1194 | ||
1195 | initialize_SCp(cmd); | |
1196 | ||
1197 | ret = false; | |
1198 | ||
1199 | out: | |
1200 | if (!hostdata->selecting) | |
1201 | return NULL; | |
1202 | hostdata->selecting = NULL; | |
1203 | return ret; | |
1204 | } | |
1205 | ||
1206 | /* | |
1207 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
1208 | * unsigned char *phase, int *count, unsigned char **data) | |
1209 | * | |
1210 | * Purpose : transfers data in given phase using polled I/O | |
1211 | * | |
1212 | * Inputs : instance - instance of driver, *phase - pointer to | |
1213 | * what phase is expected, *count - pointer to number of | |
1214 | * bytes to transfer, **data - pointer to data pointer. | |
1215 | * | |
1216 | * Returns : -1 when different phase is entered without transferring | |
1217 | * maximum number of bytes, 0 if all bytes are transferred or exit | |
1218 | * is in same phase. | |
1219 | * | |
1220 | * Also, *phase, *count, *data are modified in place. | |
1221 | * | |
1222 | * XXX Note : handling for bus free may be useful. | |
1223 | */ | |
1224 | ||
1225 | /* | |
1226 | * Note : this code is not as quick as it could be, however it | |
1227 | * IS 100% reliable, and for the actual data transfer where speed | |
1228 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1229 | */ | |
1230 | ||
1231 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, | |
1232 | unsigned char *phase, int *count, | |
1233 | unsigned char **data) | |
1234 | { | |
1235 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
1236 | unsigned char p = *phase, tmp; | |
1237 | int c = *count; | |
1238 | unsigned char *d = *data; | |
1239 | ||
1240 | /* | |
1241 | * The NCR5380 chip will only drive the SCSI bus when the | |
1242 | * phase specified in the appropriate bits of the TARGET COMMAND | |
1243 | * REGISTER match the STATUS REGISTER | |
1244 | */ | |
1245 | ||
1246 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1247 | ||
1248 | do { | |
1249 | /* | |
1250 | * Wait for assertion of REQ, after which the phase bits will be | |
1251 | * valid | |
1252 | */ | |
1253 | ||
1254 | if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) | |
1255 | break; | |
1256 | ||
1257 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); | |
1258 | ||
1259 | /* Check for phase mismatch */ | |
1260 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { | |
1261 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); | |
1262 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1263 | break; | |
1264 | } | |
1265 | ||
1266 | /* Do actual transfer from SCSI bus to / from memory */ | |
1267 | if (!(p & SR_IO)) | |
1268 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1269 | else | |
1270 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1271 | ||
1272 | ++d; | |
1273 | ||
1274 | /* | |
1275 | * The SCSI standard suggests that in MSGOUT phase, the initiator | |
1276 | * should drop ATN on the last byte of the message phase | |
1277 | * after REQ has been asserted for the handshake but before | |
1278 | * the initiator raises ACK. | |
1279 | */ | |
1280 | ||
1281 | if (!(p & SR_IO)) { | |
1282 | if (!((p & SR_MSG) && c > 1)) { | |
1283 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1284 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1285 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | | |
1286 | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1287 | } else { | |
1288 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | | |
1289 | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1290 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1291 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | | |
1292 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1293 | } | |
1294 | } else { | |
1295 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1296 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1297 | } | |
1298 | ||
1299 | if (NCR5380_poll_politely(hostdata, | |
1300 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) | |
1301 | break; | |
1302 | ||
1303 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); | |
1304 | ||
1305 | /* | |
1306 | * We have several special cases to consider during REQ/ACK handshaking : | |
1307 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
1308 | * message. ATN must be dropped as ACK is dropped. | |
1309 | * | |
1310 | * 2. We are in a MSGIN phase, and we are on the last byte of the | |
1311 | * message. We must exit with ACK asserted, so that the calling | |
1312 | * code may raise ATN before dropping ACK to reject the message. | |
1313 | * | |
1314 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1315 | */ | |
1316 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1317 | if (p == PHASE_MSGOUT && c > 1) | |
1318 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1319 | else | |
1320 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1321 | } | |
1322 | } while (--c); | |
1323 | ||
1324 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); | |
1325 | ||
1326 | *count = c; | |
1327 | *data = d; | |
1328 | tmp = NCR5380_read(STATUS_REG); | |
1329 | /* The phase read from the bus is valid if either REQ is (already) | |
1330 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1331 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1332 | */ | |
1333 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1334 | *phase = tmp & PHASE_MASK; | |
1335 | else | |
1336 | *phase = PHASE_UNKNOWN; | |
1337 | ||
1338 | if (!c || (*phase == p)) | |
1339 | return 0; | |
1340 | else | |
1341 | return -1; | |
1342 | } | |
1343 | ||
1344 | /** | |
1345 | * do_reset - issue a reset command | |
1346 | * @instance: adapter to reset | |
1347 | * | |
1348 | * Issue a reset sequence to the NCR5380 and try and get the bus | |
1349 | * back into sane shape. | |
1350 | * | |
1351 | * This clears the reset interrupt flag because there may be no handler for | |
1352 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1353 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1354 | */ | |
1355 | ||
1356 | static void do_reset(struct Scsi_Host *instance) | |
1357 | { | |
1358 | struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); | |
1359 | unsigned long flags; | |
1360 | ||
1361 | local_irq_save(flags); | |
1362 | NCR5380_write(TARGET_COMMAND_REG, | |
1363 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1364 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); | |
1365 | udelay(50); | |
1366 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1367 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
1368 | local_irq_restore(flags); | |
1369 | } | |
1370 | ||
1371 | /** | |
1372 | * do_abort - abort the currently established nexus by going to | |
1373 | * MESSAGE OUT phase and sending an ABORT message. | |
1374 | * @instance: relevant scsi host instance | |
1375 | * | |
1376 | * Returns 0 on success, -1 on failure. | |
1377 | */ | |
1378 | ||
1379 | static int do_abort(struct Scsi_Host *instance) | |
1380 | { | |
1381 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
1382 | unsigned char *msgptr, phase, tmp; | |
1383 | int len; | |
1384 | int rc; | |
1385 | ||
1386 | /* Request message out phase */ | |
1387 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1388 | ||
1389 | /* | |
1390 | * Wait for the target to indicate a valid phase by asserting | |
1391 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1392 | * and can immediately send the ABORT message, or we'll have some | |
1393 | * other phase and will have to source/sink data. | |
1394 | * | |
1395 | * We really don't care what value was on the bus or what value | |
1396 | * the target sees, so we just handshake. | |
1397 | */ | |
1398 | ||
1399 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); | |
1400 | if (rc < 0) | |
1401 | goto timeout; | |
1402 | ||
1403 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; | |
1404 | ||
1405 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1406 | ||
1407 | if (tmp != PHASE_MSGOUT) { | |
1408 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1409 | ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1410 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); | |
1411 | if (rc < 0) | |
1412 | goto timeout; | |
1413 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1414 | } | |
1415 | ||
1416 | tmp = ABORT; | |
1417 | msgptr = &tmp; | |
1418 | len = 1; | |
1419 | phase = PHASE_MSGOUT; | |
1420 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); | |
1421 | ||
1422 | /* | |
1423 | * If we got here, and the command completed successfully, | |
1424 | * we're about to go into bus free state. | |
1425 | */ | |
1426 | ||
1427 | return len ? -1 : 0; | |
1428 | ||
1429 | timeout: | |
1430 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1431 | return -1; | |
1432 | } | |
1433 | ||
1434 | /* | |
1435 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
1436 | * unsigned char *phase, int *count, unsigned char **data) | |
1437 | * | |
1438 | * Purpose : transfers data in given phase using either real | |
1439 | * or pseudo DMA. | |
1440 | * | |
1441 | * Inputs : instance - instance of driver, *phase - pointer to | |
1442 | * what phase is expected, *count - pointer to number of | |
1443 | * bytes to transfer, **data - pointer to data pointer. | |
1444 | * | |
1445 | * Returns : -1 when different phase is entered without transferring | |
1446 | * maximum number of bytes, 0 if all bytes or transferred or exit | |
1447 | * is in same phase. | |
1448 | * | |
1449 | * Also, *phase, *count, *data are modified in place. | |
1450 | */ | |
1451 | ||
1452 | ||
1453 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, | |
1454 | unsigned char *phase, int *count, | |
1455 | unsigned char **data) | |
1456 | { | |
1457 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
1458 | int c = *count; | |
1459 | unsigned char p = *phase; | |
1460 | unsigned char *d = *data; | |
1461 | unsigned char tmp; | |
1462 | int result = 0; | |
1463 | ||
1464 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { | |
1465 | *phase = tmp; | |
1466 | return -1; | |
1467 | } | |
1468 | ||
1469 | hostdata->connected->SCp.phase = p; | |
1470 | ||
1471 | if (p & SR_IO) { | |
1472 | if (hostdata->read_overruns) | |
1473 | c -= hostdata->read_overruns; | |
1474 | else if (hostdata->flags & FLAG_DMA_FIXUP) | |
1475 | --c; | |
1476 | } | |
1477 | ||
1478 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", | |
1479 | (p & SR_IO) ? "receive" : "send", c, d); | |
1480 | ||
1481 | #ifdef CONFIG_SUN3 | |
1482 | /* send start chain */ | |
1483 | sun3scsi_dma_start(c, *data); | |
1484 | #endif | |
1485 | ||
1486 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1487 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | | |
1488 | MR_ENABLE_EOP_INTR); | |
1489 | ||
1490 | if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { | |
1491 | /* On the Medusa, it is a must to initialize the DMA before | |
1492 | * starting the NCR. This is also the cleaner way for the TT. | |
1493 | */ | |
1494 | if (p & SR_IO) | |
1495 | result = NCR5380_dma_recv_setup(hostdata, d, c); | |
1496 | else | |
1497 | result = NCR5380_dma_send_setup(hostdata, d, c); | |
1498 | } | |
1499 | ||
1500 | /* | |
1501 | * On the PAS16 at least I/O recovery delays are not needed here. | |
1502 | * Everyone else seems to want them. | |
1503 | */ | |
1504 | ||
1505 | if (p & SR_IO) { | |
1506 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1507 | NCR5380_io_delay(1); | |
1508 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); | |
1509 | } else { | |
1510 | NCR5380_io_delay(1); | |
1511 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1512 | NCR5380_io_delay(1); | |
1513 | NCR5380_write(START_DMA_SEND_REG, 0); | |
1514 | NCR5380_io_delay(1); | |
1515 | } | |
1516 | ||
1517 | #ifdef CONFIG_SUN3 | |
1518 | #ifdef SUN3_SCSI_VME | |
1519 | dregs->csr |= CSR_DMA_ENABLE; | |
1520 | #endif | |
1521 | sun3_dma_active = 1; | |
1522 | #endif | |
1523 | ||
1524 | if (hostdata->flags & FLAG_LATE_DMA_SETUP) { | |
1525 | /* On the Falcon, the DMA setup must be done after the last | |
1526 | * NCR access, else the DMA setup gets trashed! | |
1527 | */ | |
1528 | if (p & SR_IO) | |
1529 | result = NCR5380_dma_recv_setup(hostdata, d, c); | |
1530 | else | |
1531 | result = NCR5380_dma_send_setup(hostdata, d, c); | |
1532 | } | |
1533 | ||
1534 | /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ | |
1535 | if (result < 0) | |
1536 | return result; | |
1537 | ||
1538 | /* For real DMA, result is the byte count. DMA interrupt is expected. */ | |
1539 | if (result > 0) { | |
1540 | hostdata->dma_len = result; | |
1541 | return 0; | |
1542 | } | |
1543 | ||
1544 | /* The result is zero iff pseudo DMA send/receive was completed. */ | |
1545 | hostdata->dma_len = c; | |
1546 | ||
1547 | /* | |
1548 | * A note regarding the DMA errata workarounds for early NMOS silicon. | |
1549 | * | |
1550 | * For DMA sends, we want to wait until the last byte has been | |
1551 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1552 | * seems to be no terribly good way of doing this on a 5380 under all | |
1553 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1554 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1555 | * are nastier, since the device will be expecting more data than we | |
1556 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1557 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1558 | * why this signal was added to the newer chips) but on the older 538[01] | |
1559 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1560 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1561 | * the usual exit conditions are not met. Not a terribly clean or | |
1562 | * correct solution :-% | |
1563 | * | |
1564 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1565 | * If the chip is in DMA receive mode, it will respond to a target's | |
1566 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1567 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1568 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1569 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1570 | * not a problem for "one DMA transfer per READ command", because | |
1571 | * the situation will never arise... either all of the data is DMA'ed | |
1572 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1573 | * disconnection (either operation bringing the DMA to a clean halt). | |
1574 | * However, in order to handle scatter-receive, we must work around the | |
1575 | * problem. The chosen fix is to DMA fewer bytes, then check for the | |
1576 | * condition before taking the NCR5380 out of DMA mode. One or two extra | |
1577 | * bytes are transferred via PIO as necessary to fill out the original | |
1578 | * request. | |
1579 | */ | |
1580 | ||
1581 | if (hostdata->flags & FLAG_DMA_FIXUP) { | |
1582 | if (p & SR_IO) { | |
1583 | /* | |
1584 | * The workaround was to transfer fewer bytes than we | |
1585 | * intended to with the pseudo-DMA read function, wait for | |
1586 | * the chip to latch the last byte, read it, and then disable | |
1587 | * pseudo-DMA mode. | |
1588 | * | |
1589 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. | |
1590 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1591 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1592 | * until DACK is asserted, which won't happen unless we twiddle | |
1593 | * the DMA port or we take the NCR5380 out of DMA mode, we | |
1594 | * can guarantee that we won't handshake another extra | |
1595 | * byte. | |
1596 | */ | |
1597 | ||
1598 | if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, | |
1599 | BASR_DRQ, BASR_DRQ, HZ) < 0) { | |
1600 | result = -1; | |
1601 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); | |
1602 | } | |
1603 | if (NCR5380_poll_politely(hostdata, STATUS_REG, | |
1604 | SR_REQ, 0, HZ) < 0) { | |
1605 | result = -1; | |
1606 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); | |
1607 | } | |
1608 | d[*count - 1] = NCR5380_read(INPUT_DATA_REG); | |
1609 | } else { | |
1610 | /* | |
1611 | * Wait for the last byte to be sent. If REQ is being asserted for | |
1612 | * the byte we're interested, we'll ACK it and it will go false. | |
1613 | */ | |
1614 | if (NCR5380_poll_politely2(hostdata, | |
1615 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, | |
1616 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
1617 | result = -1; | |
1618 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); | |
1619 | } | |
1620 | } | |
1621 | } | |
1622 | ||
1623 | NCR5380_dma_complete(instance); | |
1624 | return result; | |
1625 | } | |
1626 | ||
1627 | /* | |
1628 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1629 | * | |
1630 | * Purpose : run through the various SCSI phases and do as the target | |
1631 | * directs us to. Operates on the currently connected command, | |
1632 | * instance->connected. | |
1633 | * | |
1634 | * Inputs : instance, instance for which we are doing commands | |
1635 | * | |
1636 | * Side effects : SCSI things happen, the disconnected queue will be | |
1637 | * modified if a command disconnects, *instance->connected will | |
1638 | * change. | |
1639 | * | |
1640 | * XXX Note : we need to watch for bus free or a reset condition here | |
1641 | * to recover from an unexpected bus free condition. | |
1642 | */ | |
1643 | ||
1644 | static void NCR5380_information_transfer(struct Scsi_Host *instance) | |
1645 | __releases(&hostdata->lock) __acquires(&hostdata->lock) | |
1646 | { | |
1647 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
1648 | unsigned char msgout = NOP; | |
1649 | int sink = 0; | |
1650 | int len; | |
1651 | int transfersize; | |
1652 | unsigned char *data; | |
1653 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
1654 | struct scsi_cmnd *cmd; | |
1655 | ||
1656 | #ifdef SUN3_SCSI_VME | |
1657 | dregs->csr |= CSR_INTR; | |
1658 | #endif | |
1659 | ||
1660 | while ((cmd = hostdata->connected)) { | |
1661 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
1662 | ||
1663 | tmp = NCR5380_read(STATUS_REG); | |
1664 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1665 | if (tmp & SR_REQ) { | |
1666 | phase = (tmp & PHASE_MASK); | |
1667 | if (phase != old_phase) { | |
1668 | old_phase = phase; | |
1669 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1670 | } | |
1671 | #ifdef CONFIG_SUN3 | |
1672 | if (phase == PHASE_CMDOUT && | |
1673 | sun3_dma_setup_done != cmd) { | |
1674 | int count; | |
1675 | ||
1676 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1677 | ++cmd->SCp.buffer; | |
1678 | --cmd->SCp.buffers_residual; | |
1679 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
1680 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); | |
1681 | } | |
1682 | ||
1683 | count = sun3scsi_dma_xfer_len(hostdata, cmd); | |
1684 | ||
1685 | if (count > 0) { | |
1686 | if (rq_data_dir(cmd->request)) | |
1687 | sun3scsi_dma_send_setup(hostdata, | |
1688 | cmd->SCp.ptr, count); | |
1689 | else | |
1690 | sun3scsi_dma_recv_setup(hostdata, | |
1691 | cmd->SCp.ptr, count); | |
1692 | sun3_dma_setup_done = cmd; | |
1693 | } | |
1694 | #ifdef SUN3_SCSI_VME | |
1695 | dregs->csr |= CSR_INTR; | |
1696 | #endif | |
1697 | } | |
1698 | #endif /* CONFIG_SUN3 */ | |
1699 | ||
1700 | if (sink && (phase != PHASE_MSGOUT)) { | |
1701 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1702 | ||
1703 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | | |
1704 | ICR_ASSERT_ACK); | |
1705 | while (NCR5380_read(STATUS_REG) & SR_REQ) | |
1706 | ; | |
1707 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | | |
1708 | ICR_ASSERT_ATN); | |
1709 | sink = 0; | |
1710 | continue; | |
1711 | } | |
1712 | ||
1713 | switch (phase) { | |
1714 | case PHASE_DATAOUT: | |
1715 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
1716 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); | |
1717 | sink = 1; | |
1718 | do_abort(instance); | |
1719 | cmd->result = DID_ERROR << 16; | |
1720 | complete_cmd(instance, cmd); | |
1721 | hostdata->connected = NULL; | |
1722 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
1723 | return; | |
1724 | #endif | |
1725 | case PHASE_DATAIN: | |
1726 | /* | |
1727 | * If there is no room left in the current buffer in the | |
1728 | * scatter-gather list, move onto the next one. | |
1729 | */ | |
1730 | ||
1731 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1732 | ++cmd->SCp.buffer; | |
1733 | --cmd->SCp.buffers_residual; | |
1734 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
1735 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); | |
1736 | dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", | |
1737 | cmd->SCp.this_residual, | |
1738 | cmd->SCp.buffers_residual); | |
1739 | } | |
1740 | ||
1741 | /* | |
1742 | * The preferred transfer method is going to be | |
1743 | * PSEUDO-DMA for systems that are strictly PIO, | |
1744 | * since we can let the hardware do the handshaking. | |
1745 | * | |
1746 | * For this to work, we need to know the transfersize | |
1747 | * ahead of time, since the pseudo-DMA code will sit | |
1748 | * in an unconditional loop. | |
1749 | */ | |
1750 | ||
1751 | transfersize = 0; | |
1752 | if (!cmd->device->borken) | |
1753 | transfersize = NCR5380_dma_xfer_len(hostdata, cmd); | |
1754 | ||
1755 | if (transfersize > 0) { | |
1756 | len = transfersize; | |
1757 | if (NCR5380_transfer_dma(instance, &phase, | |
1758 | &len, (unsigned char **)&cmd->SCp.ptr)) { | |
1759 | /* | |
1760 | * If the watchdog timer fires, all future | |
1761 | * accesses to this device will use the | |
1762 | * polled-IO. | |
1763 | */ | |
1764 | scmd_printk(KERN_INFO, cmd, | |
1765 | "switching to slow handshake\n"); | |
1766 | cmd->device->borken = 1; | |
1767 | sink = 1; | |
1768 | do_abort(instance); | |
1769 | cmd->result = DID_ERROR << 16; | |
1770 | /* XXX - need to source or sink data here, as appropriate */ | |
1771 | } | |
1772 | } else { | |
1773 | /* Transfer a small chunk so that the | |
1774 | * irq mode lock is not held too long. | |
1775 | */ | |
1776 | transfersize = min(cmd->SCp.this_residual, | |
1777 | NCR5380_PIO_CHUNK_SIZE); | |
1778 | len = transfersize; | |
1779 | NCR5380_transfer_pio(instance, &phase, &len, | |
1780 | (unsigned char **)&cmd->SCp.ptr); | |
1781 | cmd->SCp.this_residual -= transfersize - len; | |
1782 | } | |
1783 | #ifdef CONFIG_SUN3 | |
1784 | if (sun3_dma_setup_done == cmd) | |
1785 | sun3_dma_setup_done = NULL; | |
1786 | #endif | |
1787 | return; | |
1788 | case PHASE_MSGIN: | |
1789 | len = 1; | |
1790 | data = &tmp; | |
1791 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1792 | cmd->SCp.Message = tmp; | |
1793 | ||
1794 | switch (tmp) { | |
1795 | case ABORT: | |
1796 | case COMMAND_COMPLETE: | |
1797 | /* Accept message by clearing ACK */ | |
1798 | sink = 1; | |
1799 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1800 | dsprintk(NDEBUG_QUEUES, instance, | |
1801 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1802 | cmd, scmd_id(cmd), cmd->device->lun); | |
1803 | ||
1804 | hostdata->connected = NULL; | |
1805 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
1806 | ||
1807 | cmd->result &= ~0xffff; | |
1808 | cmd->result |= cmd->SCp.Status; | |
1809 | cmd->result |= cmd->SCp.Message << 8; | |
1810 | ||
1811 | if (cmd->cmnd[0] == REQUEST_SENSE) | |
1812 | complete_cmd(instance, cmd); | |
1813 | else { | |
1814 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1815 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1816 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1817 | cmd); | |
1818 | list_add_tail(&ncmd->list, | |
1819 | &hostdata->autosense); | |
1820 | } else | |
1821 | complete_cmd(instance, cmd); | |
1822 | } | |
1823 | ||
1824 | /* | |
1825 | * Restore phase bits to 0 so an interrupted selection, | |
1826 | * arbitration can resume. | |
1827 | */ | |
1828 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1829 | ||
1830 | /* Enable reselect interrupts */ | |
1831 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1832 | ||
1833 | maybe_release_dma_irq(instance); | |
1834 | return; | |
1835 | case MESSAGE_REJECT: | |
1836 | /* Accept message by clearing ACK */ | |
1837 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1838 | switch (hostdata->last_message) { | |
1839 | case HEAD_OF_QUEUE_TAG: | |
1840 | case ORDERED_QUEUE_TAG: | |
1841 | case SIMPLE_QUEUE_TAG: | |
1842 | cmd->device->simple_tags = 0; | |
1843 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); | |
1844 | break; | |
1845 | default: | |
1846 | break; | |
1847 | } | |
1848 | break; | |
1849 | case DISCONNECT: | |
1850 | /* Accept message by clearing ACK */ | |
1851 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1852 | hostdata->connected = NULL; | |
1853 | list_add(&ncmd->list, &hostdata->disconnected); | |
1854 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, | |
1855 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1856 | cmd, scmd_id(cmd), cmd->device->lun); | |
1857 | ||
1858 | /* | |
1859 | * Restore phase bits to 0 so an interrupted selection, | |
1860 | * arbitration can resume. | |
1861 | */ | |
1862 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1863 | ||
1864 | /* Enable reselect interrupts */ | |
1865 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1866 | #ifdef SUN3_SCSI_VME | |
1867 | dregs->csr |= CSR_DMA_ENABLE; | |
1868 | #endif | |
1869 | return; | |
1870 | /* | |
1871 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect | |
1872 | * operation, in violation of the SCSI spec so we can safely | |
1873 | * ignore SAVE/RESTORE pointers calls. | |
1874 | * | |
1875 | * Unfortunately, some disks violate the SCSI spec and | |
1876 | * don't issue the required SAVE_POINTERS message before | |
1877 | * disconnecting, and we have to break spec to remain | |
1878 | * compatible. | |
1879 | */ | |
1880 | case SAVE_POINTERS: | |
1881 | case RESTORE_POINTERS: | |
1882 | /* Accept message by clearing ACK */ | |
1883 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1884 | break; | |
1885 | case EXTENDED_MESSAGE: | |
1886 | /* | |
1887 | * Start the message buffer with the EXTENDED_MESSAGE | |
1888 | * byte, since spi_print_msg() wants the whole thing. | |
1889 | */ | |
1890 | extended_msg[0] = EXTENDED_MESSAGE; | |
1891 | /* Accept first byte by clearing ACK */ | |
1892 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1893 | ||
1894 | spin_unlock_irq(&hostdata->lock); | |
1895 | ||
1896 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); | |
1897 | ||
1898 | len = 2; | |
1899 | data = extended_msg + 1; | |
1900 | phase = PHASE_MSGIN; | |
1901 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1902 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", | |
1903 | (int)extended_msg[1], | |
1904 | (int)extended_msg[2]); | |
1905 | ||
1906 | if (!len && extended_msg[1] > 0 && | |
1907 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1908 | /* Accept third byte by clearing ACK */ | |
1909 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1910 | len = extended_msg[1] - 1; | |
1911 | data = extended_msg + 3; | |
1912 | phase = PHASE_MSGIN; | |
1913 | ||
1914 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1915 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", | |
1916 | len); | |
1917 | ||
1918 | switch (extended_msg[2]) { | |
1919 | case EXTENDED_SDTR: | |
1920 | case EXTENDED_WDTR: | |
1921 | tmp = 0; | |
1922 | } | |
1923 | } else if (len) { | |
1924 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); | |
1925 | tmp = 0; | |
1926 | } else { | |
1927 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", | |
1928 | extended_msg[2], extended_msg[1]); | |
1929 | tmp = 0; | |
1930 | } | |
1931 | ||
1932 | spin_lock_irq(&hostdata->lock); | |
1933 | if (!hostdata->connected) | |
1934 | return; | |
1935 | ||
1936 | /* Fall through to reject message */ | |
1937 | ||
1938 | /* | |
1939 | * If we get something weird that we aren't expecting, | |
1940 | * reject it. | |
1941 | */ | |
1942 | default: | |
1943 | if (tmp == EXTENDED_MESSAGE) | |
1944 | scmd_printk(KERN_INFO, cmd, | |
1945 | "rejecting unknown extended message code %02x, length %d\n", | |
1946 | extended_msg[2], extended_msg[1]); | |
1947 | else if (tmp) | |
1948 | scmd_printk(KERN_INFO, cmd, | |
1949 | "rejecting unknown message code %02x\n", | |
1950 | tmp); | |
1951 | ||
1952 | msgout = MESSAGE_REJECT; | |
1953 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1954 | break; | |
1955 | } /* switch (tmp) */ | |
1956 | break; | |
1957 | case PHASE_MSGOUT: | |
1958 | len = 1; | |
1959 | data = &msgout; | |
1960 | hostdata->last_message = msgout; | |
1961 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1962 | if (msgout == ABORT) { | |
1963 | hostdata->connected = NULL; | |
1964 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
1965 | cmd->result = DID_ERROR << 16; | |
1966 | complete_cmd(instance, cmd); | |
1967 | maybe_release_dma_irq(instance); | |
1968 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1969 | return; | |
1970 | } | |
1971 | msgout = NOP; | |
1972 | break; | |
1973 | case PHASE_CMDOUT: | |
1974 | len = cmd->cmd_len; | |
1975 | data = cmd->cmnd; | |
1976 | /* | |
1977 | * XXX for performance reasons, on machines with a | |
1978 | * PSEUDO-DMA architecture we should probably | |
1979 | * use the dma transfer function. | |
1980 | */ | |
1981 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1982 | break; | |
1983 | case PHASE_STATIN: | |
1984 | len = 1; | |
1985 | data = &tmp; | |
1986 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1987 | cmd->SCp.Status = tmp; | |
1988 | break; | |
1989 | default: | |
1990 | shost_printk(KERN_ERR, instance, "unknown phase\n"); | |
1991 | NCR5380_dprint(NDEBUG_ANY, instance); | |
1992 | } /* switch(phase) */ | |
1993 | } else { | |
1994 | spin_unlock_irq(&hostdata->lock); | |
1995 | NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); | |
1996 | spin_lock_irq(&hostdata->lock); | |
1997 | } | |
1998 | } | |
1999 | } | |
2000 | ||
2001 | /* | |
2002 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2003 | * | |
2004 | * Purpose : does reselection, initializing the instance->connected | |
2005 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q | |
2006 | * nexus has been reestablished, | |
2007 | * | |
2008 | * Inputs : instance - this instance of the NCR5380. | |
2009 | */ | |
2010 | ||
2011 | static void NCR5380_reselect(struct Scsi_Host *instance) | |
2012 | { | |
2013 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2014 | unsigned char target_mask; | |
2015 | unsigned char lun; | |
2016 | unsigned char msg[3]; | |
2017 | struct NCR5380_cmd *ncmd; | |
2018 | struct scsi_cmnd *tmp; | |
2019 | ||
2020 | /* | |
2021 | * Disable arbitration, etc. since the host adapter obviously | |
2022 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2023 | */ | |
2024 | ||
2025 | NCR5380_write(MODE_REG, MR_BASE); | |
2026 | ||
2027 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
2028 | if (!target_mask || target_mask & (target_mask - 1)) { | |
2029 | shost_printk(KERN_WARNING, instance, | |
2030 | "reselect: bad target_mask 0x%02x\n", target_mask); | |
2031 | return; | |
2032 | } | |
2033 | ||
2034 | /* | |
2035 | * At this point, we have detected that our SCSI ID is on the bus, | |
2036 | * SEL is true and BSY was false for at least one bus settle delay | |
2037 | * (400 ns). | |
2038 | * | |
2039 | * We must assert BSY ourselves, until the target drops the SEL | |
2040 | * signal. | |
2041 | */ | |
2042 | ||
2043 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
2044 | if (NCR5380_poll_politely(hostdata, | |
2045 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { | |
2046 | shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n"); | |
2047 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2048 | return; | |
2049 | } | |
2050 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2051 | ||
2052 | /* | |
2053 | * Wait for target to go into MSGIN. | |
2054 | */ | |
2055 | ||
2056 | if (NCR5380_poll_politely(hostdata, | |
2057 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { | |
2058 | if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0) | |
2059 | /* BUS FREE phase */ | |
2060 | return; | |
2061 | shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n"); | |
2062 | do_abort(instance); | |
2063 | return; | |
2064 | } | |
2065 | ||
2066 | #ifdef CONFIG_SUN3 | |
2067 | /* acknowledge toggle to MSGIN */ | |
2068 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); | |
2069 | ||
2070 | /* peek at the byte without really hitting the bus */ | |
2071 | msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
2072 | #else | |
2073 | { | |
2074 | int len = 1; | |
2075 | unsigned char *data = msg; | |
2076 | unsigned char phase = PHASE_MSGIN; | |
2077 | ||
2078 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2079 | ||
2080 | if (len) { | |
2081 | do_abort(instance); | |
2082 | return; | |
2083 | } | |
2084 | } | |
2085 | #endif /* CONFIG_SUN3 */ | |
2086 | ||
2087 | if (!(msg[0] & 0x80)) { | |
2088 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); | |
2089 | spi_print_msg(msg); | |
2090 | printk("\n"); | |
2091 | do_abort(instance); | |
2092 | return; | |
2093 | } | |
2094 | lun = msg[0] & 0x07; | |
2095 | ||
2096 | /* | |
2097 | * We need to add code for SCSI-II to track which devices have | |
2098 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2099 | * nexuses so we can chose to do additional data transfer. | |
2100 | */ | |
2101 | ||
2102 | /* | |
2103 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2104 | * just reestablished, and remove it from the disconnected queue. | |
2105 | */ | |
2106 | ||
2107 | tmp = NULL; | |
2108 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2109 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2110 | ||
2111 | if (target_mask == (1 << scmd_id(cmd)) && | |
2112 | lun == (u8)cmd->device->lun) { | |
2113 | list_del(&ncmd->list); | |
2114 | tmp = cmd; | |
2115 | break; | |
2116 | } | |
2117 | } | |
2118 | ||
2119 | if (tmp) { | |
2120 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2121 | "reselect: removed %p from disconnected queue\n", tmp); | |
2122 | } else { | |
2123 | int target = ffs(target_mask) - 1; | |
2124 | ||
2125 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", | |
2126 | target_mask, lun); | |
2127 | /* | |
2128 | * Since we have an established nexus that we can't do anything | |
2129 | * with, we must abort it. | |
2130 | */ | |
2131 | if (do_abort(instance) == 0) | |
2132 | hostdata->busy[target] &= ~(1 << lun); | |
2133 | return; | |
2134 | } | |
2135 | ||
2136 | #ifdef CONFIG_SUN3 | |
2137 | if (sun3_dma_setup_done != tmp) { | |
2138 | int count; | |
2139 | ||
2140 | if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { | |
2141 | ++tmp->SCp.buffer; | |
2142 | --tmp->SCp.buffers_residual; | |
2143 | tmp->SCp.this_residual = tmp->SCp.buffer->length; | |
2144 | tmp->SCp.ptr = sg_virt(tmp->SCp.buffer); | |
2145 | } | |
2146 | ||
2147 | count = sun3scsi_dma_xfer_len(hostdata, tmp); | |
2148 | ||
2149 | if (count > 0) { | |
2150 | if (rq_data_dir(tmp->request)) | |
2151 | sun3scsi_dma_send_setup(hostdata, | |
2152 | tmp->SCp.ptr, count); | |
2153 | else | |
2154 | sun3scsi_dma_recv_setup(hostdata, | |
2155 | tmp->SCp.ptr, count); | |
2156 | sun3_dma_setup_done = tmp; | |
2157 | } | |
2158 | } | |
2159 | ||
2160 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
2161 | #endif /* CONFIG_SUN3 */ | |
2162 | ||
2163 | /* Accept message by clearing ACK */ | |
2164 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2165 | ||
2166 | hostdata->connected = tmp; | |
2167 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", | |
2168 | scmd_id(tmp), tmp->device->lun); | |
2169 | } | |
2170 | ||
2171 | /** | |
2172 | * list_find_cmd - test for presence of a command in a linked list | |
2173 | * @haystack: list of commands | |
2174 | * @needle: command to search for | |
2175 | */ | |
2176 | ||
2177 | static bool list_find_cmd(struct list_head *haystack, | |
2178 | struct scsi_cmnd *needle) | |
2179 | { | |
2180 | struct NCR5380_cmd *ncmd; | |
2181 | ||
2182 | list_for_each_entry(ncmd, haystack, list) | |
2183 | if (NCR5380_to_scmd(ncmd) == needle) | |
2184 | return true; | |
2185 | return false; | |
2186 | } | |
2187 | ||
2188 | /** | |
2189 | * list_remove_cmd - remove a command from linked list | |
2190 | * @haystack: list of commands | |
2191 | * @needle: command to remove | |
2192 | */ | |
2193 | ||
2194 | static bool list_del_cmd(struct list_head *haystack, | |
2195 | struct scsi_cmnd *needle) | |
2196 | { | |
2197 | if (list_find_cmd(haystack, needle)) { | |
2198 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2199 | ||
2200 | list_del(&ncmd->list); | |
2201 | return true; | |
2202 | } | |
2203 | return false; | |
2204 | } | |
2205 | ||
2206 | /** | |
2207 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2208 | * @cmd: the command to be aborted | |
2209 | * | |
2210 | * Try to abort a given command by removing it from queues and/or sending | |
2211 | * the target an abort message. This may not succeed in causing a target | |
2212 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2213 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2214 | * | |
2215 | * The normal path taken by a command is as follows. For EH we trace this | |
2216 | * same path to locate and abort the command. | |
2217 | * | |
2218 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2219 | * [disconnected -> connected ->]... | |
2220 | * [autosense -> connected ->] done | |
2221 | * | |
2222 | * If cmd was not found at all then presumably it has already been completed, | |
2223 | * in which case return SUCCESS to try to avoid further EH measures. | |
2224 | * | |
2225 | * If the command has not completed yet, we must not fail to find it. | |
2226 | * We have no option but to forget the aborted command (even if it still | |
2227 | * lacks sense data). The mid-layer may re-issue a command that is in error | |
2228 | * recovery (see scsi_send_eh_cmnd), but the logic and data structures in | |
2229 | * this driver are such that a command can appear on one queue only. | |
2230 | * | |
2231 | * The lock protects driver data structures, but EH handlers also use it | |
2232 | * to serialize their own execution and prevent their own re-entry. | |
2233 | */ | |
2234 | ||
2235 | static int NCR5380_abort(struct scsi_cmnd *cmd) | |
2236 | { | |
2237 | struct Scsi_Host *instance = cmd->device->host; | |
2238 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2239 | unsigned long flags; | |
2240 | int result = SUCCESS; | |
2241 | ||
2242 | spin_lock_irqsave(&hostdata->lock, flags); | |
2243 | ||
2244 | #if (NDEBUG & NDEBUG_ANY) | |
2245 | scmd_printk(KERN_INFO, cmd, __func__); | |
2246 | #endif | |
2247 | NCR5380_dprint(NDEBUG_ANY, instance); | |
2248 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
2249 | ||
2250 | if (list_del_cmd(&hostdata->unissued, cmd)) { | |
2251 | dsprintk(NDEBUG_ABORT, instance, | |
2252 | "abort: removed %p from issue queue\n", cmd); | |
2253 | cmd->result = DID_ABORT << 16; | |
2254 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
2255 | goto out; | |
2256 | } | |
2257 | ||
2258 | if (hostdata->selecting == cmd) { | |
2259 | dsprintk(NDEBUG_ABORT, instance, | |
2260 | "abort: cmd %p == selecting\n", cmd); | |
2261 | hostdata->selecting = NULL; | |
2262 | cmd->result = DID_ABORT << 16; | |
2263 | complete_cmd(instance, cmd); | |
2264 | goto out; | |
2265 | } | |
2266 | ||
2267 | if (list_del_cmd(&hostdata->disconnected, cmd)) { | |
2268 | dsprintk(NDEBUG_ABORT, instance, | |
2269 | "abort: removed %p from disconnected list\n", cmd); | |
2270 | /* Can't call NCR5380_select() and send ABORT because that | |
2271 | * means releasing the lock. Need a bus reset. | |
2272 | */ | |
2273 | set_host_byte(cmd, DID_ERROR); | |
2274 | complete_cmd(instance, cmd); | |
2275 | result = FAILED; | |
2276 | goto out; | |
2277 | } | |
2278 | ||
2279 | if (hostdata->connected == cmd) { | |
2280 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2281 | hostdata->connected = NULL; | |
2282 | hostdata->dma_len = 0; | |
2283 | if (do_abort(instance)) { | |
2284 | set_host_byte(cmd, DID_ERROR); | |
2285 | complete_cmd(instance, cmd); | |
2286 | result = FAILED; | |
2287 | goto out; | |
2288 | } | |
2289 | set_host_byte(cmd, DID_ABORT); | |
2290 | complete_cmd(instance, cmd); | |
2291 | goto out; | |
2292 | } | |
2293 | ||
2294 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2295 | dsprintk(NDEBUG_ABORT, instance, | |
2296 | "abort: removed %p from sense queue\n", cmd); | |
2297 | complete_cmd(instance, cmd); | |
2298 | } | |
2299 | ||
2300 | out: | |
2301 | if (result == FAILED) | |
2302 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
2303 | else { | |
2304 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
2305 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); | |
2306 | } | |
2307 | ||
2308 | queue_work(hostdata->work_q, &hostdata->main_task); | |
2309 | maybe_release_dma_irq(instance); | |
2310 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
2311 | ||
2312 | return result; | |
2313 | } | |
2314 | ||
2315 | ||
2316 | static void bus_reset_cleanup(struct Scsi_Host *instance) | |
2317 | { | |
2318 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2319 | int i; | |
2320 | struct NCR5380_cmd *ncmd; | |
2321 | ||
2322 | /* reset NCR registers */ | |
2323 | NCR5380_write(MODE_REG, MR_BASE); | |
2324 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2325 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2326 | ||
2327 | /* After the reset, there are no more connected or disconnected commands | |
2328 | * and no busy units; so clear the low-level status here to avoid | |
2329 | * conflicts when the mid-level code tries to wake up the affected | |
2330 | * commands! | |
2331 | */ | |
2332 | ||
2333 | if (hostdata->selecting) { | |
2334 | hostdata->selecting->result = DID_RESET << 16; | |
2335 | complete_cmd(instance, hostdata->selecting); | |
2336 | hostdata->selecting = NULL; | |
2337 | } | |
2338 | ||
2339 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2340 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2341 | ||
2342 | set_host_byte(cmd, DID_RESET); | |
2343 | complete_cmd(instance, cmd); | |
2344 | } | |
2345 | INIT_LIST_HEAD(&hostdata->disconnected); | |
2346 | ||
2347 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2348 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2349 | ||
2350 | cmd->scsi_done(cmd); | |
2351 | } | |
2352 | INIT_LIST_HEAD(&hostdata->autosense); | |
2353 | ||
2354 | if (hostdata->connected) { | |
2355 | set_host_byte(hostdata->connected, DID_RESET); | |
2356 | complete_cmd(instance, hostdata->connected); | |
2357 | hostdata->connected = NULL; | |
2358 | } | |
2359 | ||
2360 | for (i = 0; i < 8; ++i) | |
2361 | hostdata->busy[i] = 0; | |
2362 | hostdata->dma_len = 0; | |
2363 | ||
2364 | queue_work(hostdata->work_q, &hostdata->main_task); | |
2365 | maybe_release_dma_irq(instance); | |
2366 | } | |
2367 | ||
2368 | /** | |
2369 | * NCR5380_host_reset - reset the SCSI host | |
2370 | * @cmd: SCSI command undergoing EH | |
2371 | * | |
2372 | * Returns SUCCESS | |
2373 | */ | |
2374 | ||
2375 | static int NCR5380_host_reset(struct scsi_cmnd *cmd) | |
2376 | { | |
2377 | struct Scsi_Host *instance = cmd->device->host; | |
2378 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2379 | unsigned long flags; | |
2380 | struct NCR5380_cmd *ncmd; | |
2381 | ||
2382 | spin_lock_irqsave(&hostdata->lock, flags); | |
2383 | ||
2384 | #if (NDEBUG & NDEBUG_ANY) | |
2385 | shost_printk(KERN_INFO, instance, __func__); | |
2386 | #endif | |
2387 | NCR5380_dprint(NDEBUG_ANY, instance); | |
2388 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
2389 | ||
2390 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
2391 | struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd); | |
2392 | ||
2393 | scmd->result = DID_RESET << 16; | |
2394 | scmd->scsi_done(scmd); | |
2395 | } | |
2396 | INIT_LIST_HEAD(&hostdata->unissued); | |
2397 | ||
2398 | do_reset(instance); | |
2399 | bus_reset_cleanup(instance); | |
2400 | ||
2401 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
2402 | ||
2403 | return SUCCESS; | |
2404 | } |