Git Repo - linux.git/blame - drivers/rtc/rtc-rv3029c2.c

Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
52365230	2	/*
c2a1c145	3	* Micro Crystal RV-3029 / RV-3049 rtc class driver
52365230 HS	4	*
52365230 HS	5	* Author: Gregory Hermant <[email protected]>
2dca3d9e	6	* Michael Buesch <[email protected]>
52365230 HS	7	*
52365230 HS	8	* based on previously existing rtc class drivers
52365230 HS	9	*/
	10
	11	#include <linux/module.h>
	12	#include <linux/i2c.h>
c2a1c145	13	#include <linux/spi/spi.h>
52365230 HS	14	#include <linux/bcd.h>
52365230 HS	15	#include <linux/rtc.h>
a7f6e287 MB	16	#include <linux/delay.h>
a7f6e287 MB	17	#include <linux/of.h>
a696b31e MB	18	#include <linux/hwmon.h>
a696b31e MB	19	#include <linux/hwmon-sysfs.h>
e59b3c73	20	#include <linux/kstrtox.h>
e6e38082	21	#include <linux/regmap.h>
52365230 HS	22
	23	/* Register map */
	24	/* control section */
aba39d27	25	#define RV3029_ONOFF_CTRL 0x00
7697de35 MB	26	#define RV3029_ONOFF_CTRL_WE BIT(0)
	27	#define RV3029_ONOFF_CTRL_TE BIT(1)
	28	#define RV3029_ONOFF_CTRL_TAR BIT(2)
	29	#define RV3029_ONOFF_CTRL_EERE BIT(3)
	30	#define RV3029_ONOFF_CTRL_SRON BIT(4)
	31	#define RV3029_ONOFF_CTRL_TD0 BIT(5)
	32	#define RV3029_ONOFF_CTRL_TD1 BIT(6)
	33	#define RV3029_ONOFF_CTRL_CLKINT BIT(7)
aba39d27	34	#define RV3029_IRQ_CTRL 0x01
7697de35 MB	35	#define RV3029_IRQ_CTRL_AIE BIT(0)
	36	#define RV3029_IRQ_CTRL_TIE BIT(1)
	37	#define RV3029_IRQ_CTRL_V1IE BIT(2)
	38	#define RV3029_IRQ_CTRL_V2IE BIT(3)
	39	#define RV3029_IRQ_CTRL_SRIE BIT(4)
aba39d27	40	#define RV3029_IRQ_FLAGS 0x02
7697de35 MB	41	#define RV3029_IRQ_FLAGS_AF BIT(0)
	42	#define RV3029_IRQ_FLAGS_TF BIT(1)
	43	#define RV3029_IRQ_FLAGS_V1IF BIT(2)
	44	#define RV3029_IRQ_FLAGS_V2IF BIT(3)
	45	#define RV3029_IRQ_FLAGS_SRF BIT(4)
aba39d27	46	#define RV3029_STATUS 0x03
7697de35 MB	47	#define RV3029_STATUS_VLOW1 BIT(2)
	48	#define RV3029_STATUS_VLOW2 BIT(3)
	49	#define RV3029_STATUS_SR BIT(4)
	50	#define RV3029_STATUS_PON BIT(5)
	51	#define RV3029_STATUS_EEBUSY BIT(7)
aba39d27	52	#define RV3029_RST_CTRL 0x04
7697de35	53	#define RV3029_RST_CTRL_SYSR BIT(4)
aba39d27	54	#define RV3029_CONTROL_SECTION_LEN 0x05
52365230 HS	55
52365230 HS	56	/* watch section */
aba39d27 MB	57	#define RV3029_W_SEC 0x08
	58	#define RV3029_W_MINUTES 0x09
	59	#define RV3029_W_HOURS 0x0A
7697de35 MB	60	#define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
7697de35 MB	61	#define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
aba39d27 MB	62	#define RV3029_W_DATE 0x0B
	63	#define RV3029_W_DAYS 0x0C
	64	#define RV3029_W_MONTHS 0x0D
	65	#define RV3029_W_YEARS 0x0E
	66	#define RV3029_WATCH_SECTION_LEN 0x07
52365230 HS	67
52365230 HS	68	/* alarm section */
aba39d27 MB	69	#define RV3029_A_SC 0x10
	70	#define RV3029_A_MN 0x11
	71	#define RV3029_A_HR 0x12
	72	#define RV3029_A_DT 0x13
	73	#define RV3029_A_DW 0x14
	74	#define RV3029_A_MO 0x15
	75	#define RV3029_A_YR 0x16
dc492e86	76	#define RV3029_A_AE_X BIT(7)
aba39d27	77	#define RV3029_ALARM_SECTION_LEN 0x07
52365230 HS	78
52365230 HS	79	/* timer section */
aba39d27 MB	80	#define RV3029_TIMER_LOW 0x18
aba39d27 MB	81	#define RV3029_TIMER_HIGH 0x19
52365230 HS	82
52365230 HS	83	/* temperature section */
aba39d27	84	#define RV3029_TEMP_PAGE 0x20
52365230 HS	85
52365230 HS	86	/* eeprom data section */
aba39d27 MB	87	#define RV3029_E2P_EEDATA1 0x28
aba39d27 MB	88	#define RV3029_E2P_EEDATA2 0x29
7697de35	89	#define RV3029_E2PDATA_SECTION_LEN 0x02
52365230 HS	90
52365230 HS	91	/* eeprom control section */
aba39d27	92	#define RV3029_CONTROL_E2P_EECTRL 0x30
7697de35 MB	93	#define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
	94	#define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
	95	#define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
	96	#define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
	97	#define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
	98	#define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
	99	#define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
	100	#define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
	101	#define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K \|\
	102	RV3029_TRICKLE_5K \|\
	103	RV3029_TRICKLE_20K \|\
	104	RV3029_TRICKLE_80K)
	105	#define RV3029_TRICKLE_SHIFT 4
	106	#define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
	107	#define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
	108	#define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
	109	#define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in C) /
	110	#define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
52365230 HS	111
52365230 HS	112	/* user ram section */
ec923fcc AB	113	#define RV3029_RAM_PAGE 0x38
ec923fcc AB	114	#define RV3029_RAM_SECTION_LEN 8
52365230	115
e6e38082 MJ	116	struct rv3029_data {
	117	struct device *dev;
	118	struct rtc_device *rtc;
	119	struct regmap *regmap;
	120	int irq;
	121	};
	122
bb72dbba	123	static int rv3029_eeprom_busywait(struct rv3029_data *rv3029)
a7f6e287	124	{
bb72dbba	125	unsigned int sr;
a7f6e287	126	int i, ret;
a7f6e287 MB	127
a7f6e287 MB	128	for (i = 100; i > 0; i--) {
bb72dbba	129	ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr);
a7f6e287 MB	130	if (ret < 0)
	131	break;
	132	if (!(sr & RV3029_STATUS_EEBUSY))
	133	break;
	134	usleep_range(1000, 10000);
	135	}
	136	if (i <= 0) {
bb72dbba	137	dev_err(rv3029->dev, "EEPROM busy wait timeout.\n");
a7f6e287 MB	138	return -ETIMEDOUT;
	139	}
	140
	141	return ret;
	142	}
	143
7518dd9a	144	static int rv3029_eeprom_exit(struct rv3029_data *rv3029)
a7f6e287 MB	145	{
a7f6e287 MB	146	/* Re-enable eeprom refresh */
609e97fe	147	return regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL,
4e7f1a60 MJ	148	RV3029_ONOFF_CTRL_EERE,
4e7f1a60 MJ	149	RV3029_ONOFF_CTRL_EERE);
a7f6e287 MB	150	}
a7f6e287 MB	151
7518dd9a	152	static int rv3029_eeprom_enter(struct rv3029_data *rv3029)
a7f6e287	153	{
bb72dbba	154	unsigned int sr;
a7f6e287	155	int ret;
a7f6e287 MB	156
a7f6e287 MB	157	/* Check whether we are in the allowed voltage range. */
bb72dbba	158	ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr);
a7f6e287 MB	159	if (ret < 0)
a7f6e287 MB	160	return ret;
cff2e4d2 AB	161	if (sr & RV3029_STATUS_VLOW2)
	162	return -ENODEV;
	163	if (sr & RV3029_STATUS_VLOW1) {
a7f6e287 MB	164	/* We clear the bits and retry once just in case
	165	* we had a brown out in early startup.
	166	*/
54c5970d	167	ret = regmap_update_bits(rv3029->regmap, RV3029_STATUS,
cff2e4d2	168	RV3029_STATUS_VLOW1, 0);
a7f6e287 MB	169	if (ret < 0)
	170	return ret;
	171	usleep_range(1000, 10000);
bb72dbba	172	ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr);
a7f6e287 MB	173	if (ret < 0)
a7f6e287 MB	174	return ret;
cff2e4d2	175	if (sr & RV3029_STATUS_VLOW1) {
7518dd9a	176	dev_err(rv3029->dev,
a7f6e287 MB	177	"Supply voltage is too low to safely access the EEPROM.\n");
	178	return -ENODEV;
	179	}
	180	}
	181
	182	/* Disable eeprom refresh. */
609e97fe AB	183	ret = regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL,
609e97fe AB	184	RV3029_ONOFF_CTRL_EERE, 0);
a7f6e287 MB	185	if (ret < 0)
	186	return ret;
	187
	188	/* Wait for any previous eeprom accesses to finish. */
bb72dbba	189	ret = rv3029_eeprom_busywait(rv3029);
a7f6e287	190	if (ret < 0)
7518dd9a	191	rv3029_eeprom_exit(rv3029);
a7f6e287 MB	192
	193	return ret;
	194	}
	195
7518dd9a	196	static int rv3029_eeprom_read(struct rv3029_data *rv3029, u8 reg,
a7f6e287 MB	197	u8 buf[], size_t len)
	198	{
	199	int ret, err;
	200
7518dd9a	201	err = rv3029_eeprom_enter(rv3029);
a7f6e287 MB	202	if (err < 0)
	203	return err;
	204
7518dd9a	205	ret = regmap_bulk_read(rv3029->regmap, reg, buf, len);
a7f6e287	206
7518dd9a	207	err = rv3029_eeprom_exit(rv3029);
a7f6e287 MB	208	if (err < 0)
	209	return err;
	210
	211	return ret;
	212	}
	213
7518dd9a	214	static int rv3029_eeprom_write(struct rv3029_data *rv3029, u8 reg,
a7f6e287 MB	215	u8 const buf[], size_t len)
a7f6e287 MB	216	{
7518dd9a	217	unsigned int tmp;
a6f26606	218	int ret, err;
a7f6e287	219	size_t i;
a7f6e287	220
7518dd9a	221	err = rv3029_eeprom_enter(rv3029);
a6f26606 DC	222	if (err < 0)
a6f26606 DC	223	return err;
a7f6e287 MB	224
a7f6e287 MB	225	for (i = 0; i < len; i++, reg++) {
7518dd9a	226	ret = regmap_read(rv3029->regmap, reg, &tmp);
a7f6e287 MB	227	if (ret < 0)
	228	break;
	229	if (tmp != buf[i]) {
7518dd9a AB	230	tmp = buf[i];
7518dd9a AB	231	ret = regmap_write(rv3029->regmap, reg, tmp);
a7f6e287 MB	232	if (ret < 0)
	233	break;
	234	}
bb72dbba	235	ret = rv3029_eeprom_busywait(rv3029);
a7f6e287 MB	236	if (ret < 0)
	237	break;
	238	}
	239
7518dd9a	240	err = rv3029_eeprom_exit(rv3029);
a6f26606 DC	241	if (err < 0)
a6f26606 DC	242	return err;
a7f6e287	243
a6f26606	244	return ret;
a7f6e287 MB	245	}
a7f6e287 MB	246
7518dd9a	247	static int rv3029_eeprom_update_bits(struct rv3029_data *rv3029,
39387dc2 MB	248	u8 reg, u8 mask, u8 set)
	249	{
	250	u8 buf;
	251	int ret;
	252
7518dd9a	253	ret = rv3029_eeprom_read(rv3029, reg, &buf, 1);
39387dc2 MB	254	if (ret < 0)
	255	return ret;
	256	buf &= ~mask;
	257	buf \|= set & mask;
7518dd9a	258	ret = rv3029_eeprom_write(rv3029, reg, &buf, 1);
39387dc2 MB	259	if (ret < 0)
	260	return ret;
	261
	262	return 0;
	263	}
	264
0ddc5b89 MJ	265	static irqreturn_t rv3029_handle_irq(int irq, void *dev_id)
	266	{
	267	struct device *dev = dev_id;
	268	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
7518dd9a	269	unsigned int flags, controls;
0ddc5b89	270	unsigned long events = 0;
0ddc5b89 MJ	271	int ret;
0ddc5b89 MJ	272
2a5654fe	273	rtc_lock(rv3029->rtc);
0ddc5b89	274
7518dd9a	275	ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls);
0ddc5b89 MJ	276	if (ret) {
0ddc5b89 MJ	277	dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
2a5654fe	278	rtc_unlock(rv3029->rtc);
0ddc5b89 MJ	279	return IRQ_NONE;
	280	}
	281
7518dd9a	282	ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags);
0ddc5b89 MJ	283	if (ret) {
0ddc5b89 MJ	284	dev_warn(dev, "Read IRQ Flags Register error %d\n", ret);
2a5654fe	285	rtc_unlock(rv3029->rtc);
0ddc5b89 MJ	286	return IRQ_NONE;
	287	}
	288
	289	if (flags & RV3029_IRQ_FLAGS_AF) {
	290	flags &= ~RV3029_IRQ_FLAGS_AF;
	291	controls &= ~RV3029_IRQ_CTRL_AIE;
	292	events \|= RTC_AF;
	293	}
	294
	295	if (events) {
	296	rtc_update_irq(rv3029->rtc, 1, events);
7518dd9a AB	297	regmap_write(rv3029->regmap, RV3029_IRQ_FLAGS, flags);
7518dd9a AB	298	regmap_write(rv3029->regmap, RV3029_IRQ_CTRL, controls);
0ddc5b89	299	}
2a5654fe	300	rtc_unlock(rv3029->rtc);
0ddc5b89 MJ	301
	302	return IRQ_HANDLED;
	303	}
	304
e6e38082	305	static int rv3029_read_time(struct device dev, struct rtc_time tm)
52365230	306	{
7518dd9a	307	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
cff2e4d2	308	unsigned int sr;
52365230	309	int ret;
aba39d27	310	u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
52365230	311
cff2e4d2 AB	312	ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr);
	313	if (ret < 0)
	314	return ret;
	315
	316	if (sr & (RV3029_STATUS_VLOW2 \| RV3029_STATUS_PON))
	317	return -EINVAL;
	318
7518dd9a	319	ret = regmap_bulk_read(rv3029->regmap, RV3029_W_SEC, regs,
4e7f1a60	320	RV3029_WATCH_SECTION_LEN);
bd0d9379	321	if (ret < 0)
52365230	322	return ret;
52365230	323
abe2f551 MJ	324	tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]);
abe2f551 MJ	325	tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]);
52365230 HS	326
	327	/* HR field has a more complex interpretation */
	328	{
abe2f551	329	const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC];
aba39d27 MB	330
aba39d27 MB	331	if (_hr & RV3029_REG_HR_12_24) {
52365230 HS	332	/* 12h format */
52365230 HS	333	tm->tm_hour = bcd2bin(_hr & 0x1f);
aba39d27	334	if (_hr & RV3029_REG_HR_PM) /* PM flag set */
52365230 HS	335	tm->tm_hour += 12;
	336	} else /* 24h format */
	337	tm->tm_hour = bcd2bin(_hr & 0x3f);
	338	}
	339
abe2f551 MJ	340	tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]);
	341	tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1;
	342	tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100;
	343	tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1;
52365230 HS	344
	345	return 0;
	346	}
	347
e6e38082	348	static int rv3029_read_alarm(struct device dev, struct rtc_wkalrm alarm)
52365230	349	{
7518dd9a	350	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230	351	struct rtc_time *const tm = &alarm->time;
7518dd9a	352	unsigned int controls, flags;
52365230	353	int ret;
7518dd9a	354	u8 regs[8];
52365230	355
7518dd9a	356	ret = regmap_bulk_read(rv3029->regmap, RV3029_A_SC, regs,
4e7f1a60	357	RV3029_ALARM_SECTION_LEN);
bd0d9379	358	if (ret < 0)
52365230	359	return ret;
52365230	360
7518dd9a	361	ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls);
bd0d9379	362	if (ret)
0ddc5b89	363	return ret;
bd0d9379	364
7518dd9a	365	ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags);
bd0d9379	366	if (ret < 0)
0ddc5b89	367	return ret;
0ddc5b89	368
abe2f551 MJ	369	tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f);
	370	tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f);
	371	tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f);
	372	tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f);
	373	tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1;
	374	tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100;
	375	tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1;
52365230	376
0ddc5b89 MJ	377	alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE);
	378	alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled;
	379
52365230 HS	380	return 0;
	381	}
	382
0ddc5b89	383	static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable)
52365230	384	{
38ce8e30	385	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230	386
38ce8e30 AB	387	return regmap_update_bits(rv3029->regmap, RV3029_IRQ_CTRL,
	388	RV3029_IRQ_CTRL_AIE,
	389	enable ? RV3029_IRQ_CTRL_AIE : 0);
52365230 HS	390	}
52365230 HS	391
e6e38082	392	static int rv3029_set_alarm(struct device dev, struct rtc_wkalrm alarm)
52365230	393	{
7518dd9a	394	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230 HS	395	struct rtc_time *const tm = &alarm->time;
	396	int ret;
	397	u8 regs[8];
	398
dc492e86 MJ	399	/* Activate all the alarms with AE_x bit */
	400	regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) \| RV3029_A_AE_X;
	401	regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) \| RV3029_A_AE_X;
	402	regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f)
	403	\| RV3029_A_AE_X;
	404	regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f)
	405	\| RV3029_A_AE_X;
	406	regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f)
	407	\| RV3029_A_AE_X;
	408	regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7)
	409	\| RV3029_A_AE_X;
	410	regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100))
	411	\| RV3029_A_AE_X;
	412
	413	/* Write the alarm */
7518dd9a	414	ret = regmap_bulk_write(rv3029->regmap, RV3029_A_SC, regs,
4e7f1a60	415	RV3029_ALARM_SECTION_LEN);
52365230 HS	416	if (ret < 0)
	417	return ret;
	418
8fd3d609	419	return rv3029_alarm_irq_enable(dev, alarm->enabled);
52365230 HS	420	}
52365230 HS	421
e6e38082	422	static int rv3029_set_time(struct device dev, struct rtc_time tm)
52365230	423	{
54c5970d	424	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230 HS	425	u8 regs[8];
	426	int ret;
	427
abe2f551 MJ	428	regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec);
	429	regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min);
	430	regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour);
	431	regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday);
	432	regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1);
38201ca3	433	regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7;
abe2f551	434	regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
52365230	435
7518dd9a	436	ret = regmap_bulk_write(rv3029->regmap, RV3029_W_SEC, regs,
4e7f1a60	437	RV3029_WATCH_SECTION_LEN);
52365230 HS	438	if (ret < 0)
	439	return ret;
	440
cff2e4d2	441	/* clear PON and VLOW2 bits */
54c5970d	442	return regmap_update_bits(rv3029->regmap, RV3029_STATUS,
cff2e4d2	443	RV3029_STATUS_PON \| RV3029_STATUS_VLOW2, 0);
52365230	444	}
abe2f551	445
f630f728 AB	446	static int rv3029_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
	447	{
	448	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
	449	unsigned long vl = 0;
	450	int sr, ret = 0;
	451
	452	switch (cmd) {
	453	case RTC_VL_READ:
	454	ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr);
	455	if (ret < 0)
	456	return ret;
	457
	458	if (sr & RV3029_STATUS_VLOW1)
	459	vl = RTC_VL_ACCURACY_LOW;
	460
	461	if (sr & (RV3029_STATUS_VLOW2 \| RV3029_STATUS_PON))
	462	vl \|= RTC_VL_DATA_INVALID;
	463
	464	return put_user(vl, (unsigned int __user *)arg);
	465
	466	case RTC_VL_CLR:
	467	return regmap_update_bits(rv3029->regmap, RV3029_STATUS,
	468	RV3029_STATUS_VLOW1, 0);
	469
	470	default:
	471	return -ENOIOCTLCMD;
	472	}
	473	}
	474
ec923fcc AB	475	static int rv3029_nvram_write(void priv, unsigned int offset, void val,
	476	size_t bytes)
	477	{
	478	return regmap_bulk_write(priv, RV3029_RAM_PAGE + offset, val, bytes);
	479	}
	480
	481	static int rv3029_nvram_read(void priv, unsigned int offset, void val,
	482	size_t bytes)
	483	{
	484	return regmap_bulk_read(priv, RV3029_RAM_PAGE + offset, val, bytes);
	485	}
	486
e27e2160 MB	487	static const struct rv3029_trickle_tab_elem {
	488	u32 r; /* resistance in ohms */
	489	u8 conf; /* trickle config bits */
	490	} rv3029_trickle_tab[] = {
	491	{
	492	.r = 1076,
	493	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_5K \|
	494	RV3029_TRICKLE_20K \| RV3029_TRICKLE_80K,
	495	}, {
	496	.r = 1091,
	497	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_5K \|
	498	RV3029_TRICKLE_20K,
	499	}, {
	500	.r = 1137,
	501	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_5K \|
	502	RV3029_TRICKLE_80K,
	503	}, {
	504	.r = 1154,
	505	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_5K,
	506	}, {
	507	.r = 1371,
	508	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_20K \|
	509	RV3029_TRICKLE_80K,
	510	}, {
	511	.r = 1395,
	512	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_20K,
	513	}, {
	514	.r = 1472,
	515	.conf = RV3029_TRICKLE_1K \| RV3029_TRICKLE_80K,
	516	}, {
	517	.r = 1500,
	518	.conf = RV3029_TRICKLE_1K,
	519	}, {
	520	.r = 3810,
	521	.conf = RV3029_TRICKLE_5K \| RV3029_TRICKLE_20K \|
	522	RV3029_TRICKLE_80K,
	523	}, {
	524	.r = 4000,
	525	.conf = RV3029_TRICKLE_5K \| RV3029_TRICKLE_20K,
	526	}, {
	527	.r = 4706,
	528	.conf = RV3029_TRICKLE_5K \| RV3029_TRICKLE_80K,
	529	}, {
	530	.r = 5000,
	531	.conf = RV3029_TRICKLE_5K,
	532	}, {
	533	.r = 16000,
	534	.conf = RV3029_TRICKLE_20K \| RV3029_TRICKLE_80K,
	535	}, {
	536	.r = 20000,
	537	.conf = RV3029_TRICKLE_20K,
	538	}, {
	539	.r = 80000,
	540	.conf = RV3029_TRICKLE_80K,
	541	},
	542	};
	543
e6e38082	544	static void rv3029_trickle_config(struct device *dev)
e27e2160	545	{
7518dd9a	546	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
e6e38082	547	struct device_node *of_node = dev->of_node;
e27e2160 MB	548	const struct rv3029_trickle_tab_elem *elem;
	549	int i, err;
	550	u32 ohms;
39387dc2	551	u8 trickle_set_bits;
e27e2160 MB	552
	553	if (!of_node)
	554	return;
	555
	556	/* Configure the trickle charger. */
e27e2160 MB	557	err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
	558	if (err) {
	559	/* Disable trickle charger. */
39387dc2	560	trickle_set_bits = 0;
e27e2160 MB	561	} else {
	562	/* Enable trickle charger. */
	563	for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
	564	elem = &rv3029_trickle_tab[i];
	565	if (elem->r >= ohms)
	566	break;
	567	}
39387dc2	568	trickle_set_bits = elem->conf;
e6e38082	569	dev_info(dev,
e27e2160 MB	570	"Trickle charger enabled at %d ohms resistance.\n",
	571	elem->r);
	572	}
7518dd9a	573	err = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL,
39387dc2 MB	574	RV3029_TRICKLE_MASK,
39387dc2 MB	575	trickle_set_bits);
abe2f551	576	if (err < 0)
e6e38082	577	dev_err(dev, "Failed to update trickle charger config\n");
e27e2160 MB	578	}
e27e2160 MB	579
a696b31e MB	580	#ifdef CONFIG_RTC_DRV_RV3029_HWMON
a696b31e MB	581
7518dd9a	582	static int rv3029_read_temp(struct rv3029_data rv3029, int temp_mC)
a696b31e	583	{
7518dd9a	584	unsigned int temp;
a696b31e	585	int ret;
a696b31e	586
7518dd9a	587	ret = regmap_read(rv3029->regmap, RV3029_TEMP_PAGE, &temp);
a696b31e MB	588	if (ret < 0)
	589	return ret;
	590
	591	temp_mC = ((int)temp - 60) 1000;
	592
	593	return 0;
	594	}
	595
	596	static ssize_t rv3029_hwmon_show_temp(struct device *dev,
	597	struct device_attribute *attr,
	598	char *buf)
	599	{
7518dd9a	600	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e MB	601	int ret, temp_mC;
a696b31e MB	602
7518dd9a	603	ret = rv3029_read_temp(rv3029, &temp_mC);
a696b31e MB	604	if (ret < 0)
	605	return ret;
	606
	607	return sprintf(buf, "%d\n", temp_mC);
	608	}
	609
	610	static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
	611	struct device_attribute *attr,
	612	const char *buf,
	613	size_t count)
	614	{
7518dd9a AB	615	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
7518dd9a AB	616	unsigned int th_set_bits = 0;
a696b31e MB	617	unsigned long interval_ms;
a696b31e MB	618	int ret;
a696b31e MB	619
	620	ret = kstrtoul(buf, 10, &interval_ms);
	621	if (ret < 0)
	622	return ret;
	623
	624	if (interval_ms != 0) {
	625	th_set_bits \|= RV3029_EECTRL_THE;
	626	if (interval_ms >= 16000)
	627	th_set_bits \|= RV3029_EECTRL_THP;
	628	}
7518dd9a	629	ret = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL,
a696b31e MB	630	RV3029_EECTRL_THE \| RV3029_EECTRL_THP,
	631	th_set_bits);
	632	if (ret < 0)
	633	return ret;
	634
	635	return count;
	636	}
	637
	638	static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
	639	struct device_attribute *attr,
	640	char *buf)
	641	{
7518dd9a	642	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e MB	643	int ret, interval_ms;
	644	u8 eectrl;
	645
7518dd9a	646	ret = rv3029_eeprom_read(rv3029, RV3029_CONTROL_E2P_EECTRL,
a696b31e MB	647	&eectrl, 1);
	648	if (ret < 0)
	649	return ret;
	650
	651	if (eectrl & RV3029_EECTRL_THE) {
	652	if (eectrl & RV3029_EECTRL_THP)
	653	interval_ms = 16000;
	654	else
	655	interval_ms = 1000;
	656	} else {
	657	interval_ms = 0;
	658	}
	659
	660	return sprintf(buf, "%d\n", interval_ms);
	661	}
	662
	663	static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
	664	NULL, 0);
	665	static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR \| S_IRUGO,
	666	rv3029_hwmon_show_update_interval,
	667	rv3029_hwmon_set_update_interval, 0);
	668
	669	static struct attribute *rv3029_hwmon_attrs[] = {
	670	&sensor_dev_attr_temp1_input.dev_attr.attr,
	671	&sensor_dev_attr_update_interval.dev_attr.attr,
	672	NULL,
	673	};
	674	ATTRIBUTE_GROUPS(rv3029_hwmon);
	675
e6e38082	676	static void rv3029_hwmon_register(struct device dev, const char name)
a696b31e	677	{
e6e38082	678	struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e MB	679	struct device *hwmon_dev;
a696b31e MB	680
e6e38082 MJ	681	hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029,
e6e38082 MJ	682	rv3029_hwmon_groups);
a696b31e	683	if (IS_ERR(hwmon_dev)) {
e6e38082	684	dev_warn(dev, "unable to register hwmon device %ld\n",
4e7f1a60	685	PTR_ERR(hwmon_dev));
a696b31e MB	686	}
	687	}
	688
	689	#else /* CONFIG_RTC_DRV_RV3029_HWMON */
	690
e6e38082	691	static void rv3029_hwmon_register(struct device dev, const char name)
a696b31e MB	692	{
	693	}
	694
	695	#endif /* CONFIG_RTC_DRV_RV3029_HWMON */
	696
9476b67b	697	static const struct rtc_class_ops rv3029_rtc_ops = {
e6e38082 MJ	698	.read_time = rv3029_read_time,
e6e38082 MJ	699	.set_time = rv3029_set_time,
f630f728	700	.ioctl = rv3029_ioctl,
9476b67b AB	701	.read_alarm = rv3029_read_alarm,
	702	.set_alarm = rv3029_set_alarm,
	703	.alarm_irq_enable = rv3029_alarm_irq_enable,
52365230 HS	704	};
52365230 HS	705
e6e38082 MJ	706	static int rv3029_probe(struct device dev, struct regmap regmap, int irq,
e6e38082 MJ	707	const char *name)
52365230	708	{
e6e38082	709	struct rv3029_data *rv3029;
ec923fcc AB	710	struct nvmem_config nvmem_cfg = {
	711	.name = "rv3029_nvram",
	712	.word_size = 1,
	713	.stride = 1,
	714	.size = RV3029_RAM_SECTION_LEN,
	715	.type = NVMEM_TYPE_BATTERY_BACKED,
	716	.reg_read = rv3029_nvram_read,
	717	.reg_write = rv3029_nvram_write,
	718	};
52365230	719	int rc = 0;
52365230	720
e6e38082 MJ	721	rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL);
	722	if (!rv3029)
	723	return -ENOMEM;
	724
	725	rv3029->regmap = regmap;
	726	rv3029->irq = irq;
	727	rv3029->dev = dev;
	728	dev_set_drvdata(dev, rv3029);
52365230	729
e6e38082 MJ	730	rv3029_trickle_config(dev);
	731	rv3029_hwmon_register(dev, name);
	732
9346f870 AB	733	rv3029->rtc = devm_rtc_allocate_device(dev);
9346f870 AB	734	if (IS_ERR(rv3029->rtc))
0ddc5b89	735	return PTR_ERR(rv3029->rtc);
e27e2160	736
0ddc5b89	737	if (rv3029->irq > 0) {
bfff849f AB	738	unsigned long irqflags = IRQF_TRIGGER_LOW;
	739
	740	if (dev_fwnode(dev))
	741	irqflags = 0;
	742
0ddc5b89 MJ	743	rc = devm_request_threaded_irq(dev, rv3029->irq,
0ddc5b89 MJ	744	NULL, rv3029_handle_irq,
bfff849f	745	irqflags \| IRQF_ONESHOT,
0ddc5b89 MJ	746	"rv3029", dev);
	747	if (rc) {
	748	dev_warn(dev, "unable to request IRQ, alarms disabled\n");
	749	rv3029->irq = 0;
0ddc5b89 MJ	750	}
0ddc5b89 MJ	751	}
9476b67b AB	752	if (!rv3029->irq)
9476b67b AB	753	clear_bit(RTC_FEATURE_ALARM, rv3029->rtc->features);
0ddc5b89	754
9346f870	755	rv3029->rtc->ops = &rv3029_rtc_ops;
cbc943eb AB	756	rv3029->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
cbc943eb AB	757	rv3029->rtc->range_max = RTC_TIMESTAMP_END_2079;
9346f870	758
fdcfd854	759	rc = devm_rtc_register_device(rv3029->rtc);
ec923fcc AB	760	if (rc)
	761	return rc;
	762
	763	nvmem_cfg.priv = rv3029->regmap;
3a905c2d	764	devm_rtc_nvmem_register(rv3029->rtc, &nvmem_cfg);
ec923fcc AB	765
ec923fcc AB	766	return 0;
e6e38082	767	}
52365230	768
c509e434 AB	769	static const struct regmap_range rv3029_holes_range[] = {
	770	regmap_reg_range(0x05, 0x07),
	771	regmap_reg_range(0x0f, 0x0f),
	772	regmap_reg_range(0x17, 0x17),
	773	regmap_reg_range(0x1a, 0x1f),
	774	regmap_reg_range(0x21, 0x27),
	775	regmap_reg_range(0x34, 0x37),
	776	};
	777
	778	static const struct regmap_access_table rv3029_regs = {
	779	.no_ranges = rv3029_holes_range,
	780	.n_no_ranges = ARRAY_SIZE(rv3029_holes_range),
	781	};
	782
	783	static const struct regmap_config config = {
	784	.reg_bits = 8,
	785	.val_bits = 8,
	786	.rd_table = &rv3029_regs,
	787	.wr_table = &rv3029_regs,
	788	.max_register = 0x3f,
	789	};
	790
c2a1c145 MJ	791	#if IS_ENABLED(CONFIG_I2C)
c2a1c145 MJ	792
3f4a3322	793	static int rv3029_i2c_probe(struct i2c_client *client)
e6e38082 MJ	794	{
e6e38082 MJ	795	struct regmap *regmap;
e6e38082 MJ	796	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK \|
	797	I2C_FUNC_SMBUS_BYTE)) {
	798	dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n");
	799	return -ENODEV;
	800	}
52365230	801
e6e38082	802	regmap = devm_regmap_init_i2c(client, &config);
bd0d9379	803	if (IS_ERR(regmap))
e6e38082	804	return PTR_ERR(regmap);
52365230	805
e6e38082	806	return rv3029_probe(&client->dev, regmap, client->irq, client->name);
52365230 HS	807	}
52365230 HS	808
45a63518	809	static const struct i2c_device_id rv3029_id[] = {
a47d377e UKK	810	{ "rv3029" },
a47d377e UKK	811	{ "rv3029c2" },
814db2bc AB	812	{ }
	813	};
	814	MODULE_DEVICE_TABLE(i2c, rv3029_id);
	815
788babdd	816	static const __maybe_unused struct of_device_id rv3029_of_match[] = {
45b611c8	817	{ .compatible = "microcrystal,rv3029" },
e696a1dd JMC	818	{ }
	819	};
	820	MODULE_DEVICE_TABLE(of, rv3029_of_match);
	821
aba39d27	822	static struct i2c_driver rv3029_driver = {
52365230	823	.driver = {
9b45ef97	824	.name = "rv3029",
e696a1dd	825	.of_match_table = of_match_ptr(rv3029_of_match),
52365230	826	},
31b0cecb	827	.probe = rv3029_i2c_probe,
aba39d27	828	.id_table = rv3029_id,
52365230 HS	829	};
52365230 HS	830
fc219291	831	static int __init rv3029_register_driver(void)
c2a1c145 MJ	832	{
	833	return i2c_add_driver(&rv3029_driver);
	834	}
	835
	836	static void rv3029_unregister_driver(void)
	837	{
	838	i2c_del_driver(&rv3029_driver);
	839	}
	840
	841	#else
	842
fc219291	843	static int __init rv3029_register_driver(void)
c2a1c145 MJ	844	{
	845	return 0;
	846	}
	847
	848	static void rv3029_unregister_driver(void)
	849	{
	850	}
	851
	852	#endif
	853
	854	#if IS_ENABLED(CONFIG_SPI_MASTER)
	855
	856	static int rv3049_probe(struct spi_device *spi)
	857	{
c2a1c145 MJ	858	struct regmap *regmap;
	859
	860	regmap = devm_regmap_init_spi(spi, &config);
bd0d9379	861	if (IS_ERR(regmap))
c2a1c145	862	return PTR_ERR(regmap);
c2a1c145 MJ	863
	864	return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049");
	865	}
	866
	867	static struct spi_driver rv3049_driver = {
	868	.driver = {
	869	.name = "rv3049",
	870	},
	871	.probe = rv3049_probe,
	872	};
	873
fc219291	874	static int __init rv3049_register_driver(void)
c2a1c145 MJ	875	{
	876	return spi_register_driver(&rv3049_driver);
	877	}
	878
fc219291	879	static void __exit rv3049_unregister_driver(void)
c2a1c145 MJ	880	{
	881	spi_unregister_driver(&rv3049_driver);
	882	}
	883
	884	#else
	885
fc219291	886	static int __init rv3049_register_driver(void)
c2a1c145 MJ	887	{
	888	return 0;
	889	}
	890
fc219291	891	static void __exit rv3049_unregister_driver(void)
c2a1c145 MJ	892	{
	893	}
	894
	895	#endif
	896
	897	static int __init rv30x9_init(void)
	898	{
	899	int ret;
	900
	901	ret = rv3029_register_driver();
bd0d9379	902	if (ret)
c2a1c145	903	return ret;
c2a1c145 MJ	904
c2a1c145 MJ	905	ret = rv3049_register_driver();
bd0d9379	906	if (ret)
c2a1c145	907	rv3029_unregister_driver();
c2a1c145 MJ	908
	909	return ret;
	910	}
	911	module_init(rv30x9_init)
	912
	913	static void __exit rv30x9_exit(void)
	914	{
	915	rv3049_unregister_driver();
	916	rv3029_unregister_driver();
	917	}
	918	module_exit(rv30x9_exit)
52365230 HS	919
52365230 HS	920	MODULE_AUTHOR("Gregory Hermant <[email protected]>");
2dca3d9e	921	MODULE_AUTHOR("Michael Buesch <[email protected]>");
c2a1c145	922	MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver");
52365230	923	MODULE_LICENSE("GPL");
c2a1c145	924	MODULE_ALIAS("spi:rv3049");