projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 1da177e4 LT |
2 | /* |
| 3 | * linux/arch/arm/lib/delay.S | |
| 4 | * | |
| 5 | * Copyright (C) 1995, 1996 Russell King | |
| 1da177e4 LT |
6 | */ |
| 7 | #include <linux/linkage.h> | |
| 7339fb11 | 8 | #include <linux/cfi_types.h> |
| 1da177e4 | 9 | #include <asm/assembler.h> |
| d0a533b1 | 10 | #include <asm/delay.h> |
| 215e362d | 11 | |
| a2faac39 ND |
12 | #ifdef CONFIG_ARCH_RPC |
| 13 | .arch armv4 | |
| 14 | #endif | |
| 15 | ||
| 1da177e4 LT |
16 | .text |
| 17 | ||
| 8adbb371 | 18 | .LC0: .word loops_per_jiffy |
| d0a533b1 | 19 | .LC1: .word UDELAY_MULT |
| 1da177e4 LT |
20 | |
| 21 | /* | |
| 207b1150 NP |
22 | * loops = r0 * HZ * loops_per_jiffy / 1000000 |
| 23 | * | |
| 6d4518d7 | 24 | * r0 <= 2000 |
| 6d4518d7 | 25 | * HZ <= 1000 |
| 1da177e4 | 26 | */ |
| 6d4518d7 | 27 | |
| 7339fb11 | 28 | SYM_TYPED_FUNC_START(__loop_udelay) |
| 6d4518d7 | 29 | ldr r2, .LC1 |
| 207b1150 | 30 | mul r0, r2, r0 @ r0 = delay_us * UDELAY_MULT |
| 7339fb11 LW |
31 | b __loop_const_udelay |
| 32 | SYM_FUNC_END(__loop_udelay) | |
| 33 | ||
| 34 | SYM_TYPED_FUNC_START(__loop_const_udelay) @ 0 <= r0 <= 0xfffffaf0 | |
| 8adbb371 | 35 | ldr r2, .LC0 |
| 215e362d | 36 | ldr r2, [r2] |
| 207b1150 NP |
37 | umull r1, r0, r2, r0 @ r0-r1 = r0 * loops_per_jiffy |
| 38 | adds r1, r1, #0xffffffff @ rounding up ... | |
| 39 | adcs r0, r0, r0 @ and right shift by 31 | |
| 6ebbf2ce | 40 | reteq lr |
| 7339fb11 LW |
41 | b __loop_delay |
| 42 | SYM_FUNC_END(__loop_const_udelay) | |
| 1da177e4 | 43 | |
| 11d4bb1b | 44 | .align 3 |
| 1da177e4 LT |
45 | |
| 46 | @ Delay routine | |
| 7339fb11 | 47 | SYM_TYPED_FUNC_START(__loop_delay) |
| 1da177e4 LT |
48 | subs r0, r0, #1 |
| 49 | #if 0 | |
| 6ebbf2ce | 50 | retls lr |
| 1da177e4 | 51 | subs r0, r0, #1 |
| 6ebbf2ce | 52 | retls lr |
| 1da177e4 | 53 | subs r0, r0, #1 |
| 6ebbf2ce | 54 | retls lr |
| 1da177e4 | 55 | subs r0, r0, #1 |
| 6ebbf2ce | 56 | retls lr |
| 1da177e4 | 57 | subs r0, r0, #1 |
| 6ebbf2ce | 58 | retls lr |
| 1da177e4 | 59 | subs r0, r0, #1 |
| 6ebbf2ce | 60 | retls lr |
| 1da177e4 | 61 | subs r0, r0, #1 |
| 6ebbf2ce | 62 | retls lr |
| 1da177e4 LT |
63 | subs r0, r0, #1 |
| 64 | #endif | |
| d0a533b1 | 65 | bhi __loop_delay |
| 6ebbf2ce | 66 | ret lr |
| 7339fb11 | 67 | SYM_FUNC_END(__loop_delay) |