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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
fa1c3ff9 VG |
2 | /* |
3 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
fa1c3ff9 VG |
4 | */ |
5 | ||
6 | #include <linux/module.h> | |
7 | #include <linux/moduleloader.h> | |
8 | #include <linux/kernel.h> | |
9 | #include <linux/elf.h> | |
10 | #include <linux/vmalloc.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/fs.h> | |
13 | #include <linux/string.h> | |
854a0d95 | 14 | #include <asm/unwind.h> |
fa1c3ff9 VG |
15 | |
16 | static inline void arc_write_me(unsigned short *addr, unsigned long value) | |
17 | { | |
18 | *addr = (value & 0xffff0000) >> 16; | |
19 | *(addr + 1) = (value & 0xffff); | |
20 | } | |
21 | ||
6716dbbd VG |
22 | /* |
23 | * This gets called before relocation loop in generic loader | |
24 | * Make a note of the section index of unwinding section | |
854a0d95 VG |
25 | */ |
26 | int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, | |
27 | char *secstr, struct module *mod) | |
28 | { | |
29 | #ifdef CONFIG_ARC_DW2_UNWIND | |
854a0d95 VG |
30 | mod->arch.unw_sec_idx = 0; |
31 | mod->arch.unw_info = NULL; | |
854a0d95 | 32 | #endif |
eb1357d9 | 33 | mod->arch.secstr = secstr; |
955ad595 | 34 | return 0; |
854a0d95 VG |
35 | } |
36 | ||
37 | void module_arch_cleanup(struct module *mod) | |
38 | { | |
39 | #ifdef CONFIG_ARC_DW2_UNWIND | |
40 | if (mod->arch.unw_info) | |
41 | unwind_remove_table(mod->arch.unw_info, 0); | |
42 | #endif | |
43 | } | |
44 | ||
fa1c3ff9 VG |
45 | int apply_relocate_add(Elf32_Shdr *sechdrs, |
46 | const char *strtab, | |
47 | unsigned int symindex, /* sec index for sym tbl */ | |
48 | unsigned int relsec, /* sec index for relo sec */ | |
49 | struct module *module) | |
50 | { | |
b75dcd9c | 51 | int i, n, relo_type; |
fa1c3ff9 VG |
52 | Elf32_Rela *rel_entry = (void *)sechdrs[relsec].sh_addr; |
53 | Elf32_Sym *sym_entry, *sym_sec; | |
b75dcd9c | 54 | Elf32_Addr relocation, location, tgt_addr; |
d65283f7 | 55 | unsigned int tgtsec; |
fa1c3ff9 | 56 | |
b75dcd9c VG |
57 | /* |
58 | * @relsec has relocations e.g. .rela.init.text | |
59 | * @tgtsec is section to patch e.g. .init.text | |
60 | */ | |
d65283f7 | 61 | tgtsec = sechdrs[relsec].sh_info; |
b75dcd9c | 62 | tgt_addr = sechdrs[tgtsec].sh_addr; |
fa1c3ff9 VG |
63 | sym_sec = (Elf32_Sym *) sechdrs[symindex].sh_addr; |
64 | n = sechdrs[relsec].sh_size / sizeof(*rel_entry); | |
65 | ||
b75dcd9c VG |
66 | pr_debug("\nSection to fixup %s @%x\n", |
67 | module->arch.secstr + sechdrs[tgtsec].sh_name, tgt_addr); | |
fa1c3ff9 | 68 | pr_debug("=========================================================\n"); |
b75dcd9c | 69 | pr_debug("r_off\tr_add\tst_value ADDRESS VALUE\n"); |
fa1c3ff9 VG |
70 | pr_debug("=========================================================\n"); |
71 | ||
72 | /* Loop thru entries in relocation section */ | |
73 | for (i = 0; i < n; i++) { | |
b75dcd9c | 74 | const char *s; |
fa1c3ff9 VG |
75 | |
76 | /* This is where to make the change */ | |
b75dcd9c | 77 | location = tgt_addr + rel_entry[i].r_offset; |
fa1c3ff9 VG |
78 | |
79 | /* This is the symbol it is referring to. Note that all | |
80 | undefined symbols have been resolved. */ | |
81 | sym_entry = sym_sec + ELF32_R_SYM(rel_entry[i].r_info); | |
82 | ||
83 | relocation = sym_entry->st_value + rel_entry[i].r_addend; | |
84 | ||
b75dcd9c VG |
85 | if (sym_entry->st_name == 0 && ELF_ST_TYPE (sym_entry->st_info) == STT_SECTION) { |
86 | s = module->arch.secstr + sechdrs[sym_entry->st_shndx].sh_name; | |
87 | } else { | |
88 | s = strtab + sym_entry->st_name; | |
89 | } | |
90 | ||
91 | pr_debug(" %x\t%x\t%x %x %x [%s]\n", | |
92 | rel_entry[i].r_offset, rel_entry[i].r_addend, | |
93 | sym_entry->st_value, location, relocation, s); | |
fa1c3ff9 VG |
94 | |
95 | /* This assumes modules are built with -mlong-calls | |
96 | * so any branches/jumps are absolute 32 bit jmps | |
97 | * global data access again is abs 32 bit. | |
98 | * Both of these are handled by same relocation type | |
99 | */ | |
100 | relo_type = ELF32_R_TYPE(rel_entry[i].r_info); | |
101 | ||
94f4fb08 | 102 | if (likely(R_ARC_32_ME == relo_type)) /* ME ( S + A ) */ |
fa1c3ff9 | 103 | arc_write_me((unsigned short *)location, relocation); |
94f4fb08 | 104 | else if (R_ARC_32 == relo_type) /* ( S + A ) */ |
fa1c3ff9 | 105 | *((Elf32_Addr *) location) = relocation; |
94f4fb08 VG |
106 | else if (R_ARC_32_PCREL == relo_type) /* ( S + A ) - PDATA ) */ |
107 | *((Elf32_Addr *) location) = relocation - location; | |
fa1c3ff9 VG |
108 | else |
109 | goto relo_err; | |
110 | ||
111 | } | |
d65283f7 | 112 | |
eb1357d9 | 113 | #ifdef CONFIG_ARC_DW2_UNWIND |
d65283f7 VG |
114 | if (strcmp(module->arch.secstr+sechdrs[tgtsec].sh_name, ".eh_frame") == 0) |
115 | module->arch.unw_sec_idx = tgtsec; | |
eb1357d9 | 116 | #endif |
d65283f7 | 117 | |
fa1c3ff9 VG |
118 | return 0; |
119 | ||
120 | relo_err: | |
121 | pr_err("%s: unknown relocation: %u\n", | |
122 | module->name, ELF32_R_TYPE(rel_entry[i].r_info)); | |
123 | return -ENOEXEC; | |
124 | ||
125 | } | |
854a0d95 VG |
126 | |
127 | /* Just before lift off: After sections have been relocated, we add the | |
128 | * dwarf section to unwinder table pool | |
129 | * This couldn't be done in module_frob_arch_sections() because | |
130 | * relocations had not been applied by then | |
131 | */ | |
132 | int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, | |
133 | struct module *mod) | |
134 | { | |
135 | #ifdef CONFIG_ARC_DW2_UNWIND | |
136 | void *unw; | |
137 | int unwsec = mod->arch.unw_sec_idx; | |
138 | ||
139 | if (unwsec) { | |
140 | unw = unwind_add_table(mod, (void *)sechdrs[unwsec].sh_addr, | |
141 | sechdrs[unwsec].sh_size); | |
142 | mod->arch.unw_info = unw; | |
143 | } | |
144 | #endif | |
955ad595 | 145 | return 0; |
854a0d95 | 146 | } |