[linux.git] / drivers / pcmcia / omap_cf.c

/*
 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
 *
 * Copyright (c) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/slab.h>

#include <pcmcia/ss.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <plat/mux.h>
#include <plat/tc.h>


/* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
 * hard-wired timings to support Compact Flash memory cards; they won't work
 * with various other devices (like WLAN adapters) without some external
 * logic to help out.
 *
 * NOTE:  CF controller docs disagree with address space docs as to where
 * CF_BASE really lives; this is a doc erratum.
 */
#define	CF_BASE	0xfffe2800

/* status; read after IRQ */
#define CF_STATUS			(CF_BASE + 0x00)
#	define	CF_STATUS_BAD_READ	(1 << 2)
#	define	CF_STATUS_BAD_WRITE	(1 << 1)
#	define	CF_STATUS_CARD_DETECT	(1 << 0)

/* which chipselect (CS0..CS3) is used for CF (active low) */
#define CF_CFG				(CF_BASE + 0x02)

/* card reset */
#define CF_CONTROL			(CF_BASE + 0x04)
#	define	CF_CONTROL_RESET	(1 << 0)

#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "omap_cf";

struct omap_cf_socket {
	struct pcmcia_socket	socket;

	struct timer_list	timer;
	unsigned		present:1;
	unsigned		active:1;

	struct platform_device	*pdev;
	unsigned long		phys_cf;
	u_int			irq;
	struct resource		iomem;
};

#define	POLL_INTERVAL		(2 * HZ)

/*--------------------------------------------------------------------------*/

static int omap_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

/* the timer is primarily to kick this socket's pccardd */
static void omap_cf_timer(unsigned long _cf)
{
	struct omap_cf_socket	*cf = (void *) _cf;
	unsigned		present = omap_cf_present();

	if (present != cf->present) {
		cf->present = present;
		pr_debug("%s: card %s\n", driver_name,
			present ? "present" : "gone");
		pcmcia_parse_events(&cf->socket, SS_DETECT);
	}

	if (cf->active)
		mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
}

/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
 * claim the card's IRQ.  It may also detect some card insertions, but
 * not removals; it can't always eliminate timer irqs.
 */
static irqreturn_t omap_cf_irq(int irq, void *_cf)
{
	omap_cf_timer((unsigned long)_cf);
	return IRQ_HANDLED;
}

static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	if (!sp)
		return -EINVAL;

	/* NOTE CF is always 3VCARD */
	if (omap_cf_present()) {
		struct omap_cf_socket	*cf;

		*sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
		cf = container_of(s, struct omap_cf_socket, socket);
		s->pcmcia_irq = 0;
		s->pci_irq = cf->irq;
	} else
		*sp = 0;
	return 0;
}

static int
omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	u16		control;

	/* REVISIT some non-OSK boards may support power switching */
	switch (s->Vcc) {
	case 0:
	case 33:
		break;
	default:
		return -EINVAL;
	}

	control = omap_readw(CF_CONTROL);
	if (s->flags & SS_RESET)
		omap_writew(CF_CONTROL_RESET, CF_CONTROL);
	else
		omap_writew(0, CF_CONTROL);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int omap_cf_ss_suspend(struct pcmcia_socket *s)
{
	pr_debug("%s: %s\n", driver_name, __func__);
	return omap_cf_set_socket(s, &dead_socket);
}

/* regions are 2K each:  mem, attrib, io (and reserved-for-ide) */

static int
omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct omap_cf_socket	*cf;

	cf = container_of(s, struct omap_cf_socket, socket);
	io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	io->start = cf->phys_cf + SZ_4K;
	io->stop = io->start + SZ_2K - 1;
	return 0;
}

static int
omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct omap_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;
	cf = container_of(s, struct omap_cf_socket, socket);
	map->static_start = cf->phys_cf;
	map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	if (map->flags & MAP_ATTRIB)
		map->static_start += SZ_2K;
	return 0;
}

static struct pccard_operations omap_cf_ops = {
	.init			= omap_cf_ss_init,
	.suspend		= omap_cf_ss_suspend,
	.get_status		= omap_cf_get_status,
	.set_socket		= omap_cf_set_socket,
	.set_io_map		= omap_cf_set_io_map,
	.set_mem_map		= omap_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

/*
 * NOTE:  right now the only board-specific platform_data is
 * "what chipselect is used".  Boards could want more.
 */

static int __init omap_cf_probe(struct platform_device *pdev)
{
	unsigned		seg;
	struct omap_cf_socket	*cf;
	int			irq;
	int			status;

	seg = (int) pdev->dev.platform_data;
	if (seg == 0 || seg > 3)
		return -ENODEV;

	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -EINVAL;

	cf = kzalloc(sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;
	init_timer(&cf->timer);
	cf->timer.function = omap_cf_timer;
	cf->timer.data = (unsigned long) cf;

	cf->pdev = pdev;
	platform_set_drvdata(pdev, cf);

	/* this primarily just shuts up irq handling noise */
	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
			driver_name, cf);
	if (status < 0)
		goto fail0;
	cf->irq = irq;
	cf->socket.pci_irq = irq;

	switch (seg) {
	/* NOTE: CS0 could be configured too ... */
	case 1:
		cf->phys_cf = OMAP_CS1_PHYS;
		break;
	case 2:
		cf->phys_cf = OMAP_CS2_PHYS;
		break;
	case 3:
		cf->phys_cf = omap_cs3_phys();
		break;
	default:
		goto  fail1;
	}
	cf->iomem.start = cf->phys_cf;
	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	cf->iomem.flags = IORESOURCE_MEM;

	/* pcmcia layer only remaps "real" memory */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	if (!cf->socket.io_offset)
		goto fail1;

	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
		goto fail1;

	/* NOTE:  CF conflicts with MMC1 */
	omap_cfg_reg(W11_1610_CF_CD1);
	omap_cfg_reg(P11_1610_CF_CD2);
	omap_cfg_reg(R11_1610_CF_IOIS16);
	omap_cfg_reg(V10_1610_CF_IREQ);
	omap_cfg_reg(W10_1610_CF_RESET);

	omap_writew(~(1 << seg), CF_CFG);

	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);

	/* NOTE:  better EMIFS setup might support more cards; but the
	 * TRM only shows how to affect regular flash signals, not their
	 * CF/PCMCIA variants...
	 */
	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
		seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	omap_writel(0x0004a1b3, EMIFS_CCS(seg));	/* synch mode 4 etc */
	omap_writel(0x00000000, EMIFS_ACS(seg));	/* OE hold/setup */

	/* CF uses armxor_ck, which is "always" available */

	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
		omap_readw(CF_STATUS), omap_readw(CF_CFG),
		omap_readw(CF_CONTROL),
		omap_cf_present() ? "present" : "(not present)");

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &omap_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = &cf->iomem;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	cf->active = 1;
	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	return 0;

fail2:
	release_mem_region(cf->phys_cf, SZ_8K);
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	free_irq(irq, cf);
fail0:
	kfree(cf);
	return status;
}

static int __exit omap_cf_remove(struct platform_device *pdev)
{
	struct omap_cf_socket *cf = platform_get_drvdata(pdev);

	cf->active = 0;
	pcmcia_unregister_socket(&cf->socket);
	del_timer_sync(&cf->timer);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(cf->phys_cf, SZ_8K);
	free_irq(cf->irq, cf);
	kfree(cf);
	return 0;
}

static struct platform_driver omap_cf_driver = {
	.driver = {
		.name	= (char *) driver_name,
		.owner	= THIS_MODULE,
	},
	.remove		= __exit_p(omap_cf_remove),
};

static int __init omap_cf_init(void)
{
	if (cpu_is_omap16xx())
		return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
	return -ENODEV;
}

static void __exit omap_cf_exit(void)
{
	if (cpu_is_omap16xx())
		platform_driver_unregister(&omap_cf_driver);
}

module_init(omap_cf_init);
module_exit(omap_cf_exit);

MODULE_DESCRIPTION("OMAP CF Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:omap_cf");
Commit	Line	Data
f74e48a5 DB	1	/*
	2	* omap_cf.c -- OMAP 16xx CompactFlash controller driver
	3	*
	4	* Copyright (c) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
d052d1be	14	#include <linux/platform_device.h>
f74e48a5 DB	15	#include <linux/errno.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/interrupt.h>
5a0e3ad6	19	#include <linux/slab.h>
f74e48a5 DB	20
	21	#include <pcmcia/ss.h>
	22
a09e64fb	23	#include <mach/hardware.h>
f74e48a5	24	#include <asm/io.h>
f74e48a5 DB	25	#include <asm/sizes.h>
f74e48a5 DB	26
ce491cf8 TL	27	#include <plat/mux.h>
ce491cf8 TL	28	#include <plat/tc.h>
f74e48a5 DB	29
	30
	31	/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
	32	* hard-wired timings to support Compact Flash memory cards; they won't work
	33	* with various other devices (like WLAN adapters) without some external
	34	* logic to help out.
	35	*
	36	* NOTE: CF controller docs disagree with address space docs as to where
	37	* CF_BASE really lives; this is a doc erratum.
	38	*/
	39	#define CF_BASE 0xfffe2800
	40
	41	/* status; read after IRQ */
030b1545	42	#define CF_STATUS (CF_BASE + 0x00)
f74e48a5 DB	43	# define CF_STATUS_BAD_READ (1 << 2)
	44	# define CF_STATUS_BAD_WRITE (1 << 1)
	45	# define CF_STATUS_CARD_DETECT (1 << 0)
	46
	47	/* which chipselect (CS0..CS3) is used for CF (active low) */
030b1545	48	#define CF_CFG (CF_BASE + 0x02)
f74e48a5 DB	49
f74e48a5 DB	50	/* card reset */
030b1545	51	#define CF_CONTROL (CF_BASE + 0x04)
f74e48a5 DB	52	# define CF_CONTROL_RESET (1 << 0)
f74e48a5 DB	53
030b1545	54	#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
f74e48a5 DB	55
	56	/--------------------------------------------------------------------------/
	57
	58	static const char driver_name[] = "omap_cf";
	59
	60	struct omap_cf_socket {
	61	struct pcmcia_socket socket;
	62
	63	struct timer_list timer;
	64	unsigned present:1;
	65	unsigned active:1;
	66
	67	struct platform_device *pdev;
	68	unsigned long phys_cf;
	69	u_int irq;
dcb9c392	70	struct resource iomem;
f74e48a5 DB	71	};
	72
	73	#define POLL_INTERVAL (2 * HZ)
	74
f74e48a5 DB	75	/--------------------------------------------------------------------------/
	76
	77	static int omap_cf_ss_init(struct pcmcia_socket *s)
	78	{
	79	return 0;
	80	}
	81
	82	/* the timer is primarily to kick this socket's pccardd */
	83	static void omap_cf_timer(unsigned long _cf)
	84	{
	85	struct omap_cf_socket cf = (void ) _cf;
	86	unsigned present = omap_cf_present();
	87
	88	if (present != cf->present) {
	89	cf->present = present;
	90	pr_debug("%s: card %s\n", driver_name,
	91	present ? "present" : "gone");
	92	pcmcia_parse_events(&cf->socket, SS_DETECT);
	93	}
	94
	95	if (cf->active)
	96	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	97	}
	98
	99	/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
	100	* claim the card's IRQ. It may also detect some card insertions, but
	101	* not removals; it can't always eliminate timer irqs.
	102	*/
7d12e780	103	static irqreturn_t omap_cf_irq(int irq, void *_cf)
f74e48a5 DB	104	{
	105	omap_cf_timer((unsigned long)_cf);
	106	return IRQ_HANDLED;
	107	}
	108
	109	static int omap_cf_get_status(struct pcmcia_socket s, u_int sp)
	110	{
	111	if (!sp)
	112	return -EINVAL;
	113
dcb9c392	114	/* NOTE CF is always 3VCARD */
f74e48a5 DB	115	if (omap_cf_present()) {
	116	struct omap_cf_socket *cf;
	117
	118	*sp = SS_READY \| SS_DETECT \| SS_POWERON \| SS_3VCARD;
	119	cf = container_of(s, struct omap_cf_socket, socket);
6f840afb	120	s->pcmcia_irq = 0;
dcb9c392	121	s->pci_irq = cf->irq;
f74e48a5 DB	122	} else
	123	*sp = 0;
	124	return 0;
	125	}
	126
	127	static int
	128	omap_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
	129	{
	130	u16 control;
	131
dcb9c392	132	/* REVISIT some non-OSK boards may support power switching */
f74e48a5 DB	133	switch (s->Vcc) {
	134	case 0:
	135	case 33:
	136	break;
	137	default:
	138	return -EINVAL;
	139	}
	140
030b1545	141	control = omap_readw(CF_CONTROL);
f74e48a5	142	if (s->flags & SS_RESET)
030b1545	143	omap_writew(CF_CONTROL_RESET, CF_CONTROL);
f74e48a5	144	else
030b1545	145	omap_writew(0, CF_CONTROL);
f74e48a5 DB	146
	147	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	148	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	149
	150	return 0;
	151	}
	152
	153	static int omap_cf_ss_suspend(struct pcmcia_socket *s)
	154	{
2e11cb4c	155	pr_debug("%s: %s\n", driver_name, __func__);
f74e48a5 DB	156	return omap_cf_set_socket(s, &dead_socket);
	157	}
	158
	159	/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
	160
	161	static int
	162	omap_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	163	{
	164	struct omap_cf_socket *cf;
	165
	166	cf = container_of(s, struct omap_cf_socket, socket);
	167	io->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	168	io->start = cf->phys_cf + SZ_4K;
	169	io->stop = io->start + SZ_2K - 1;
	170	return 0;
	171	}
	172
	173	static int
	174	omap_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
	175	{
	176	struct omap_cf_socket *cf;
	177
	178	if (map->card_start)
	179	return -EINVAL;
	180	cf = container_of(s, struct omap_cf_socket, socket);
	181	map->static_start = cf->phys_cf;
	182	map->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	183	if (map->flags & MAP_ATTRIB)
	184	map->static_start += SZ_2K;
	185	return 0;
	186	}
	187
	188	static struct pccard_operations omap_cf_ops = {
	189	.init = omap_cf_ss_init,
	190	.suspend = omap_cf_ss_suspend,
	191	.get_status = omap_cf_get_status,
	192	.set_socket = omap_cf_set_socket,
	193	.set_io_map = omap_cf_set_io_map,
	194	.set_mem_map = omap_cf_set_mem_map,
	195	};
	196
	197	/--------------------------------------------------------------------------/
	198
	199	/*
	200	* NOTE: right now the only board-specific platform_data is
	201	* "what chipselect is used". Boards could want more.
	202	*/
	203
b6d2cccb	204	static int __init omap_cf_probe(struct platform_device *pdev)
f74e48a5 DB	205	{
	206	unsigned seg;
	207	struct omap_cf_socket *cf;
f74e48a5 DB	208	int irq;
	209	int status;
	210
b6d2cccb	211	seg = (int) pdev->dev.platform_data;
f74e48a5 DB	212	if (seg == 0 \|\| seg > 3)
	213	return -ENODEV;
	214
	215	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	216	irq = platform_get_irq(pdev, 0);
48944738	217	if (irq < 0)
f74e48a5 DB	218	return -EINVAL;
f74e48a5 DB	219
cd861280	220	cf = kzalloc(sizeof *cf, GFP_KERNEL);
f74e48a5 DB	221	if (!cf)
	222	return -ENOMEM;
	223	init_timer(&cf->timer);
	224	cf->timer.function = omap_cf_timer;
	225	cf->timer.data = (unsigned long) cf;
	226
	227	cf->pdev = pdev;
b6d2cccb	228	platform_set_drvdata(pdev, cf);
f74e48a5 DB	229
f74e48a5 DB	230	/* this primarily just shuts up irq handling noise */
dace1453	231	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
f74e48a5 DB	232	driver_name, cf);
	233	if (status < 0)
	234	goto fail0;
	235	cf->irq = irq;
	236	cf->socket.pci_irq = irq;
	237
	238	switch (seg) {
	239	/* NOTE: CS0 could be configured too ... */
	240	case 1:
	241	cf->phys_cf = OMAP_CS1_PHYS;
	242	break;
	243	case 2:
	244	cf->phys_cf = OMAP_CS2_PHYS;
	245	break;
	246	case 3:
	247	cf->phys_cf = omap_cs3_phys();
	248	break;
	249	default:
	250	goto fail1;
	251	}
dcb9c392 DB	252	cf->iomem.start = cf->phys_cf;
	253	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	254	cf->iomem.flags = IORESOURCE_MEM;
f74e48a5 DB	255
	256	/* pcmcia layer only remaps "real" memory */
	257	cf->socket.io_offset = (unsigned long)
	258	ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	259	if (!cf->socket.io_offset)
	260	goto fail1;
	261
	262	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
	263	goto fail1;
	264
	265	/* NOTE: CF conflicts with MMC1 */
	266	omap_cfg_reg(W11_1610_CF_CD1);
	267	omap_cfg_reg(P11_1610_CF_CD2);
	268	omap_cfg_reg(R11_1610_CF_IOIS16);
	269	omap_cfg_reg(V10_1610_CF_IREQ);
	270	omap_cfg_reg(W10_1610_CF_RESET);
	271
030b1545	272	omap_writew(~(1 << seg), CF_CFG);
f74e48a5 DB	273
	274	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
	275
	276	/* NOTE: better EMIFS setup might support more cards; but the
	277	* TRM only shows how to affect regular flash signals, not their
	278	* CF/PCMCIA variants...
	279	*/
	280	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
030b1545 TL	281	seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	282	omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
	283	omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
f74e48a5 DB	284
	285	/* CF uses armxor_ck, which is "always" available */
	286
	287	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
030b1545 TL	288	omap_readw(CF_STATUS), omap_readw(CF_CFG),
030b1545 TL	289	omap_readw(CF_CONTROL),
f74e48a5 DB	290	omap_cf_present() ? "present" : "(not present)");
	291
	292	cf->socket.owner = THIS_MODULE;
b6d2cccb	293	cf->socket.dev.parent = &pdev->dev;
f74e48a5 DB	294	cf->socket.ops = &omap_cf_ops;
	295	cf->socket.resource_ops = &pccard_static_ops;
	296	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	297	\| SS_CAP_MEM_ALIGN;
	298	cf->socket.map_size = SZ_2K;
dcb9c392	299	cf->socket.io[0].res = &cf->iomem;
f74e48a5 DB	300
	301	status = pcmcia_register_socket(&cf->socket);
	302	if (status < 0)
	303	goto fail2;
	304
	305	cf->active = 1;
	306	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	307	return 0;
	308
	309	fail2:
f74e48a5 DB	310	release_mem_region(cf->phys_cf, SZ_8K);
f74e48a5 DB	311	fail1:
3efa9970 AL	312	if (cf->socket.io_offset)
3efa9970 AL	313	iounmap((void __iomem *) cf->socket.io_offset);
f74e48a5 DB	314	free_irq(irq, cf);
	315	fail0:
	316	kfree(cf);
	317	return status;
	318	}
	319
b6d2cccb	320	static int __exit omap_cf_remove(struct platform_device *pdev)
f74e48a5	321	{
b6d2cccb	322	struct omap_cf_socket *cf = platform_get_drvdata(pdev);
f74e48a5 DB	323
	324	cf->active = 0;
	325	pcmcia_unregister_socket(&cf->socket);
	326	del_timer_sync(&cf->timer);
	327	iounmap((void __iomem *) cf->socket.io_offset);
	328	release_mem_region(cf->phys_cf, SZ_8K);
	329	free_irq(cf->irq, cf);
	330	kfree(cf);
	331	return 0;
	332	}
	333
b6d2cccb DB	334	static struct platform_driver omap_cf_driver = {
	335	.driver = {
	336	.name = (char *) driver_name,
12c2c019	337	.owner = THIS_MODULE,
b6d2cccb DB	338	},
b6d2cccb DB	339	.remove = __exit_p(omap_cf_remove),
f74e48a5 DB	340	};
	341
	342	static int __init omap_cf_init(void)
	343	{
	344	if (cpu_is_omap16xx())
b6d2cccb	345	return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
dcb9c392	346	return -ENODEV;
f74e48a5 DB	347	}
	348
	349	static void __exit omap_cf_exit(void)
	350	{
	351	if (cpu_is_omap16xx())
b6d2cccb	352	platform_driver_unregister(&omap_cf_driver);
f74e48a5 DB	353	}
	354
	355	module_init(omap_cf_init);
	356	module_exit(omap_cf_exit);
	357
	358	MODULE_DESCRIPTION("OMAP CF Driver");
	359	MODULE_LICENSE("GPL");
12c2c019	360	MODULE_ALIAS("platform:omap_cf");