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iwlagn: parsing uart message and take actions
[linux.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
1f447808 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
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9 *
10 * This program is free software; you can redistribute it and/or modify
01ebd063 11 * it under the terms of version 2 of the GNU General Public License as
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12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
759ef89f 28 * Intel Linux Wireless <[email protected]>
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29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
1f447808 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
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34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
fcd427bb 63/*
5a36ba0e 64 * Please use this file (iwl-commands.h) only for uCode API definitions.
767d055d 65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
3e0d4cb1 66 * Please use iwl-dev.h for driver implementation definitions.
fcd427bb 67 */
b481de9c 68
6a63578d
EG
69#ifndef __iwl_commands_h__
70#define __iwl_commands_h__
b481de9c 71
a3139c59
SO
72struct iwl_priv;
73
c02b3acd
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74/* uCode version contains 4 values: Major/Minor/API/Serial */
75#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
76#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
77#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
78#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
79
4c897253
TW
80
81/* Tx rates */
82#define IWL_CCK_RATES 4
83#define IWL_OFDM_RATES 8
84#define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES)
85
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86enum {
87 REPLY_ALIVE = 0x1,
88 REPLY_ERROR = 0x2,
89
90 /* RXON and QOS commands */
91 REPLY_RXON = 0x10,
92 REPLY_RXON_ASSOC = 0x11,
93 REPLY_QOS_PARAM = 0x13,
94 REPLY_RXON_TIMING = 0x14,
95
96 /* Multi-Station support */
97 REPLY_ADD_STA = 0x18,
fc66be2a 98 REPLY_REMOVE_STA = 0x19,
b481de9c 99 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
947279ee 100 REPLY_TXFIFO_FLUSH = 0x1e,
b481de9c 101
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102 /* Security */
103 REPLY_WEPKEY = 0x20,
104
b481de9c 105 /* RX, TX, LEDs */
2aa6ab86 106 REPLY_3945_RX = 0x1b, /* 3945 only */
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107 REPLY_TX = 0x1c,
108 REPLY_RATE_SCALE = 0x47, /* 3945 only */
109 REPLY_LEDS_CMD = 0x48,
4c8d1913 110 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */
b481de9c 111
9636e583 112 /* WiMAX coexistence */
d23000cd 113 COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */
9636e583
RR
114 COEX_MEDIUM_NOTIFICATION = 0x5b,
115 COEX_EVENT_CMD = 0x5c,
116
be5d56ed 117 /* Calibration */
1a5c3d61 118 TEMPERATURE_NOTIFICATION = 0x62,
be5d56ed
TW
119 CALIBRATION_CFG_CMD = 0x65,
120 CALIBRATION_RES_NOTIFICATION = 0x66,
121 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
122
b481de9c 123 /* 802.11h related */
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124 REPLY_QUIET_CMD = 0x71, /* not used */
125 REPLY_CHANNEL_SWITCH = 0x72,
126 CHANNEL_SWITCH_NOTIFICATION = 0x73,
127 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
128 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
129
130 /* Power Management */
131 POWER_TABLE_CMD = 0x77,
132 PM_SLEEP_NOTIFICATION = 0x7A,
133 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
134
135 /* Scan commands and notifications */
136 REPLY_SCAN_CMD = 0x80,
137 REPLY_SCAN_ABORT_CMD = 0x81,
138 SCAN_START_NOTIFICATION = 0x82,
139 SCAN_RESULTS_NOTIFICATION = 0x83,
140 SCAN_COMPLETE_NOTIFICATION = 0x84,
141
142 /* IBSS/AP commands */
143 BEACON_NOTIFICATION = 0x90,
144 REPLY_TX_BEACON = 0x91,
145 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
146
147 /* Miscellaneous commands */
76a2407a 148 REPLY_TX_POWER_DBM_CMD = 0x95,
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149 QUIET_NOTIFICATION = 0x96, /* not used */
150 REPLY_TX_PWR_TABLE_CMD = 0x97,
76a2407a 151 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
2f748dec 152 TX_ANT_CONFIGURATION_CMD = 0x98,
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153 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
154
a96a27f9 155 /* Bluetooth device coexistence config command */
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156 REPLY_BT_CONFIG = 0x9b,
157
80cc0c38 158 /* Statistics */
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159 REPLY_STATISTICS_CMD = 0x9c,
160 STATISTICS_NOTIFICATION = 0x9d,
161
162 /* RF-KILL commands and notifications */
163 REPLY_CARD_STATE_CMD = 0xa0,
164 CARD_STATE_NOTIFICATION = 0xa1,
165
166 /* Missed beacons notification */
167 MISSED_BEACONS_NOTIFICATION = 0xa2,
168
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169 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
170 SENSITIVITY_CMD = 0xa8,
171 REPLY_PHY_CALIBRATION_CMD = 0xb0,
172 REPLY_RX_PHY_CMD = 0xc0,
173 REPLY_RX_MPDU_CMD = 0xc1,
857485c0 174 REPLY_RX = 0xc3,
b481de9c 175 REPLY_COMPRESSED_BA = 0xc5,
0288d237
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176
177 /* BT Coex */
178 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
179 REPLY_BT_COEX_PROT_ENV = 0xcd,
180 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
9e4afc21 181 REPLY_BT_COEX_SCO = 0xcf,
0288d237 182
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183 REPLY_MAX = 0xff
184};
185
186/******************************************************************************
187 * (0)
abceddb4 188 * Commonly used structures and definitions:
80cc0c38 189 * Command header, rate_n_flags, txpower
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190 *
191 *****************************************************************************/
192
857485c0 193/* iwl_cmd_header flags value */
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194#define IWL_CMD_FAILED_MSK 0x40
195
9734cb23
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196#define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f)
197#define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
198#define SEQ_TO_INDEX(s) ((s) & 0xff)
199#define INDEX_TO_SEQ(i) ((i) & 0xff)
51e9bf5d
HH
200#define SEQ_HUGE_FRAME cpu_to_le16(0x4000)
201#define SEQ_RX_FRAME cpu_to_le16(0x8000)
9734cb23 202
075416cd 203/**
857485c0 204 * struct iwl_cmd_header
075416cd
BC
205 *
206 * This header format appears in the beginning of each command sent from the
207 * driver, and each response/notification received from uCode.
208 */
857485c0 209struct iwl_cmd_header {
075416cd 210 u8 cmd; /* Command ID: REPLY_RXON, etc. */
9734cb23 211 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */
075416cd 212 /*
a96a27f9 213 * The driver sets up the sequence number to values of its choosing.
075416cd
BC
214 * uCode does not use this value, but passes it back to the driver
215 * when sending the response to each driver-originated command, so
216 * the driver can match the response to the command. Since the values
217 * don't get used by uCode, the driver may set up an arbitrary format.
b481de9c 218 *
075416cd
BC
219 * There is one exception: uCode sets bit 15 when it originates
220 * the response/notification, i.e. when the response/notification
221 * is not a direct response to a command sent by the driver. For
222 * example, uCode issues REPLY_3945_RX when it sends a received frame
223 * to the driver; it is not a direct response to any driver command.
b481de9c 224 *
075416cd
BC
225 * The Linux driver uses the following format:
226 *
9734cb23
TW
227 * 0:7 tfd index - position within TX queue
228 * 8:12 TX queue id
229 * 13 reserved
230 * 14 huge - driver sets this to indicate command is in the
231 * 'huge' storage at the end of the command buffers
232 * 15 unsolicited RX or uCode-originated notification
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233 */
234 __le16 sequence;
235
075416cd 236 /* command or response/notification data follows immediately */
b481de9c 237 u8 data[0];
ba2d3587 238} __packed;
b481de9c 239
3d24a9f7
TW
240
241/**
242 * struct iwl3945_tx_power
243 *
244 * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_SCAN_CMD, REPLY_CHANNEL_SWITCH
245 *
246 * Each entry contains two values:
247 * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained
248 * linear value that multiplies the output of the digital signal processor,
249 * before being sent to the analog radio.
250 * 2) Radio gain. This sets the analog gain of the radio Tx path.
251 * It is a coarser setting, and behaves in a logarithmic (dB) fashion.
252 *
253 * Driver obtains values from struct iwl3945_tx_power power_gain_table[][].
254 */
255struct iwl3945_tx_power {
256 u8 tx_gain; /* gain for analog radio */
257 u8 dsp_atten; /* gain for DSP */
ba2d3587 258} __packed;
3d24a9f7
TW
259
260/**
261 * struct iwl3945_power_per_rate
262 *
263 * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
264 */
265struct iwl3945_power_per_rate {
266 u8 rate; /* plcp */
267 struct iwl3945_tx_power tpc;
268 u8 reserved;
ba2d3587 269} __packed;
3d24a9f7 270
abceddb4 271/**
5c5aa3f1 272 * iwlagn rate_n_flags bit fields
abceddb4 273 *
5c5aa3f1 274 * rate_n_flags format is used in following iwlagn commands:
857485c0 275 * REPLY_RX (response only)
5c5aa3f1 276 * REPLY_RX_MPDU (response only)
abceddb4
BC
277 * REPLY_TX (both command and response)
278 * REPLY_TX_LINK_QUALITY_CMD
279 *
280 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
281 * 2-0: 0) 6 Mbps
282 * 1) 12 Mbps
283 * 2) 18 Mbps
284 * 3) 24 Mbps
285 * 4) 36 Mbps
286 * 5) 48 Mbps
287 * 6) 54 Mbps
288 * 7) 60 Mbps
289 *
5c5aa3f1 290 * 4-3: 0) Single stream (SISO)
abceddb4 291 * 1) Dual stream (MIMO)
5c5aa3f1 292 * 2) Triple stream (MIMO)
abceddb4 293 *
7aafef1c 294 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
abceddb4
BC
295 *
296 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
297 * 3-0: 0xD) 6 Mbps
298 * 0xF) 9 Mbps
299 * 0x5) 12 Mbps
300 * 0x7) 18 Mbps
301 * 0x9) 24 Mbps
302 * 0xB) 36 Mbps
303 * 0x1) 48 Mbps
304 * 0x3) 54 Mbps
305 *
306 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
10617879 307 * 6-0: 10) 1 Mbps
abceddb4
BC
308 * 20) 2 Mbps
309 * 55) 5.5 Mbps
310 * 110) 11 Mbps
311 */
312#define RATE_MCS_CODE_MSK 0x7
5c5aa3f1
HD
313#define RATE_MCS_SPATIAL_POS 3
314#define RATE_MCS_SPATIAL_MSK 0x18
abceddb4
BC
315#define RATE_MCS_HT_DUP_POS 5
316#define RATE_MCS_HT_DUP_MSK 0x20
317
075416cd 318/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
abceddb4
BC
319#define RATE_MCS_FLAGS_POS 8
320#define RATE_MCS_HT_POS 8
321#define RATE_MCS_HT_MSK 0x100
322
075416cd 323/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
abceddb4
BC
324#define RATE_MCS_CCK_POS 9
325#define RATE_MCS_CCK_MSK 0x200
326
075416cd 327/* Bit 10: (1) Use Green Field preamble */
abceddb4
BC
328#define RATE_MCS_GF_POS 10
329#define RATE_MCS_GF_MSK 0x400
330
7aafef1c
WYG
331/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
332#define RATE_MCS_HT40_POS 11
333#define RATE_MCS_HT40_MSK 0x800
abceddb4 334
7aafef1c 335/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
abceddb4
BC
336#define RATE_MCS_DUP_POS 12
337#define RATE_MCS_DUP_MSK 0x1000
338
075416cd 339/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
abceddb4
BC
340#define RATE_MCS_SGI_POS 13
341#define RATE_MCS_SGI_MSK 0x2000
342
343/**
76eff18b
TW
344 * rate_n_flags Tx antenna masks
345 * 4965 has 2 transmitters
346 * 5100 has 1 transmitter B
347 * 5150 has 1 transmitter A
348 * 5300 has 3 transmitters
349 * 5350 has 3 transmitters
350 * bit14:16
abceddb4 351 */
600c0e11
TW
352#define RATE_MCS_ANT_POS 14
353#define RATE_MCS_ANT_A_MSK 0x04000
354#define RATE_MCS_ANT_B_MSK 0x08000
355#define RATE_MCS_ANT_C_MSK 0x10000
356#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
357#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
76eff18b 358#define RATE_ANT_NUM 3
80cc0c38
BC
359
360#define POWER_TABLE_NUM_ENTRIES 33
361#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
362#define POWER_TABLE_CCK_ENTRY 32
363
e57f1489
WYG
364#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
365#define IWL_PWR_CCK_ENTRIES 2
366
80cc0c38
BC
367/**
368 * union iwl4965_tx_power_dual_stream
369 *
370 * Host format used for REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
371 * Use __le32 version (struct tx_power_dual_stream) when building command.
372 *
373 * Driver provides radio gain and DSP attenuation settings to device in pairs,
374 * one value for each transmitter chain. The first value is for transmitter A,
375 * second for transmitter B.
376 *
377 * For SISO bit rates, both values in a pair should be identical.
378 * For MIMO rates, one value may be different from the other,
379 * in order to balance the Tx output between the two transmitters.
380 *
381 * See more details in doc for TXPOWER in iwl-4965-hw.h.
382 */
383union iwl4965_tx_power_dual_stream {
384 struct {
385 u8 radio_tx_gain[2];
386 u8 dsp_predis_atten[2];
387 } s;
388 u32 dw;
389};
390
391/**
392 * struct tx_power_dual_stream
393 *
394 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
395 *
396 * Same format as iwl_tx_power_dual_stream, but __le32
397 */
398struct tx_power_dual_stream {
399 __le32 dw;
ba2d3587 400} __packed;
80cc0c38
BC
401
402/**
403 * struct iwl4965_tx_power_db
404 *
405 * Entire table within REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
406 */
407struct iwl4965_tx_power_db {
408 struct tx_power_dual_stream power_tbl[POWER_TABLE_NUM_ENTRIES];
ba2d3587 409} __packed;
80cc0c38 410
630fe9b6 411/**
a96a27f9 412 * Command REPLY_TX_POWER_DBM_CMD = 0x98
630fe9b6
TW
413 * struct iwl5000_tx_power_dbm_cmd
414 */
415#define IWL50_TX_POWER_AUTO 0x7f
853554ac
GG
416#define IWL50_TX_POWER_NO_CLOSED (0x1 << 6)
417
630fe9b6
TW
418struct iwl5000_tx_power_dbm_cmd {
419 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
420 u8 flags;
421 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
422 u8 reserved;
ba2d3587 423} __packed;
80cc0c38 424
2f748dec
WYG
425/**
426 * Command TX_ANT_CONFIGURATION_CMD = 0x98
427 * This command is used to configure valid Tx antenna.
428 * By default uCode concludes the valid antenna according to the radio flavor.
429 * This command enables the driver to override/modify this conclusion.
430 */
431struct iwl_tx_ant_config_cmd {
432 __le32 valid;
ba2d3587 433} __packed;
2f748dec 434
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435/******************************************************************************
436 * (0a)
437 * Alive and Error Commands & Responses:
438 *
439 *****************************************************************************/
440
51e9bf5d 441#define UCODE_VALID_OK cpu_to_le32(0x1)
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442#define INITIALIZE_SUBTYPE (9)
443
444/*
075416cd
BC
445 * ("Initialize") REPLY_ALIVE = 0x1 (response only, not a command)
446 *
447 * uCode issues this "initialize alive" notification once the initialization
448 * uCode image has completed its work, and is ready to load the runtime image.
449 * This is the *first* "alive" notification that the driver will receive after
450 * rebooting uCode; the "initialize" alive is indicated by subtype field == 9.
451 *
452 * See comments documenting "BSM" (bootstrap state machine).
453 *
454 * For 4965, this notification contains important calibration data for
455 * calculating txpower settings:
456 *
457 * 1) Power supply voltage indication. The voltage sensor outputs higher
a96a27f9 458 * values for lower voltage, and vice verse.
075416cd
BC
459 *
460 * 2) Temperature measurement parameters, for each of two channel widths
461 * (20 MHz and 40 MHz) supported by the radios. Temperature sensing
462 * is done via one of the receiver chains, and channel width influences
463 * the results.
464 *
465 * 3) Tx gain compensation to balance 4965's 2 Tx chains for MIMO operation,
466 * for each of 5 frequency ranges.
b481de9c 467 */
885ba202 468struct iwl_init_alive_resp {
b481de9c
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469 u8 ucode_minor;
470 u8 ucode_major;
471 __le16 reserved1;
472 u8 sw_rev[8];
473 u8 ver_type;
075416cd 474 u8 ver_subtype; /* "9" for initialize alive */
b481de9c
ZY
475 __le16 reserved2;
476 __le32 log_event_table_ptr;
477 __le32 error_event_table_ptr;
478 __le32 timestamp;
479 __le32 is_valid;
075416cd
BC
480
481 /* calibration values from "initialize" uCode */
482 __le32 voltage; /* signed, higher value is lower voltage */
7aafef1c 483 __le32 therm_r1[2]; /* signed, 1st for normal, 2nd for HT40 */
075416cd
BC
484 __le32 therm_r2[2]; /* signed */
485 __le32 therm_r3[2]; /* signed */
486 __le32 therm_r4[2]; /* signed */
487 __le32 tx_atten[5][2]; /* signed MIMO gain comp, 5 freq groups,
488 * 2 Tx chains */
ba2d3587 489} __packed;
b481de9c 490
075416cd
BC
491
492/**
493 * REPLY_ALIVE = 0x1 (response only, not a command)
494 *
495 * uCode issues this "alive" notification once the runtime image is ready
496 * to receive commands from the driver. This is the *second* "alive"
497 * notification that the driver will receive after rebooting uCode;
498 * this "alive" is indicated by subtype field != 9.
499 *
500 * See comments documenting "BSM" (bootstrap state machine).
501 *
502 * This response includes two pointers to structures within the device's
503 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
504 *
505 * 1) log_event_table_ptr indicates base of the event log. This traces
506 * a 256-entry history of uCode execution within a circular buffer.
507 * Its header format is:
508 *
509 * __le32 log_size; log capacity (in number of entries)
510 * __le32 type; (1) timestamp with each entry, (0) no timestamp
511 * __le32 wraps; # times uCode has wrapped to top of circular buffer
512 * __le32 write_index; next circular buffer entry that uCode would fill
513 *
514 * The header is followed by the circular buffer of log entries. Entries
515 * with timestamps have the following format:
516 *
517 * __le32 event_id; range 0 - 1500
518 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
519 * __le32 data; event_id-specific data value
520 *
521 * Entries without timestamps contain only event_id and data.
522 *
461ef382 523 *
075416cd 524 * 2) error_event_table_ptr indicates base of the error log. This contains
461ef382 525 * information about any uCode error that occurs. For agn, the format
075416cd
BC
526 * of the error log is:
527 *
528 * __le32 valid; (nonzero) valid, (0) log is empty
529 * __le32 error_id; type of error
530 * __le32 pc; program counter
531 * __le32 blink1; branch link
532 * __le32 blink2; branch link
533 * __le32 ilink1; interrupt link
534 * __le32 ilink2; interrupt link
535 * __le32 data1; error-specific data
536 * __le32 data2; error-specific data
537 * __le32 line; source code line of error
538 * __le32 bcon_time; beacon timer
539 * __le32 tsf_low; network timestamp function timer
540 * __le32 tsf_hi; network timestamp function timer
461ef382
WYG
541 * __le32 gp1; GP1 timer register
542 * __le32 gp2; GP2 timer register
543 * __le32 gp3; GP3 timer register
544 * __le32 ucode_ver; uCode version
545 * __le32 hw_ver; HW Silicon version
546 * __le32 brd_ver; HW board version
547 * __le32 log_pc; log program counter
548 * __le32 frame_ptr; frame pointer
549 * __le32 stack_ptr; stack pointer
550 * __le32 hcmd; last host command
551 * __le32 isr0; isr status register LMPM_NIC_ISR0: rxtx_flag
552 * __le32 isr1; isr status register LMPM_NIC_ISR1: host_flag
553 * __le32 isr2; isr status register LMPM_NIC_ISR2: enc_flag
554 * __le32 isr3; isr status register LMPM_NIC_ISR3: time_flag
555 * __le32 isr4; isr status register LMPM_NIC_ISR4: wico interrupt
556 * __le32 isr_pref; isr status register LMPM_NIC_PREF_STAT
557 * __le32 wait_event; wait event() caller address
558 * __le32 l2p_control; L2pControlField
559 * __le32 l2p_duration; L2pDurationField
560 * __le32 l2p_mhvalid; L2pMhValidBits
561 * __le32 l2p_addr_match; L2pAddrMatchStat
562 * __le32 lmpm_pmg_sel; indicate which clocks are turned on (LMPM_PMG_SEL)
563 * __le32 u_timestamp; indicate when the date and time of the compilation
564 * __le32 reserved;
075416cd
BC
565 *
566 * The Linux driver can print both logs to the system log when a uCode error
567 * occurs.
568 */
885ba202 569struct iwl_alive_resp {
b481de9c
ZY
570 u8 ucode_minor;
571 u8 ucode_major;
572 __le16 reserved1;
573 u8 sw_rev[8];
574 u8 ver_type;
075416cd 575 u8 ver_subtype; /* not "9" for runtime alive */
b481de9c 576 __le16 reserved2;
075416cd
BC
577 __le32 log_event_table_ptr; /* SRAM address for event log */
578 __le32 error_event_table_ptr; /* SRAM address for error log */
b481de9c
ZY
579 __le32 timestamp;
580 __le32 is_valid;
ba2d3587 581} __packed;
b481de9c 582
b481de9c
ZY
583/*
584 * REPLY_ERROR = 0x2 (response only, not a command)
585 */
885ba202 586struct iwl_error_resp {
b481de9c
ZY
587 __le32 error_type;
588 u8 cmd_id;
589 u8 reserved1;
590 __le16 bad_cmd_seq_num;
b481de9c 591 __le32 error_info;
3195c1f3 592 __le64 timestamp;
ba2d3587 593} __packed;
b481de9c
ZY
594
595/******************************************************************************
596 * (1)
597 * RXON Commands & Responses:
598 *
599 *****************************************************************************/
600
601/*
602 * Rx config defines & structure
603 */
604/* rx_config device types */
605enum {
606 RXON_DEV_TYPE_AP = 1,
607 RXON_DEV_TYPE_ESS = 3,
608 RXON_DEV_TYPE_IBSS = 4,
609 RXON_DEV_TYPE_SNIFFER = 6,
610};
611
14519a0b 612
51e9bf5d 613#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
7b841727 614#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
51e9bf5d 615#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
14519a0b 616#define RXON_RX_CHAIN_VALID_POS (1)
51e9bf5d 617#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
14519a0b 618#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
51e9bf5d 619#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
14519a0b 620#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
51e9bf5d 621#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
14519a0b 622#define RXON_RX_CHAIN_CNT_POS (10)
51e9bf5d 623#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
14519a0b 624#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
51e9bf5d 625#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
14519a0b
BC
626#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
627
b481de9c
ZY
628/* rx_config flags */
629/* band & modulation selection */
51e9bf5d
HH
630#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
631#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
b481de9c 632/* auto detection enable */
51e9bf5d 633#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
b481de9c 634/* TGg protection when tx */
51e9bf5d 635#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
b481de9c 636/* cck short slot & preamble */
51e9bf5d
HH
637#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
638#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
b481de9c 639/* antenna selection */
51e9bf5d
HH
640#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
641#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
642#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
643#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 644/* radar detection enable */
51e9bf5d
HH
645#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
646#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
b481de9c
ZY
647/* rx response to host with 8-byte TSF
648* (according to ON_AIR deassertion) */
51e9bf5d 649#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
b481de9c 650
14519a0b
BC
651
652/* HT flags */
653#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
51e9bf5d 654#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
14519a0b
BC
655
656#define RXON_FLG_HT_OPERATING_MODE_POS (23)
657
51e9bf5d 658#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
7aafef1c 659#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
14519a0b
BC
660
661#define RXON_FLG_CHANNEL_MODE_POS (25)
51e9bf5d 662#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
a2b0f02e
WYG
663
664/* channel mode */
665enum {
666 CHANNEL_MODE_LEGACY = 0,
667 CHANNEL_MODE_PURE_40 = 1,
668 CHANNEL_MODE_MIXED = 2,
669 CHANNEL_MODE_RESERVED = 3,
670};
671#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
672#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
673#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
674
a326a5d0 675/* CTS to self (if spec allows) flag */
51e9bf5d 676#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
14519a0b 677
b481de9c
ZY
678/* rx_config filter flags */
679/* accept all data frames */
51e9bf5d 680#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
b481de9c 681/* pass control & management to host */
51e9bf5d 682#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
b481de9c 683/* accept multi-cast */
51e9bf5d 684#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
b481de9c 685/* don't decrypt uni-cast frames */
51e9bf5d 686#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
b481de9c 687/* don't decrypt multi-cast frames */
51e9bf5d 688#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
b481de9c 689/* STA is associated */
51e9bf5d 690#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
b481de9c 691/* transfer to host non bssid beacons in associated state */
51e9bf5d 692#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
b481de9c 693
80cc0c38 694/**
b481de9c 695 * REPLY_RXON = 0x10 (command, has simple generic response)
80cc0c38
BC
696 *
697 * RXON tunes the radio tuner to a service channel, and sets up a number
698 * of parameters that are used primarily for Rx, but also for Tx operations.
699 *
700 * NOTE: When tuning to a new channel, driver must set the
701 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
702 * info within the device, including the station tables, tx retry
703 * rate tables, and txpower tables. Driver must build a new station
704 * table and txpower table before transmitting anything on the RXON
705 * channel.
706 *
707 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
708 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
709 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
b481de9c 710 */
3d24a9f7
TW
711
712struct iwl3945_rxon_cmd {
713 u8 node_addr[6];
714 __le16 reserved1;
715 u8 bssid_addr[6];
716 __le16 reserved2;
717 u8 wlap_bssid_addr[6];
718 __le16 reserved3;
719 u8 dev_type;
720 u8 air_propagation;
721 __le16 reserved4;
722 u8 ofdm_basic_rates;
723 u8 cck_basic_rates;
724 __le16 assoc_id;
725 __le32 flags;
726 __le32 filter_flags;
727 __le16 channel;
728 __le16 reserved5;
ba2d3587 729} __packed;
3d24a9f7 730
bb8c093b 731struct iwl4965_rxon_cmd {
b481de9c
ZY
732 u8 node_addr[6];
733 __le16 reserved1;
734 u8 bssid_addr[6];
735 __le16 reserved2;
736 u8 wlap_bssid_addr[6];
737 __le16 reserved3;
738 u8 dev_type;
739 u8 air_propagation;
b481de9c 740 __le16 rx_chain;
b481de9c
ZY
741 u8 ofdm_basic_rates;
742 u8 cck_basic_rates;
743 __le16 assoc_id;
744 __le32 flags;
745 __le32 filter_flags;
746 __le16 channel;
b481de9c
ZY
747 u8 ofdm_ht_single_stream_basic_rates;
748 u8 ofdm_ht_dual_stream_basic_rates;
ba2d3587 749} __packed;
b481de9c 750
a96a27f9 751/* 5000 HW just extend this command */
c1adf9fb
GG
752struct iwl_rxon_cmd {
753 u8 node_addr[6];
754 __le16 reserved1;
755 u8 bssid_addr[6];
756 __le16 reserved2;
757 u8 wlap_bssid_addr[6];
758 __le16 reserved3;
759 u8 dev_type;
760 u8 air_propagation;
761 __le16 rx_chain;
762 u8 ofdm_basic_rates;
763 u8 cck_basic_rates;
764 __le16 assoc_id;
765 __le32 flags;
766 __le32 filter_flags;
767 __le16 channel;
768 u8 ofdm_ht_single_stream_basic_rates;
769 u8 ofdm_ht_dual_stream_basic_rates;
770 u8 ofdm_ht_triple_stream_basic_rates;
771 u8 reserved5;
772 __le16 acquisition_data;
773 __le16 reserved6;
ba2d3587 774} __packed;
c1adf9fb 775
3d24a9f7
TW
776/*
777 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
778 */
779struct iwl3945_rxon_assoc_cmd {
780 __le32 flags;
781 __le32 filter_flags;
782 u8 ofdm_basic_rates;
783 u8 cck_basic_rates;
784 __le16 reserved;
ba2d3587 785} __packed;
3d24a9f7
TW
786
787struct iwl4965_rxon_assoc_cmd {
fe7a90c2
RR
788 __le32 flags;
789 __le32 filter_flags;
790 u8 ofdm_basic_rates;
791 u8 cck_basic_rates;
fe7a90c2
RR
792 u8 ofdm_ht_single_stream_basic_rates;
793 u8 ofdm_ht_dual_stream_basic_rates;
fe7a90c2 794 __le16 rx_chain_select_flags;
3d24a9f7 795 __le16 reserved;
ba2d3587 796} __packed;
c1adf9fb 797
3d24a9f7 798struct iwl5000_rxon_assoc_cmd {
b481de9c
ZY
799 __le32 flags;
800 __le32 filter_flags;
801 u8 ofdm_basic_rates;
802 u8 cck_basic_rates;
3d24a9f7 803 __le16 reserved1;
b481de9c
ZY
804 u8 ofdm_ht_single_stream_basic_rates;
805 u8 ofdm_ht_dual_stream_basic_rates;
3d24a9f7
TW
806 u8 ofdm_ht_triple_stream_basic_rates;
807 u8 reserved2;
b481de9c 808 __le16 rx_chain_select_flags;
3d24a9f7
TW
809 __le16 acquisition_data;
810 __le32 reserved3;
ba2d3587 811} __packed;
b481de9c 812
b5d7be5e 813#define IWL_CONN_MAX_LISTEN_INTERVAL 10
2c2f3b33
TW
814#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
815#define IWL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */
fe7a90c2 816
b481de9c
ZY
817/*
818 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
819 */
3195c1f3
TW
820struct iwl_rxon_time_cmd {
821 __le64 timestamp;
b481de9c
ZY
822 __le16 beacon_interval;
823 __le16 atim_window;
824 __le32 beacon_init_val;
825 __le16 listen_interval;
826 __le16 reserved;
ba2d3587 827} __packed;
b481de9c 828
b481de9c
ZY
829/*
830 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
831 */
3d24a9f7
TW
832struct iwl3945_channel_switch_cmd {
833 u8 band;
834 u8 expect_beacon;
835 __le16 channel;
836 __le32 rxon_flags;
837 __le32 rxon_filter_flags;
838 __le32 switch_time;
839 struct iwl3945_power_per_rate power[IWL_MAX_RATES];
ba2d3587 840} __packed;
3d24a9f7 841
e57f1489 842struct iwl4965_channel_switch_cmd {
b481de9c
ZY
843 u8 band;
844 u8 expect_beacon;
845 __le16 channel;
846 __le32 rxon_flags;
847 __le32 rxon_filter_flags;
848 __le32 switch_time;
bb8c093b 849 struct iwl4965_tx_power_db tx_power;
ba2d3587 850} __packed;
b481de9c 851
e57f1489
WYG
852/**
853 * struct iwl5000_channel_switch_cmd
854 * @band: 0- 5.2GHz, 1- 2.4GHz
855 * @expect_beacon: 0- resume transmits after channel switch
856 * 1- wait for beacon to resume transmits
857 * @channel: new channel number
858 * @rxon_flags: Rx on flags
859 * @rxon_filter_flags: filtering parameters
860 * @switch_time: switch time in extended beacon format
861 * @reserved: reserved bytes
862 */
863struct iwl5000_channel_switch_cmd {
864 u8 band;
865 u8 expect_beacon;
866 __le16 channel;
867 __le32 rxon_flags;
868 __le32 rxon_filter_flags;
869 __le32 switch_time;
870 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 871} __packed;
e57f1489
WYG
872
873/**
874 * struct iwl6000_channel_switch_cmd
875 * @band: 0- 5.2GHz, 1- 2.4GHz
876 * @expect_beacon: 0- resume transmits after channel switch
877 * 1- wait for beacon to resume transmits
878 * @channel: new channel number
879 * @rxon_flags: Rx on flags
880 * @rxon_filter_flags: filtering parameters
881 * @switch_time: switch time in extended beacon format
882 * @reserved: reserved bytes
883 */
884struct iwl6000_channel_switch_cmd {
885 u8 band;
886 u8 expect_beacon;
887 __le16 channel;
888 __le32 rxon_flags;
889 __le32 rxon_filter_flags;
890 __le32 switch_time;
891 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 892} __packed;
e57f1489 893
b481de9c
ZY
894/*
895 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
896 */
2aa6ab86 897struct iwl_csa_notification {
b481de9c
ZY
898 __le16 band;
899 __le16 channel;
900 __le32 status; /* 0 - OK, 1 - fail */
ba2d3587 901} __packed;
b481de9c
ZY
902
903/******************************************************************************
904 * (2)
905 * Quality-of-Service (QOS) Commands & Responses:
906 *
907 *****************************************************************************/
2054a00b
BC
908
909/**
910 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
911 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
912 *
913 * @cw_min: Contention window, start value in numbers of slots.
914 * Should be a power-of-2, minus 1. Device's default is 0x0f.
915 * @cw_max: Contention window, max value in numbers of slots.
916 * Should be a power-of-2, minus 1. Device's default is 0x3f.
917 * @aifsn: Number of slots in Arbitration Interframe Space (before
918 * performing random backoff timing prior to Tx). Device default 1.
919 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
920 *
921 * Device will automatically increase contention window by (2*CW) + 1 for each
922 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
923 * value, to cap the CW value.
924 */
1ff50bda 925struct iwl_ac_qos {
b481de9c
ZY
926 __le16 cw_min;
927 __le16 cw_max;
928 u8 aifsn;
929 u8 reserved1;
930 __le16 edca_txop;
ba2d3587 931} __packed;
b481de9c
ZY
932
933/* QoS flags defines */
51e9bf5d
HH
934#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
935#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
936#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
b481de9c 937
2054a00b 938/* Number of Access Categories (AC) (EDCA), queues 0..3 */
b481de9c
ZY
939#define AC_NUM 4
940
941/*
942 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
2054a00b
BC
943 *
944 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
945 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
b481de9c 946 */
1ff50bda 947struct iwl_qosparam_cmd {
b481de9c 948 __le32 qos_flags;
1ff50bda 949 struct iwl_ac_qos ac[AC_NUM];
ba2d3587 950} __packed;
b481de9c
ZY
951
952/******************************************************************************
953 * (3)
954 * Add/Modify Stations Commands & Responses:
955 *
956 *****************************************************************************/
957/*
958 * Multi station support
959 */
2054a00b
BC
960
961/* Special, dedicated locations within device's station table */
b481de9c 962#define IWL_AP_ID 0
b481de9c 963#define IWL_STA_ID 2
4c897253
TW
964#define IWL3945_BROADCAST_ID 24
965#define IWL3945_STATION_COUNT 25
b481de9c
ZY
966#define IWL4965_BROADCAST_ID 31
967#define IWL4965_STATION_COUNT 32
bf3c7fdd
WYG
968#define IWLAGN_BROADCAST_ID 15
969#define IWLAGN_STATION_COUNT 16
b481de9c
ZY
970
971#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/
972#define IWL_INVALID_STATION 255
973
1bd14eaf
JB
974#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
975#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
51e9bf5d
HH
976#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
977#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
74093ddf 978#define STA_FLG_MAX_AGG_SIZE_POS (19)
51e9bf5d 979#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
7aafef1c 980#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
51e9bf5d 981#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
74093ddf 982#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
51e9bf5d 983#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
b481de9c 984
2054a00b 985/* Use in mode field. 1: modify existing entry, 0: add new station entry */
b481de9c
ZY
986#define STA_CONTROL_MODIFY_MSK 0x01
987
988/* key flags __le16*/
51e9bf5d
HH
989#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
990#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
991#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
992#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
993#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
b481de9c
ZY
994
995#define STA_KEY_FLG_KEYID_POS 8
51e9bf5d 996#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
eaaf7894 997/* wep key is either from global key (0) or from station info array (1) */
51e9bf5d 998#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
eaaf7894
EG
999
1000/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
51e9bf5d
HH
1001#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
1002#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
deb09c43 1003#define STA_KEY_MAX_NUM 8
b481de9c 1004
2054a00b 1005/* Flags indicate whether to modify vs. don't change various station params */
b481de9c
ZY
1006#define STA_MODIFY_KEY_MASK 0x01
1007#define STA_MODIFY_TID_DISABLE_TX 0x02
1008#define STA_MODIFY_TX_RATE_MSK 0x04
1009#define STA_MODIFY_ADDBA_TID_MSK 0x08
1010#define STA_MODIFY_DELBA_TID_MSK 0x10
6ab10ff8 1011#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
2054a00b
BC
1012
1013/* Receiver address (actually, Rx station's index into station table),
1014 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
b481de9c
ZY
1015#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
1016
bb8c093b 1017struct iwl4965_keyinfo {
b481de9c
ZY
1018 __le16 key_flags;
1019 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
1020 u8 reserved1;
1021 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
eaaf7894
EG
1022 u8 key_offset;
1023 u8 reserved2;
b481de9c 1024 u8 key[16]; /* 16-byte unicast decryption key */
ba2d3587 1025} __packed;
b481de9c 1026
133636de
TW
1027/* 5000 */
1028struct iwl_keyinfo {
1029 __le16 key_flags;
1030 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
1031 u8 reserved1;
1032 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
1033 u8 key_offset;
1034 u8 reserved2;
1035 u8 key[16]; /* 16-byte unicast decryption key */
1036 __le64 tx_secur_seq_cnt;
1037 __le64 hw_tkip_mic_rx_key;
1038 __le64 hw_tkip_mic_tx_key;
ba2d3587 1039} __packed;
133636de 1040
2054a00b
BC
1041/**
1042 * struct sta_id_modify
1043 * @addr[ETH_ALEN]: station's MAC address
1044 * @sta_id: index of station in uCode's station table
1045 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
1046 *
1047 * Driver selects unused table index when adding new station,
1048 * or the index to a pre-existing station entry when modifying that station.
1049 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
1050 *
1051 * modify_mask flags select which parameters to modify vs. leave alone.
1052 */
b481de9c
ZY
1053struct sta_id_modify {
1054 u8 addr[ETH_ALEN];
1055 __le16 reserved1;
1056 u8 sta_id;
1057 u8 modify_mask;
1058 __le16 reserved2;
ba2d3587 1059} __packed;
b481de9c
ZY
1060
1061/*
1062 * REPLY_ADD_STA = 0x18 (command)
2054a00b
BC
1063 *
1064 * The device contains an internal table of per-station information,
1065 * with info on security keys, aggregation parameters, and Tx rates for
767d055d
WYG
1066 * initial Tx attempt and any retries (agn devices uses
1067 * REPLY_TX_LINK_QUALITY_CMD,
2054a00b
BC
1068 * 3945 uses REPLY_RATE_SCALE to set up rate tables).
1069 *
1070 * REPLY_ADD_STA sets up the table entry for one station, either creating
1071 * a new entry, or modifying a pre-existing one.
1072 *
1073 * NOTE: RXON command (without "associated" bit set) wipes the station table
1074 * clean. Moving into RF_KILL state does this also. Driver must set up
1075 * new station table before transmitting anything on the RXON channel
1076 * (except active scans or active measurements; those commands carry
1077 * their own txpower/rate setup data).
1078 *
1079 * When getting started on a new channel, driver must set up the
1080 * IWL_BROADCAST_ID entry (last entry in the table). For a client
1081 * station in a BSS, once an AP is selected, driver sets up the AP STA
1082 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
1083 * are all that are needed for a BSS client station. If the device is
1084 * used as AP, or in an IBSS network, driver must set up station table
1085 * entries for all STAs in network, starting with index IWL_STA_ID.
b481de9c 1086 */
3d24a9f7
TW
1087
1088struct iwl3945_addsta_cmd {
1089 u8 mode; /* 1: modify existing, 0: add new station */
1090 u8 reserved[3];
1091 struct sta_id_modify sta;
1092 struct iwl4965_keyinfo key;
1093 __le32 station_flags; /* STA_FLG_* */
1094 __le32 station_flags_msk; /* STA_FLG_* */
1095
1096 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
1097 * corresponding to bit (e.g. bit 5 controls TID 5).
1098 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
1099 __le16 tid_disable_tx;
1100
1101 __le16 rate_n_flags;
1102
1103 /* TID for which to add block-ack support.
1104 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1105 u8 add_immediate_ba_tid;
1106
1107 /* TID for which to remove block-ack support.
1108 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
1109 u8 remove_immediate_ba_tid;
1110
1111 /* Starting Sequence Number for added block-ack support.
1112 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1113 __le16 add_immediate_ba_ssn;
ba2d3587 1114} __packed;
3d24a9f7 1115
bb8c093b 1116struct iwl4965_addsta_cmd {
2054a00b 1117 u8 mode; /* 1: modify existing, 0: add new station */
b481de9c
ZY
1118 u8 reserved[3];
1119 struct sta_id_modify sta;
bb8c093b 1120 struct iwl4965_keyinfo key;
2054a00b
BC
1121 __le32 station_flags; /* STA_FLG_* */
1122 __le32 station_flags_msk; /* STA_FLG_* */
1123
1124 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
1125 * corresponding to bit (e.g. bit 5 controls TID 5).
1126 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
b481de9c 1127 __le16 tid_disable_tx;
2054a00b 1128
b481de9c 1129 __le16 reserved1;
2054a00b
BC
1130
1131 /* TID for which to add block-ack support.
1132 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
b481de9c 1133 u8 add_immediate_ba_tid;
2054a00b
BC
1134
1135 /* TID for which to remove block-ack support.
1136 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
b481de9c 1137 u8 remove_immediate_ba_tid;
2054a00b
BC
1138
1139 /* Starting Sequence Number for added block-ack support.
1140 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
b481de9c 1141 __le16 add_immediate_ba_ssn;
2054a00b 1142
9bb487b4
JB
1143 /*
1144 * Number of packets OK to transmit to station even though
1145 * it is asleep -- used to synchronise PS-poll and u-APSD
1146 * responses while ucode keeps track of STA sleep state.
1147 */
1148 __le16 sleep_tx_count;
1149
1150 __le16 reserved2;
ba2d3587 1151} __packed;
b481de9c 1152
133636de
TW
1153/* 5000 */
1154struct iwl_addsta_cmd {
1155 u8 mode; /* 1: modify existing, 0: add new station */
1156 u8 reserved[3];
1157 struct sta_id_modify sta;
1158 struct iwl_keyinfo key;
1159 __le32 station_flags; /* STA_FLG_* */
1160 __le32 station_flags_msk; /* STA_FLG_* */
1161
1162 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
1163 * corresponding to bit (e.g. bit 5 controls TID 5).
1164 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
1165 __le16 tid_disable_tx;
1166
c587de0b 1167 __le16 rate_n_flags; /* 3945 only */
133636de
TW
1168
1169 /* TID for which to add block-ack support.
1170 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1171 u8 add_immediate_ba_tid;
1172
1173 /* TID for which to remove block-ack support.
1174 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
1175 u8 remove_immediate_ba_tid;
1176
1177 /* Starting Sequence Number for added block-ack support.
1178 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1179 __le16 add_immediate_ba_ssn;
1180
9bb487b4
JB
1181 /*
1182 * Number of packets OK to transmit to station even though
1183 * it is asleep -- used to synchronise PS-poll and u-APSD
1184 * responses while ucode keeps track of STA sleep state.
1185 */
1186 __le16 sleep_tx_count;
1187
1188 __le16 reserved2;
ba2d3587 1189} __packed;
133636de
TW
1190
1191
2054a00b
BC
1192#define ADD_STA_SUCCESS_MSK 0x1
1193#define ADD_STA_NO_ROOM_IN_TABLE 0x2
1194#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
1195#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
b481de9c
ZY
1196/*
1197 * REPLY_ADD_STA = 0x18 (response)
1198 */
7a999bf0 1199struct iwl_add_sta_resp {
2054a00b 1200 u8 status; /* ADD_STA_* */
ba2d3587 1201} __packed;
b481de9c 1202
7a999bf0
TW
1203#define REM_STA_SUCCESS_MSK 0x1
1204/*
1205 * REPLY_REM_STA = 0x19 (response)
1206 */
1207struct iwl_rem_sta_resp {
1208 u8 status;
ba2d3587 1209} __packed;
7a999bf0
TW
1210
1211/*
1212 * REPLY_REM_STA = 0x19 (command)
1213 */
1214struct iwl_rem_sta_cmd {
1215 u8 num_sta; /* number of removed stations */
1216 u8 reserved[3];
1217 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
1218 u8 reserved2[2];
ba2d3587 1219} __packed;
7a999bf0 1220
947279ee
WYG
1221#define IWL_TX_FIFO_BK_MSK cpu_to_le32(BIT(0))
1222#define IWL_TX_FIFO_BE_MSK cpu_to_le32(BIT(1))
1223#define IWL_TX_FIFO_VI_MSK cpu_to_le32(BIT(2))
1224#define IWL_TX_FIFO_VO_MSK cpu_to_le32(BIT(3))
1225#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
1226
716c74b0
WYG
1227#define IWL_DROP_SINGLE 0
1228#define IWL_DROP_SELECTED 1
1229#define IWL_DROP_ALL 2
1230
947279ee
WYG
1231/*
1232 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
1233 *
1234 * When using full FIFO flush this command checks the scheduler HW block WR/RD
1235 * pointers to check if all the frames were transferred by DMA into the
1236 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
1237 * empty the command can finish.
1238 * This command is used to flush the TXFIFO from transmit commands, it may
1239 * operate on single or multiple queues, the command queue can't be flushed by
1240 * this command. The command response is returned when all the queue flush
1241 * operations are done. Each TX command flushed return response with the FLUSH
1242 * status set in the TX response status. When FIFO flush operation is used,
1243 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1244 * are set.
1245 *
1246 * @fifo_control: bit mask for which queues to flush
1247 * @flush_control: flush controls
1248 * 0: Dump single MSDU
1249 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1250 * 2: Dump all FIFO
1251 */
1252struct iwl_txfifo_flush_cmd {
1253 __le32 fifo_control;
1254 __le16 flush_control;
1255 __le16 reserved;
0e954099 1256} __packed;
947279ee 1257
0a0bed1d
EG
1258/*
1259 * REPLY_WEP_KEY = 0x20
1260 */
1261struct iwl_wep_key {
1262 u8 key_index;
1263 u8 key_offset;
1264 u8 reserved1[2];
1265 u8 key_size;
1266 u8 reserved2[3];
1267 u8 key[16];
ba2d3587 1268} __packed;
0a0bed1d
EG
1269
1270struct iwl_wep_cmd {
1271 u8 num_keys;
1272 u8 global_key_type;
1273 u8 flags;
1274 u8 reserved;
1275 struct iwl_wep_key key[0];
ba2d3587 1276} __packed;
0a0bed1d
EG
1277
1278#define WEP_KEY_WEP_TYPE 1
1279#define WEP_KEYS_MAX 4
1280#define WEP_INVALID_OFFSET 0xff
4564ce8b 1281#define WEP_KEY_LEN_64 5
0a0bed1d 1282#define WEP_KEY_LEN_128 13
b481de9c
ZY
1283
1284/******************************************************************************
1285 * (4)
1286 * Rx Responses:
1287 *
1288 *****************************************************************************/
1289
51e9bf5d
HH
1290#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1291#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
8211ef78 1292
51e9bf5d
HH
1293#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1294#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1295#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1296#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
9024adf5 1297#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
9f30e04e 1298#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
8211ef78
TW
1299
1300#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1301#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1302#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1303#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1304#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
17e476b8
EG
1305#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1306
1307#define RX_RES_STATUS_STATION_FOUND (1<<6)
1308#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
8211ef78
TW
1309
1310#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1311#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1312#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1313#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1314#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
b481de9c 1315
17e476b8
EG
1316#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1317#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1318#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1319#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1320
3d24a9f7
TW
1321
1322struct iwl3945_rx_frame_stats {
1323 u8 phy_count;
1324 u8 id;
1325 u8 rssi;
1326 u8 agc;
1327 __le16 sig_avg;
1328 __le16 noise_diff;
1329 u8 payload[0];
ba2d3587 1330} __packed;
3d24a9f7
TW
1331
1332struct iwl3945_rx_frame_hdr {
1333 __le16 channel;
1334 __le16 phy_flags;
1335 u8 reserved1;
1336 u8 rate;
1337 __le16 len;
1338 u8 payload[0];
ba2d3587 1339} __packed;
3d24a9f7
TW
1340
1341struct iwl3945_rx_frame_end {
1342 __le32 status;
1343 __le64 timestamp;
1344 __le32 beacon_timestamp;
ba2d3587 1345} __packed;
3d24a9f7
TW
1346
1347/*
1348 * REPLY_3945_RX = 0x1b (response only, not a command)
1349 *
1350 * NOTE: DO NOT dereference from casts to this structure
1351 * It is provided only for calculating minimum data set size.
1352 * The actual offsets of the hdr and end are dynamic based on
1353 * stats.phy_count
1354 */
1355struct iwl3945_rx_frame {
1356 struct iwl3945_rx_frame_stats stats;
1357 struct iwl3945_rx_frame_hdr hdr;
1358 struct iwl3945_rx_frame_end end;
ba2d3587 1359} __packed;
3d24a9f7
TW
1360
1361#define IWL39_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame))
1362
b481de9c 1363/* Fixed (non-configurable) rx data from phy */
caab8f1a
TW
1364
1365#define IWL49_RX_RES_PHY_CNT 14
1366#define IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET (4)
1367#define IWL49_RX_PHY_FLAGS_ANTENNAE_MASK (0x70)
1368#define IWL49_AGC_DB_MASK (0x3f80) /* MASK(7,13) */
1369#define IWL49_AGC_DB_POS (7)
b481de9c
ZY
1370struct iwl4965_rx_non_cfg_phy {
1371 __le16 ant_selection; /* ant A bit 4, ant B bit 5, ant C bit 6 */
1372 __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */
1373 u8 rssi_info[6]; /* we use even entries, 0/2/4 for A/B/C rssi */
1374 u8 pad[0];
ba2d3587 1375} __packed;
b481de9c 1376
caab8f1a 1377
7ccc896f
WYG
1378#define IWLAGN_RX_RES_PHY_CNT 8
1379#define IWLAGN_RX_RES_AGC_IDX 1
1380#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1381#define IWLAGN_RX_RES_RSSI_C_IDX 3
1382#define IWLAGN_OFDM_AGC_MSK 0xfe00
1383#define IWLAGN_OFDM_AGC_BIT_POS 9
1384#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1385#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1386#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1387#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1388#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1389#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1390#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1391#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1392#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1393
1394struct iwlagn_non_cfg_phy {
1395 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
ba2d3587 1396} __packed;
caab8f1a
TW
1397
1398
b481de9c 1399/*
857485c0 1400 * REPLY_RX = 0xc3 (response only, not a command)
b481de9c
ZY
1401 * Used only for legacy (non 11n) frames.
1402 */
caab8f1a 1403struct iwl_rx_phy_res {
b481de9c
ZY
1404 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1405 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1406 u8 stat_id; /* configurable DSP phy data set ID */
1407 u8 reserved1;
1408 __le64 timestamp; /* TSF at on air rise */
1409 __le32 beacon_time_stamp; /* beacon at on-air rise */
1410 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1411 __le16 channel; /* channel number */
caab8f1a 1412 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
52969981
BC
1413 __le32 rate_n_flags; /* RATE_MCS_* */
1414 __le16 byte_count; /* frame's byte-count */
30c1b0f7 1415 __le16 frame_time; /* frame's time on the air */
ba2d3587 1416} __packed;
b481de9c 1417
2fb291ee 1418struct iwl_rx_mpdu_res_start {
b481de9c
ZY
1419 __le16 byte_count;
1420 __le16 reserved;
ba2d3587 1421} __packed;
b481de9c
ZY
1422
1423
1424/******************************************************************************
1425 * (5)
1426 * Tx Commands & Responses:
1427 *
52969981
BC
1428 * Driver must place each REPLY_TX command into one of the prioritized Tx
1429 * queues in host DRAM, shared between driver and device (see comments for
1430 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1431 * are preparing to transmit, the device pulls the Tx command over the PCI
1432 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1433 * from which data will be transmitted.
1434 *
1435 * uCode handles all timing and protocol related to control frames
1436 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1437 * handle reception of block-acks; uCode updates the host driver via
767d055d 1438 * REPLY_COMPRESSED_BA.
52969981
BC
1439 *
1440 * uCode handles retrying Tx when an ACK is expected but not received.
1441 * This includes trying lower data rates than the one requested in the Tx
1442 * command, as set up by the REPLY_RATE_SCALE (for 3945) or
767d055d 1443 * REPLY_TX_LINK_QUALITY_CMD (agn).
52969981
BC
1444 *
1445 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1446 * This command must be executed after every RXON command, before Tx can occur.
b481de9c
ZY
1447 *****************************************************************************/
1448
52969981
BC
1449/* REPLY_TX Tx flags field */
1450
4e3243f5
WYG
1451/*
1452 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
a326a5d0 1453 * before this frame. if CTS-to-self required check
4e3243f5
WYG
1454 * RXON_FLG_SELF_CTS_EN status.
1455 * unused in 3945/4965, used in 5000 series and after
1456 */
1457#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
a326a5d0 1458
4e3243f5
WYG
1459/*
1460 * 1: Use Request-To-Send protocol before this frame.
1461 * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK.
1462 * used in 3945/4965, unused in 5000 series and after
1463 */
51e9bf5d 1464#define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
52969981 1465
4e3243f5
WYG
1466/*
1467 * 1: Transmit Clear-To-Send to self before this frame.
52969981 1468 * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
4e3243f5
WYG
1469 * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK.
1470 * used in 3945/4965, unused in 5000 series and after
1471 */
51e9bf5d 1472#define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
52969981
BC
1473
1474/* 1: Expect ACK from receiving station
1475 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1476 * Set this for unicast frames, but not broadcast/multicast. */
51e9bf5d 1477#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
52969981 1478
767d055d 1479/* For agn devices:
52969981
BC
1480 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1481 * Tx command's initial_rate_index indicates first rate to try;
1482 * uCode walks through table for additional Tx attempts.
1483 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1484 * This rate will be used for all Tx attempts; it will not be scaled. */
51e9bf5d 1485#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
52969981
BC
1486
1487/* 1: Expect immediate block-ack.
1488 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
51e9bf5d 1489#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
52969981 1490
4e3243f5
WYG
1491/*
1492 * 1: Frame requires full Tx-Op protection.
1493 * Set this if either RTS or CTS Tx Flag gets set.
1494 * used in 3945/4965, unused in 5000 series and after
1495 */
51e9bf5d 1496#define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
52969981 1497
767d055d 1498/* Tx antenna selection field; used only for 3945, reserved (0) for agn devices.
52969981 1499 * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
51e9bf5d
HH
1500#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1501#define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
1502#define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 1503
52969981
BC
1504/* 1: Ignore Bluetooth priority for this frame.
1505 * 0: Delay Tx until Bluetooth device is done (normal usage). */
b2e8690d 1506#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
b481de9c 1507
52969981
BC
1508/* 1: uCode overrides sequence control field in MAC header.
1509 * 0: Driver provides sequence control field in MAC header.
1510 * Set this for management frames, non-QOS data frames, non-unicast frames,
1511 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
51e9bf5d 1512#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
b481de9c 1513
52969981
BC
1514/* 1: This frame is non-last MPDU; more fragments are coming.
1515 * 0: Last fragment, or not using fragmentation. */
51e9bf5d 1516#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
b481de9c 1517
52969981
BC
1518/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1519 * 0: No TSF required in outgoing frame.
1520 * Set this for transmitting beacons and probe responses. */
51e9bf5d 1521#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
b481de9c 1522
52969981
BC
1523/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1524 * alignment of frame's payload data field.
1525 * 0: No pad
1526 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1527 * field (but not both). Driver must align frame data (i.e. data following
1528 * MAC header) to DWORD boundary. */
51e9bf5d 1529#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
b481de9c 1530
8236e183
MS
1531/* accelerate aggregation support
1532 * 0 - no CCMP encryption; 1 - CCMP encryption */
51e9bf5d 1533#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
8236e183 1534
b481de9c 1535/* HCCA-AP - disable duration overwriting. */
51e9bf5d 1536#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
b481de9c 1537
52969981 1538
b481de9c
ZY
1539/*
1540 * TX command security control
1541 */
1542#define TX_CMD_SEC_WEP 0x01
1543#define TX_CMD_SEC_CCM 0x02
1544#define TX_CMD_SEC_TKIP 0x03
1545#define TX_CMD_SEC_MSK 0x03
1546#define TX_CMD_SEC_SHIFT 6
1547#define TX_CMD_SEC_KEY128 0x08
1548
3195cdb7
TW
1549/*
1550 * security overhead sizes
1551 */
1552#define WEP_IV_LEN 4
1553#define WEP_ICV_LEN 4
1554#define CCMP_MIC_LEN 8
1555#define TKIP_ICV_LEN 4
1556
3d24a9f7
TW
1557/*
1558 * REPLY_TX = 0x1c (command)
1559 */
1560
1561struct iwl3945_tx_cmd {
1562 /*
1563 * MPDU byte count:
1564 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1565 * + 8 byte IV for CCM or TKIP (not used for WEP)
1566 * + Data payload
1567 * + 8-byte MIC (not used for CCM/WEP)
1568 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1569 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1570 * Range: 14-2342 bytes.
1571 */
1572 __le16 len;
1573
1574 /*
1575 * MPDU or MSDU byte count for next frame.
1576 * Used for fragmentation and bursting, but not 11n aggregation.
1577 * Same as "len", but for next frame. Set to 0 if not applicable.
1578 */
1579 __le16 next_frame_len;
1580
1581 __le32 tx_flags; /* TX_CMD_FLG_* */
1582
1583 u8 rate;
1584
1585 /* Index of recipient station in uCode's station table */
1586 u8 sta_id;
1587 u8 tid_tspec;
1588 u8 sec_ctl;
1589 u8 key[16];
1590 union {
1591 u8 byte[8];
1592 __le16 word[4];
1593 __le32 dw[2];
1594 } tkip_mic;
1595 __le32 next_frame_info;
1596 union {
1597 __le32 life_time;
1598 __le32 attempt;
1599 } stop_time;
1600 u8 supp_rates[2];
1601 u8 rts_retry_limit; /*byte 50 */
1602 u8 data_retry_limit; /*byte 51 */
1603 union {
1604 __le16 pm_frame_timeout;
1605 __le16 attempt_duration;
1606 } timeout;
1607
1608 /*
1609 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1610 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1611 */
1612 __le16 driver_txop;
1613
1614 /*
1615 * MAC header goes here, followed by 2 bytes padding if MAC header
1616 * length is 26 or 30 bytes, followed by payload data
1617 */
1618 u8 payload[0];
1619 struct ieee80211_hdr hdr[0];
ba2d3587 1620} __packed;
3d24a9f7
TW
1621
1622/*
1623 * REPLY_TX = 0x1c (response)
1624 */
1625struct iwl3945_tx_resp {
1626 u8 failure_rts;
1627 u8 failure_frame;
1628 u8 bt_kill_count;
1629 u8 rate;
1630 __le32 wireless_media_time;
1631 __le32 status; /* TX status */
ba2d3587 1632} __packed;
3d24a9f7
TW
1633
1634
b481de9c 1635/*
52969981
BC
1636 * 4965 uCode updates these Tx attempt count values in host DRAM.
1637 * Used for managing Tx retries when expecting block-acks.
1638 * Driver should set these fields to 0.
b481de9c 1639 */
2aa6ab86 1640struct iwl_dram_scratch {
52969981
BC
1641 u8 try_cnt; /* Tx attempts */
1642 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
b481de9c 1643 __le16 reserved;
ba2d3587 1644} __packed;
b481de9c 1645
83d527d9 1646struct iwl_tx_cmd {
52969981
BC
1647 /*
1648 * MPDU byte count:
1649 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1650 * + 8 byte IV for CCM or TKIP (not used for WEP)
1651 * + Data payload
1652 * + 8-byte MIC (not used for CCM/WEP)
1653 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1654 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1655 * Range: 14-2342 bytes.
1656 */
b481de9c 1657 __le16 len;
52969981
BC
1658
1659 /*
1660 * MPDU or MSDU byte count for next frame.
1661 * Used for fragmentation and bursting, but not 11n aggregation.
1662 * Same as "len", but for next frame. Set to 0 if not applicable.
1663 */
b481de9c 1664 __le16 next_frame_len;
52969981
BC
1665
1666 __le32 tx_flags; /* TX_CMD_FLG_* */
1667
2aa6ab86 1668 /* uCode may modify this field of the Tx command (in host DRAM!).
52969981 1669 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
2aa6ab86 1670 struct iwl_dram_scratch scratch;
52969981
BC
1671
1672 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1673 __le32 rate_n_flags; /* RATE_MCS_* */
1674
1675 /* Index of destination station in uCode's station table */
b481de9c 1676 u8 sta_id;
52969981
BC
1677
1678 /* Type of security encryption: CCM or TKIP */
1679 u8 sec_ctl; /* TX_CMD_SEC_* */
1680
1681 /*
1682 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1683 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1684 * data frames, this field may be used to selectively reduce initial
1685 * rate (via non-0 value) for special frames (e.g. management), while
1686 * still supporting rate scaling for all frames.
1687 */
b481de9c
ZY
1688 u8 initial_rate_index;
1689 u8 reserved;
b481de9c 1690 u8 key[16];
b481de9c
ZY
1691 __le16 next_frame_flags;
1692 __le16 reserved2;
b481de9c
ZY
1693 union {
1694 __le32 life_time;
1695 __le32 attempt;
1696 } stop_time;
52969981
BC
1697
1698 /* Host DRAM physical address pointer to "scratch" in this command.
1699 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
b481de9c
ZY
1700 __le32 dram_lsb_ptr;
1701 u8 dram_msb_ptr;
52969981 1702
b481de9c
ZY
1703 u8 rts_retry_limit; /*byte 50 */
1704 u8 data_retry_limit; /*byte 51 */
b481de9c 1705 u8 tid_tspec;
b481de9c
ZY
1706 union {
1707 __le16 pm_frame_timeout;
1708 __le16 attempt_duration;
1709 } timeout;
52969981
BC
1710
1711 /*
1712 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1713 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1714 */
b481de9c 1715 __le16 driver_txop;
52969981
BC
1716
1717 /*
1718 * MAC header goes here, followed by 2 bytes padding if MAC header
1719 * length is 26 or 30 bytes, followed by payload data
1720 */
b481de9c
ZY
1721 u8 payload[0];
1722 struct ieee80211_hdr hdr[0];
ba2d3587 1723} __packed;
b481de9c 1724
04569cbe 1725/* TX command response is sent after *3945* transmission attempts.
b481de9c
ZY
1726 *
1727 * NOTES:
1728 *
1729 * TX_STATUS_FAIL_NEXT_FRAG
1730 *
1731 * If the fragment flag in the MAC header for the frame being transmitted
1732 * is set and there is insufficient time to transmit the next frame, the
1733 * TX status will be returned with 'TX_STATUS_FAIL_NEXT_FRAG'.
1734 *
1735 * TX_STATUS_FIFO_UNDERRUN
1736 *
1737 * Indicates the host did not provide bytes to the FIFO fast enough while
1738 * a TX was in progress.
1739 *
1740 * TX_STATUS_FAIL_MGMNT_ABORT
1741 *
1742 * This status is only possible if the ABORT ON MGMT RX parameter was
1743 * set to true with the TX command.
1744 *
1745 * If the MSB of the status parameter is set then an abort sequence is
1746 * required. This sequence consists of the host activating the TX Abort
1747 * control line, and then waiting for the TX Abort command response. This
1748 * indicates that a the device is no longer in a transmit state, and that the
1749 * command FIFO has been cleared. The host must then deactivate the TX Abort
1750 * control line. Receiving is still allowed in this case.
1751 */
04569cbe
WYG
1752enum {
1753 TX_3945_STATUS_SUCCESS = 0x01,
1754 TX_3945_STATUS_DIRECT_DONE = 0x02,
1755 TX_3945_STATUS_FAIL_SHORT_LIMIT = 0x82,
1756 TX_3945_STATUS_FAIL_LONG_LIMIT = 0x83,
1757 TX_3945_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1758 TX_3945_STATUS_FAIL_MGMNT_ABORT = 0x85,
1759 TX_3945_STATUS_FAIL_NEXT_FRAG = 0x86,
1760 TX_3945_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1761 TX_3945_STATUS_FAIL_DEST_PS = 0x88,
1762 TX_3945_STATUS_FAIL_ABORTED = 0x89,
1763 TX_3945_STATUS_FAIL_BT_RETRY = 0x8a,
1764 TX_3945_STATUS_FAIL_STA_INVALID = 0x8b,
1765 TX_3945_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1766 TX_3945_STATUS_FAIL_TID_DISABLE = 0x8d,
1767 TX_3945_STATUS_FAIL_FRAME_FLUSHED = 0x8e,
1768 TX_3945_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1769 TX_3945_STATUS_FAIL_TX_LOCKED = 0x90,
1770 TX_3945_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1771};
1772
1773/*
1774 * TX command response is sent after *agn* transmission attempts.
1775 *
1776 * both postpone and abort status are expected behavior from uCode. there is
1777 * no special operation required from driver; except for RFKILL_FLUSH,
1778 * which required tx flush host command to flush all the tx frames in queues
1779 */
b481de9c
ZY
1780enum {
1781 TX_STATUS_SUCCESS = 0x01,
1782 TX_STATUS_DIRECT_DONE = 0x02,
04569cbe
WYG
1783 /* postpone TX */
1784 TX_STATUS_POSTPONE_DELAY = 0x40,
1785 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1786 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1787 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1788 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1789 /* abort TX */
1790 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
b481de9c
ZY
1791 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1792 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1793 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
04569cbe
WYG
1794 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1795 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
b481de9c
ZY
1796 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1797 TX_STATUS_FAIL_DEST_PS = 0x88,
04569cbe 1798 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
b481de9c
ZY
1799 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1800 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1801 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1802 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
04569cbe 1803 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
b481de9c 1804 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
04569cbe
WYG
1805 /* uCode drop due to FW drop request */
1806 TX_STATUS_FAIL_FW_DROP = 0x90,
1807 /*
1808 * uCode drop due to station color mismatch
1809 * between tx command and station table
1810 */
1811 TX_STATUS_FAIL_STA_COLOR_MISMATCH_DROP = 0x91,
b481de9c
ZY
1812};
1813
1814#define TX_PACKET_MODE_REGULAR 0x0000
1815#define TX_PACKET_MODE_BURST_SEQ 0x0100
1816#define TX_PACKET_MODE_BURST_FIRST 0x0200
1817
1818enum {
1819 TX_POWER_PA_NOT_ACTIVE = 0x0,
1820};
1821
1822enum {
3fd07a1e 1823 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
b481de9c
ZY
1824 TX_STATUS_DELAY_MSK = 0x00000040,
1825 TX_STATUS_ABORT_MSK = 0x00000080,
1826 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1827 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
3fd07a1e 1828 TX_RESERVED = 0x00780000, /* bits 19:22 */
b481de9c
ZY
1829 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1830 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1831};
1832
1833/* *******************************
52969981 1834 * TX aggregation status
b481de9c
ZY
1835 ******************************* */
1836
1837enum {
1838 AGG_TX_STATE_TRANSMITTED = 0x00,
1839 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1840 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1841 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1842 AGG_TX_STATE_ABORT_MSK = 0x08,
1843 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1844 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1845 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1846 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1847 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1848 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1849 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1850 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1851};
1852
3fd07a1e
TW
1853#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1854 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1855 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
b481de9c 1856
52969981 1857/* # tx attempts for first frame in aggregation */
b481de9c
ZY
1858#define AGG_TX_STATE_TRY_CNT_POS 12
1859#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1860
52969981 1861/* Command ID and sequence number of Tx command for this frame */
b481de9c
ZY
1862#define AGG_TX_STATE_SEQ_NUM_POS 16
1863#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1864
1865/*
1866 * REPLY_TX = 0x1c (response)
52969981
BC
1867 *
1868 * This response may be in one of two slightly different formats, indicated
1869 * by the frame_count field:
1870 *
1871 * 1) No aggregation (frame_count == 1). This reports Tx results for
1872 * a single frame. Multiple attempts, at various bit rates, may have
1873 * been made for this frame.
1874 *
1875 * 2) Aggregation (frame_count > 1). This reports Tx results for
1876 * 2 or more frames that used block-acknowledge. All frames were
1877 * transmitted at same rate. Rate scaling may have been used if first
1878 * frame in this new agg block failed in previous agg block(s).
1879 *
1880 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
767d055d
WYG
1881 * block-ack has not been received by the time the agn device records
1882 * this status.
52969981 1883 * This status relates to reasons the tx might have been blocked or aborted
767d055d 1884 * within the sending station (this agn device), rather than whether it was
52969981 1885 * received successfully by the destination station.
b481de9c 1886 */
001caff0
RR
1887struct agg_tx_status {
1888 __le16 status;
1889 __le16 sequence;
ba2d3587 1890} __packed;
001caff0 1891
bb8c093b 1892struct iwl4965_tx_resp {
b481de9c 1893 u8 frame_count; /* 1 no aggregation, >1 aggregation */
52969981
BC
1894 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1895 u8 failure_rts; /* # failures due to unsuccessful RTS */
1896 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1897
1898 /* For non-agg: Rate at which frame was successful.
1899 * For agg: Rate at which all frames were transmitted. */
1900 __le32 rate_n_flags; /* RATE_MCS_* */
1901
1902 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1903 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1904 __le16 wireless_media_time; /* uSecs */
1905
b481de9c 1906 __le16 reserved;
52969981 1907 __le32 pa_power1; /* RF power amplifier measurement (not used) */
b481de9c 1908 __le32 pa_power2;
52969981
BC
1909
1910 /*
1911 * For non-agg: frame status TX_STATUS_*
1912 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1913 * fields follow this one, up to frame_count.
1914 * Bit fields:
1915 * 11- 0: AGG_TX_STATE_* status code
1916 * 15-12: Retry count for 1st frame in aggregation (retries
1917 * occur if tx failed for this frame when it was a
1918 * member of a previous aggregation block). If rate
1919 * scaling is used, retry count indicates the rate
1920 * table entry used for all frames in the new agg.
1921 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1922 */
25a6572c
TW
1923 union {
1924 __le32 status;
1925 struct agg_tx_status agg_status[0]; /* for each agg frame */
1926 } u;
ba2d3587 1927} __packed;
fe01b477 1928
3fd07a1e
TW
1929/*
1930 * definitions for initial rate index field
a96a27f9 1931 * bits [3:0] initial rate index
3fd07a1e
TW
1932 * bits [6:4] rate table color, used for the initial rate
1933 * bit-7 invalid rate indication
1934 * i.e. rate was not chosen from rate table
1935 * or rate table color was changed during frame retries
1936 * refer tlc rate info
1937 */
1938
1939#define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1940#define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1941#define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1942#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1943#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1944
1945/* refer to ra_tid */
1946#define IWL50_TX_RES_TID_POS 0
1947#define IWL50_TX_RES_TID_MSK 0x0f
1948#define IWL50_TX_RES_RA_POS 4
1949#define IWL50_TX_RES_RA_MSK 0xf0
1950
001caff0
RR
1951struct iwl5000_tx_resp {
1952 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1953 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1954 u8 failure_rts; /* # failures due to unsuccessful RTS */
1955 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1956
1957 /* For non-agg: Rate at which frame was successful.
1958 * For agg: Rate at which all frames were transmitted. */
1959 __le32 rate_n_flags; /* RATE_MCS_* */
1960
1961 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1962 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1963 __le16 wireless_media_time; /* uSecs */
1964
3fd07a1e
TW
1965 u8 pa_status; /* RF power amplifier measurement (not used) */
1966 u8 pa_integ_res_a[3];
1967 u8 pa_integ_res_b[3];
1968 u8 pa_integ_res_C[3];
001caff0
RR
1969
1970 __le32 tfd_info;
1971 __le16 seq_ctl;
1972 __le16 byte_cnt;
3fd07a1e
TW
1973 u8 tlc_info;
1974 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1975 __le16 frame_ctrl;
001caff0
RR
1976 /*
1977 * For non-agg: frame status TX_STATUS_*
1978 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1979 * fields follow this one, up to frame_count.
1980 * Bit fields:
1981 * 11- 0: AGG_TX_STATE_* status code
1982 * 15-12: Retry count for 1st frame in aggregation (retries
1983 * occur if tx failed for this frame when it was a
1984 * member of a previous aggregation block). If rate
1985 * scaling is used, retry count indicates the rate
1986 * table entry used for all frames in the new agg.
1987 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1988 */
1989 struct agg_tx_status status; /* TX status (in aggregation -
1990 * status of 1st frame) */
ba2d3587 1991} __packed;
b481de9c
ZY
1992/*
1993 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
52969981
BC
1994 *
1995 * Reports Block-Acknowledge from recipient station
b481de9c 1996 */
653fa4a0 1997struct iwl_compressed_ba_resp {
b481de9c
ZY
1998 __le32 sta_addr_lo32;
1999 __le16 sta_addr_hi16;
2000 __le16 reserved;
52969981
BC
2001
2002 /* Index of recipient (BA-sending) station in uCode's station table */
b481de9c
ZY
2003 u8 sta_id;
2004 u8 tid;
fe01b477
RR
2005 __le16 seq_ctl;
2006 __le64 bitmap;
b481de9c
ZY
2007 __le16 scd_flow;
2008 __le16 scd_ssn;
ba2d3587 2009} __packed;
b481de9c
ZY
2010
2011/*
2012 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
2bdc7031
BC
2013 *
2014 * See details under "TXPOWER" in iwl-4965-hw.h.
b481de9c 2015 */
3d24a9f7
TW
2016
2017struct iwl3945_txpowertable_cmd {
2018 u8 band; /* 0: 5 GHz, 1: 2.4 GHz */
2019 u8 reserved;
2020 __le16 channel;
2021 struct iwl3945_power_per_rate power[IWL_MAX_RATES];
ba2d3587 2022} __packed;
3d24a9f7 2023
bb8c093b 2024struct iwl4965_txpowertable_cmd {
b481de9c
ZY
2025 u8 band; /* 0: 5 GHz, 1: 2.4 GHz */
2026 u8 reserved;
2027 __le16 channel;
bb8c093b 2028 struct iwl4965_tx_power_db tx_power;
ba2d3587 2029} __packed;
b481de9c 2030
3d24a9f7
TW
2031
2032/**
2033 * struct iwl3945_rate_scaling_cmd - Rate Scaling Command & Response
2034 *
2035 * REPLY_RATE_SCALE = 0x47 (command, has simple generic response)
2036 *
2037 * NOTE: The table of rates passed to the uCode via the
2038 * RATE_SCALE command sets up the corresponding order of
2039 * rates used for all related commands, including rate
2040 * masks, etc.
2041 *
2042 * For example, if you set 9MB (PLCP 0x0f) as the first
2043 * rate in the rate table, the bit mask for that rate
2044 * when passed through ofdm_basic_rates on the REPLY_RXON
2045 * command would be bit 0 (1 << 0)
2046 */
2047struct iwl3945_rate_scaling_info {
2048 __le16 rate_n_flags;
2049 u8 try_cnt;
2050 u8 next_rate_index;
ba2d3587 2051} __packed;
3d24a9f7
TW
2052
2053struct iwl3945_rate_scaling_cmd {
2054 u8 table_id;
2055 u8 reserved[3];
2056 struct iwl3945_rate_scaling_info table[IWL_MAX_RATES];
ba2d3587 2057} __packed;
3d24a9f7
TW
2058
2059
b481de9c 2060/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
8a1b0245 2061#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
b481de9c 2062
2bdc7031 2063/* # of EDCA prioritized tx fifos */
b481de9c 2064#define LINK_QUAL_AC_NUM AC_NUM
2bdc7031
BC
2065
2066/* # entries in rate scale table to support Tx retries */
b481de9c
ZY
2067#define LINK_QUAL_MAX_RETRY_NUM 16
2068
2bdc7031 2069/* Tx antenna selection values */
8a1b0245
RC
2070#define LINK_QUAL_ANT_A_MSK (1 << 0)
2071#define LINK_QUAL_ANT_B_MSK (1 << 1)
b481de9c
ZY
2072#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
2073
2bdc7031
BC
2074
2075/**
66c73db7 2076 * struct iwl_link_qual_general_params
2bdc7031
BC
2077 *
2078 * Used in REPLY_TX_LINK_QUALITY_CMD
2079 */
66c73db7 2080struct iwl_link_qual_general_params {
b481de9c 2081 u8 flags;
2bdc7031
BC
2082
2083 /* No entries at or above this (driver chosen) index contain MIMO */
b481de9c 2084 u8 mimo_delimiter;
2bdc7031
BC
2085
2086 /* Best single antenna to use for single stream (legacy, SISO). */
2087 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
2088
2089 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
2090 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
2091
2092 /*
2093 * If driver needs to use different initial rates for different
2094 * EDCA QOS access categories (as implemented by tx fifos 0-3),
2095 * this table will set that up, by indicating the indexes in the
2096 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
2097 * Otherwise, driver should set all entries to 0.
2098 *
2099 * Entry usage:
2100 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
2101 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
2102 */
b481de9c 2103 u8 start_rate_index[LINK_QUAL_AC_NUM];
ba2d3587 2104} __packed;
b481de9c 2105
13c33a09 2106#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
b15826a7
WYG
2107#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
2108#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
13c33a09
WYG
2109
2110#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
2111#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
2112#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
2113
2114#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (31)
b623a9f7 2115#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
13c33a09
WYG
2116#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
2117
2bdc7031 2118/**
66c73db7 2119 * struct iwl_link_qual_agg_params
2bdc7031
BC
2120 *
2121 * Used in REPLY_TX_LINK_QUALITY_CMD
2122 */
66c73db7 2123struct iwl_link_qual_agg_params {
2bdc7031 2124
7469701e
WYG
2125 /*
2126 *Maximum number of uSec in aggregation.
2127 * default set to 4000 (4 milliseconds) if not configured in .cfg
2128 */
b481de9c 2129 __le16 agg_time_limit;
2bdc7031
BC
2130
2131 /*
2132 * Number of Tx retries allowed for a frame, before that frame will
2133 * no longer be considered for the start of an aggregation sequence
2134 * (scheduler will then try to tx it as single frame).
2135 * Driver should set this to 3.
2136 */
b481de9c 2137 u8 agg_dis_start_th;
2bdc7031
BC
2138
2139 /*
2140 * Maximum number of frames in aggregation.
2141 * 0 = no limit (default). 1 = no aggregation.
2142 * Other values = max # frames in aggregation.
2143 */
b481de9c 2144 u8 agg_frame_cnt_limit;
2bdc7031 2145
b481de9c 2146 __le32 reserved;
ba2d3587 2147} __packed;
b481de9c
ZY
2148
2149/*
2150 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
2bdc7031 2151 *
767d055d 2152 * For agn devices only; 3945 uses REPLY_RATE_SCALE.
2bdc7031 2153 *
767d055d
WYG
2154 * Each station in the agn device's internal station table has its own table
2155 * of 16
2bdc7031
BC
2156 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
2157 * an ACK is not received. This command replaces the entire table for
2158 * one station.
2159 *
767d055d
WYG
2160 * NOTE: Station must already be in agn device's station table.
2161 * Use REPLY_ADD_STA.
2bdc7031
BC
2162 *
2163 * The rate scaling procedures described below work well. Of course, other
2164 * procedures are possible, and may work better for particular environments.
2165 *
2166 *
2167 * FILLING THE RATE TABLE
2168 *
2169 * Given a particular initial rate and mode, as determined by the rate
2170 * scaling algorithm described below, the Linux driver uses the following
2171 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
2172 * Link Quality command:
2173 *
2174 *
2175 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
2176 * a) Use this same initial rate for first 3 entries.
2177 * b) Find next lower available rate using same mode (SISO or MIMO),
2178 * use for next 3 entries. If no lower rate available, switch to
7aafef1c 2179 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
2bdc7031
BC
2180 * c) If using MIMO, set command's mimo_delimiter to number of entries
2181 * using MIMO (3 or 6).
7aafef1c 2182 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
2bdc7031
BC
2183 * no MIMO, no short guard interval), at the next lower bit rate
2184 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
2185 * legacy procedure for remaining table entries.
2186 *
2187 * 2) If using legacy initial rate:
2188 * a) Use the initial rate for only one entry.
2189 * b) For each following entry, reduce the rate to next lower available
2190 * rate, until reaching the lowest available rate.
2191 * c) When reducing rate, also switch antenna selection.
2192 * d) Once lowest available rate is reached, repeat this rate until
2193 * rate table is filled (16 entries), switching antenna each entry.
2194 *
2195 *
2196 * ACCUMULATING HISTORY
2197 *
767d055d
WYG
2198 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
2199 * uses two sets of frame Tx success history: One for the current/active
2200 * modulation mode, and one for a speculative/search mode that is being
2201 * attempted. If the speculative mode turns out to be more effective (i.e.
2202 * actual transfer rate is better), then the driver continues to use the
2203 * speculative mode as the new current active mode.
2bdc7031
BC
2204 *
2205 * Each history set contains, separately for each possible rate, data for a
2206 * sliding window of the 62 most recent tx attempts at that rate. The data
2207 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
2208 * and attempted frames, from which the driver can additionally calculate a
2209 * success ratio (success / attempted) and number of failures
2210 * (attempted - success), and control the size of the window (attempted).
2211 * The driver uses the bit map to remove successes from the success sum, as
2212 * the oldest tx attempts fall out of the window.
2213 *
767d055d
WYG
2214 * When the agn device makes multiple tx attempts for a given frame, each
2215 * attempt might be at a different rate, and have different modulation
2216 * characteristics (e.g. antenna, fat channel, short guard interval), as set
2217 * up in the rate scaling table in the Link Quality command. The driver must
2218 * determine which rate table entry was used for each tx attempt, to determine
2219 * which rate-specific history to update, and record only those attempts that
2bdc7031
BC
2220 * match the modulation characteristics of the history set.
2221 *
2222 * When using block-ack (aggregation), all frames are transmitted at the same
a96a27f9 2223 * rate, since there is no per-attempt acknowledgment from the destination
2bdc7031
BC
2224 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
2225 * rate_n_flags field. After receiving a block-ack, the driver can update
2226 * history for the entire block all at once.
2227 *
2228 *
2229 * FINDING BEST STARTING RATE:
2230 *
2231 * When working with a selected initial modulation mode (see below), the
2232 * driver attempts to find a best initial rate. The initial rate is the
2233 * first entry in the Link Quality command's rate table.
2234 *
2235 * 1) Calculate actual throughput (success ratio * expected throughput, see
2236 * table below) for current initial rate. Do this only if enough frames
2237 * have been attempted to make the value meaningful: at least 6 failed
2238 * tx attempts, or at least 8 successes. If not enough, don't try rate
2239 * scaling yet.
2240 *
2241 * 2) Find available rates adjacent to current initial rate. Available means:
2242 * a) supported by hardware &&
2243 * b) supported by association &&
2244 * c) within any constraints selected by user
2245 *
2246 * 3) Gather measured throughputs for adjacent rates. These might not have
2247 * enough history to calculate a throughput. That's okay, we might try
2248 * using one of them anyway!
2249 *
2250 * 4) Try decreasing rate if, for current rate:
2251 * a) success ratio is < 15% ||
2252 * b) lower adjacent rate has better measured throughput ||
2253 * c) higher adjacent rate has worse throughput, and lower is unmeasured
2254 *
2255 * As a sanity check, if decrease was determined above, leave rate
2256 * unchanged if:
2257 * a) lower rate unavailable
2258 * b) success ratio at current rate > 85% (very good)
2259 * c) current measured throughput is better than expected throughput
2260 * of lower rate (under perfect 100% tx conditions, see table below)
2261 *
2262 * 5) Try increasing rate if, for current rate:
2263 * a) success ratio is < 15% ||
2264 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
2265 * b) higher adjacent rate has better measured throughput ||
2266 * c) lower adjacent rate has worse throughput, and higher is unmeasured
2267 *
2268 * As a sanity check, if increase was determined above, leave rate
2269 * unchanged if:
2270 * a) success ratio at current rate < 70%. This is not particularly
2271 * good performance; higher rate is sure to have poorer success.
2272 *
2273 * 6) Re-evaluate the rate after each tx frame. If working with block-
2274 * acknowledge, history and statistics may be calculated for the entire
2275 * block (including prior history that fits within the history windows),
2276 * before re-evaluation.
2277 *
2278 * FINDING BEST STARTING MODULATION MODE:
2279 *
2280 * After working with a modulation mode for a "while" (and doing rate scaling),
2281 * the driver searches for a new initial mode in an attempt to improve
2282 * throughput. The "while" is measured by numbers of attempted frames:
2283 *
2284 * For legacy mode, search for new mode after:
2285 * 480 successful frames, or 160 failed frames
2286 * For high-throughput modes (SISO or MIMO), search for new mode after:
2287 * 4500 successful frames, or 400 failed frames
2288 *
2289 * Mode switch possibilities are (3 for each mode):
2290 *
2291 * For legacy:
2292 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
2293 * For SISO:
2294 * Change antenna, try MIMO, try shortened guard interval (SGI)
2295 * For MIMO:
2296 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
2297 *
2298 * When trying a new mode, use the same bit rate as the old/current mode when
2299 * trying antenna switches and shortened guard interval. When switching to
2300 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
2301 * for which the expected throughput (under perfect conditions) is about the
2302 * same or slightly better than the actual measured throughput delivered by
2303 * the old/current mode.
2304 *
2305 * Actual throughput can be estimated by multiplying the expected throughput
2306 * by the success ratio (successful / attempted tx frames). Frame size is
2307 * not considered in this calculation; it assumes that frame size will average
2308 * out to be fairly consistent over several samples. The following are
2309 * metric values for expected throughput assuming 100% success ratio.
2310 * Only G band has support for CCK rates:
2311 *
2312 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
2313 *
2314 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
2315 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
2316 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
2317 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
2318 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
2319 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
2320 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
2321 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
2322 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
2323 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
2324 *
2325 * After the new mode has been tried for a short while (minimum of 6 failed
2326 * frames or 8 successful frames), compare success ratio and actual throughput
2327 * estimate of the new mode with the old. If either is better with the new
2328 * mode, continue to use the new mode.
2329 *
2330 * Continue comparing modes until all 3 possibilities have been tried.
2331 * If moving from legacy to HT, try all 3 possibilities from the new HT
2332 * mode. After trying all 3, a best mode is found. Continue to use this mode
2333 * for the longer "while" described above (e.g. 480 successful frames for
2334 * legacy), and then repeat the search process.
2335 *
b481de9c 2336 */
66c73db7 2337struct iwl_link_quality_cmd {
2bdc7031
BC
2338
2339 /* Index of destination/recipient station in uCode's station table */
b481de9c
ZY
2340 u8 sta_id;
2341 u8 reserved1;
2bdc7031 2342 __le16 control; /* not used */
66c73db7
TW
2343 struct iwl_link_qual_general_params general_params;
2344 struct iwl_link_qual_agg_params agg_params;
2bdc7031
BC
2345
2346 /*
2347 * Rate info; when using rate-scaling, Tx command's initial_rate_index
2348 * specifies 1st Tx rate attempted, via index into this table.
767d055d 2349 * agn devices works its way through table when retrying Tx.
2bdc7031 2350 */
b481de9c 2351 struct {
2bdc7031 2352 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
b481de9c
ZY
2353 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
2354 __le32 reserved2;
ba2d3587 2355} __packed;
b481de9c 2356
dab1c161
WYG
2357/*
2358 * BT configuration enable flags:
2359 * bit 0 - 1: BT channel announcement enabled
2360 * 0: disable
2361 * bit 1 - 1: priority of BT device enabled
2362 * 0: disable
2363 * bit 2 - 1: BT 2 wire support enabled
2364 * 0: disable
2365 */
456d0f76 2366#define BT_COEX_DISABLE (0x0)
dab1c161
WYG
2367#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
2368#define BT_ENABLE_PRIORITY BIT(1)
2369#define BT_ENABLE_2_WIRE BIT(2)
456d0f76 2370
06702a73
WYG
2371#define BT_COEX_DISABLE (0x0)
2372#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
2373
456d0f76
WYG
2374#define BT_LEAD_TIME_MIN (0x0)
2375#define BT_LEAD_TIME_DEF (0x1E)
2376#define BT_LEAD_TIME_MAX (0xFF)
2377
2378#define BT_MAX_KILL_MIN (0x1)
2379#define BT_MAX_KILL_DEF (0x5)
2380#define BT_MAX_KILL_MAX (0xFF)
2381
b481de9c
ZY
2382/*
2383 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
3058f021 2384 *
767d055d 2385 * 3945 and agn devices support hardware handshake with Bluetooth device on
3058f021 2386 * same platform. Bluetooth device alerts wireless device when it will Tx;
a96a27f9 2387 * wireless device can delay or kill its own Tx to accommodate.
b481de9c 2388 */
2aa6ab86 2389struct iwl_bt_cmd {
b481de9c
ZY
2390 u8 flags;
2391 u8 lead_time;
2392 u8 max_kill;
2393 u8 reserved;
2394 __le32 kill_ack_mask;
2395 __le32 kill_cts_mask;
ba2d3587 2396} __packed;
b481de9c 2397
670245ed
JB
2398#define IWL6000G2B_BT_FLAG_CHANNEL_INHIBITION BIT(0)
2399
2400#define IWL6000G2B_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
2401#define IWL6000G2B_BT_FLAG_COEX_MODE_SHIFT 3
2402#define IWL6000G2B_BT_FLAG_COEX_MODE_DISABLED 0
2403#define IWL6000G2B_BT_FLAG_COEX_MODE_LEGACY_2W 1
2404#define IWL6000G2B_BT_FLAG_COEX_MODE_3W 2
2405#define IWL6000G2B_BT_FLAG_COEX_MODE_4W 3
2406
2407#define IWL6000G2B_BT_FLAG_UCODE_DEFAULT BIT(6)
2408#define IWL6000G2B_BT_FLAG_NOCOEX_NOTIF BIT(7)
2409
2410#define IWL6000G2B_BT_PRIO_BOOST_MAX 0xFF
2411#define IWL6000G2B_BT_PRIO_BOOST_MIN 0x00
5d297d50 2412#define IWL6000G2B_BT_PRIO_BOOST_DEFAULT 0xF0
670245ed
JB
2413
2414#define IWL6000G2B_BT_MAX_KILL_DEFAULT 5
2415
2416#define IWL6000G2B_BT3_T7_DEFAULT 1
2417
2418#define IWL6000G2B_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffffffff)
2419#define IWL6000G2B_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffffffff)
2420
2421#define IWL6000G2B_BT3_PRIO_SAMPLE_DEFAULT 2
2422
2423#define IWL6000G2B_BT3_T2_DEFAULT 0xc
2424
2425#define IWL6000G2B_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
2426#define IWL6000G2B_BT_VALID_BOOST cpu_to_le16(BIT(1))
2427#define IWL6000G2B_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
2428#define IWL6000G2B_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
2429#define IWL6000G2B_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
2430#define IWL6000G2B_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
2431#define IWL6000G2B_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
2432#define IWL6000G2B_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
2433
2434#define IWL6000G2B_BT_ALL_VALID_MSK (IWL6000G2B_BT_VALID_ENABLE_FLAGS | \
2435 IWL6000G2B_BT_VALID_BOOST | \
2436 IWL6000G2B_BT_VALID_MAX_KILL | \
2437 IWL6000G2B_BT_VALID_3W_TIMERS | \
2438 IWL6000G2B_BT_VALID_KILL_ACK_MASK | \
2439 IWL6000G2B_BT_VALID_KILL_CTS_MASK | \
2440 IWL6000G2B_BT_VALID_BT4_TIMES | \
2441 IWL6000G2B_BT_VALID_3W_LUT)
2442
2443struct iwl6000g2b_bt_cmd {
2444 u8 flags;
2445 u8 ledtime; /* unused */
2446 u8 max_kill;
2447 u8 bt3_timer_t7_value;
2448 __le32 kill_ack_mask;
2449 __le32 kill_cts_mask;
2450 u8 bt3_prio_sample_time;
2451 u8 bt3_timer_t2_value;
2452 __le16 bt4_reaction_time; /* unused */
2453 __le32 bt3_lookup_table[12];
2454 __le16 bt4_decision_time; /* unused */
2455 __le16 valid;
2456 u8 prio_boost;
2457 u8 reserved[3];
2458};
2459
9e4afc21
JB
2460#define IWL6000G2B_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
2461
2462struct iwl6000g2b_bt_sco_cmd {
2463 __le32 flags;
2464};
2465
b481de9c
ZY
2466/******************************************************************************
2467 * (6)
2468 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2469 *
2470 *****************************************************************************/
2471
2472/*
2473 * Spectrum Management
2474 */
2475#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2476 RXON_FILTER_CTL2HOST_MSK | \
2477 RXON_FILTER_ACCEPT_GRP_MSK | \
2478 RXON_FILTER_DIS_DECRYPT_MSK | \
2479 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2480 RXON_FILTER_ASSOC_MSK | \
2481 RXON_FILTER_BCON_AWARE_MSK)
2482
2aa6ab86 2483struct iwl_measure_channel {
b481de9c
ZY
2484 __le32 duration; /* measurement duration in extended beacon
2485 * format */
2486 u8 channel; /* channel to measure */
2aa6ab86 2487 u8 type; /* see enum iwl_measure_type */
b481de9c 2488 __le16 reserved;
ba2d3587 2489} __packed;
b481de9c
ZY
2490
2491/*
2492 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2493 */
2aa6ab86 2494struct iwl_spectrum_cmd {
b481de9c
ZY
2495 __le16 len; /* number of bytes starting from token */
2496 u8 token; /* token id */
2497 u8 id; /* measurement id -- 0 or 1 */
2498 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2499 u8 periodic; /* 1 = periodic */
2500 __le16 path_loss_timeout;
2501 __le32 start_time; /* start time in extended beacon format */
2502 __le32 reserved2;
2503 __le32 flags; /* rxon flags */
2504 __le32 filter_flags; /* rxon filter flags */
2505 __le16 channel_count; /* minimum 1, maximum 10 */
2506 __le16 reserved3;
2aa6ab86 2507 struct iwl_measure_channel channels[10];
ba2d3587 2508} __packed;
b481de9c
ZY
2509
2510/*
2511 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2512 */
2aa6ab86 2513struct iwl_spectrum_resp {
b481de9c
ZY
2514 u8 token;
2515 u8 id; /* id of the prior command replaced, or 0xff */
2516 __le16 status; /* 0 - command will be handled
2517 * 1 - cannot handle (conflicts with another
2518 * measurement) */
ba2d3587 2519} __packed;
b481de9c 2520
2aa6ab86 2521enum iwl_measurement_state {
b481de9c
ZY
2522 IWL_MEASUREMENT_START = 0,
2523 IWL_MEASUREMENT_STOP = 1,
2524};
2525
2aa6ab86 2526enum iwl_measurement_status {
b481de9c
ZY
2527 IWL_MEASUREMENT_OK = 0,
2528 IWL_MEASUREMENT_CONCURRENT = 1,
2529 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2530 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2531 /* 4-5 reserved */
2532 IWL_MEASUREMENT_STOPPED = 6,
2533 IWL_MEASUREMENT_TIMEOUT = 7,
2534 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2535};
2536
2537#define NUM_ELEMENTS_IN_HISTOGRAM 8
2538
2aa6ab86 2539struct iwl_measurement_histogram {
b481de9c
ZY
2540 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2541 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
ba2d3587 2542} __packed;
b481de9c
ZY
2543
2544/* clear channel availability counters */
2aa6ab86 2545struct iwl_measurement_cca_counters {
b481de9c
ZY
2546 __le32 ofdm;
2547 __le32 cck;
ba2d3587 2548} __packed;
b481de9c 2549
2aa6ab86 2550enum iwl_measure_type {
b481de9c
ZY
2551 IWL_MEASURE_BASIC = (1 << 0),
2552 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2553 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2554 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2555 IWL_MEASURE_FRAME = (1 << 4),
2556 /* bits 5:6 are reserved */
2557 IWL_MEASURE_IDLE = (1 << 7),
2558};
2559
2560/*
2561 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2562 */
2aa6ab86 2563struct iwl_spectrum_notification {
b481de9c
ZY
2564 u8 id; /* measurement id -- 0 or 1 */
2565 u8 token;
2566 u8 channel_index; /* index in measurement channel list */
2567 u8 state; /* 0 - start, 1 - stop */
2568 __le32 start_time; /* lower 32-bits of TSF */
2569 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2570 u8 channel;
2aa6ab86 2571 u8 type; /* see enum iwl_measurement_type */
b481de9c
ZY
2572 u8 reserved1;
2573 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2574 * valid if applicable for measurement type requested. */
2575 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2576 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2577 __le32 cca_time; /* channel load time in usecs */
2578 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2579 * unidentified */
2580 u8 reserved2[3];
2aa6ab86 2581 struct iwl_measurement_histogram histogram;
b481de9c 2582 __le32 stop_time; /* lower 32-bits of TSF */
2aa6ab86 2583 __le32 status; /* see iwl_measurement_status */
ba2d3587 2584} __packed;
b481de9c
ZY
2585
2586/******************************************************************************
2587 * (7)
2588 * Power Management Commands, Responses, Notifications:
2589 *
2590 *****************************************************************************/
2591
2592/**
ca579617 2593 * struct iwl_powertable_cmd - Power Table Command
b481de9c
ZY
2594 * @flags: See below:
2595 *
2596 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2597 *
2598 * PM allow:
2599 * bit 0 - '0' Driver not allow power management
2600 * '1' Driver allow PM (use rest of parameters)
e312c24c 2601 *
b481de9c
ZY
2602 * uCode send sleep notifications:
2603 * bit 1 - '0' Don't send sleep notification
2604 * '1' send sleep notification (SEND_PM_NOTIFICATION)
e312c24c 2605 *
b481de9c
ZY
2606 * Sleep over DTIM
2607 * bit 2 - '0' PM have to walk up every DTIM
2608 * '1' PM could sleep over DTIM till listen Interval.
e312c24c 2609 *
b481de9c 2610 * PCI power managed
e7b63581
TW
2611 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2612 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
e312c24c
JB
2613 *
2614 * Fast PD
2615 * bit 4 - '1' Put radio to sleep when receiving frame for others
2616 *
b481de9c
ZY
2617 * Force sleep Modes
2618 * bit 31/30- '00' use both mac/xtal sleeps
2619 * '01' force Mac sleep
2620 * '10' force xtal sleep
2621 * '11' Illegal set
2622 *
2623 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
a96a27f9 2624 * ucode assume sleep over DTIM is allowed and we don't need to wake up
b481de9c
ZY
2625 * for every DTIM.
2626 */
2627#define IWL_POWER_VEC_SIZE 5
2628
600c0e11
TW
2629#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2630#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2631#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2632#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2633
2634struct iwl3945_powertable_cmd {
2635 __le16 flags;
2636 u8 reserved[2];
2637 __le32 rx_data_timeout;
2638 __le32 tx_data_timeout;
2639 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
ba2d3587 2640} __packed;
b481de9c 2641
ca579617 2642struct iwl_powertable_cmd {
b481de9c 2643 __le16 flags;
600c0e11
TW
2644 u8 keep_alive_seconds; /* 3945 reserved */
2645 u8 debug_flags; /* 3945 reserved */
b481de9c
ZY
2646 __le32 rx_data_timeout;
2647 __le32 tx_data_timeout;
2648 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2649 __le32 keep_alive_beacons;
ba2d3587 2650} __packed;
b481de9c
ZY
2651
2652/*
2653 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
767d055d 2654 * all devices identical.
b481de9c 2655 */
2aa6ab86 2656struct iwl_sleep_notification {
b481de9c
ZY
2657 u8 pm_sleep_mode;
2658 u8 pm_wakeup_src;
2659 __le16 reserved;
2660 __le32 sleep_time;
2661 __le32 tsf_low;
2662 __le32 bcon_timer;
ba2d3587 2663} __packed;
b481de9c 2664
767d055d 2665/* Sleep states. all devices identical. */
b481de9c
ZY
2666enum {
2667 IWL_PM_NO_SLEEP = 0,
2668 IWL_PM_SLP_MAC = 1,
2669 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2670 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2671 IWL_PM_SLP_PHY = 4,
2672 IWL_PM_SLP_REPENT = 5,
2673 IWL_PM_WAKEUP_BY_TIMER = 6,
2674 IWL_PM_WAKEUP_BY_DRIVER = 7,
2675 IWL_PM_WAKEUP_BY_RFKILL = 8,
2676 /* 3 reserved */
2677 IWL_PM_NUM_OF_MODES = 12,
2678};
2679
2680/*
2681 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2682 */
2683#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2684#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2685#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2aa6ab86 2686struct iwl_card_state_cmd {
b481de9c 2687 __le32 status; /* CARD_STATE_CMD_* request new power state */
ba2d3587 2688} __packed;
b481de9c
ZY
2689
2690/*
2691 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2692 */
2aa6ab86 2693struct iwl_card_state_notif {
b481de9c 2694 __le32 flags;
ba2d3587 2695} __packed;
b481de9c
ZY
2696
2697#define HW_CARD_DISABLED 0x01
2698#define SW_CARD_DISABLED 0x02
3a41bbd5 2699#define CT_CARD_DISABLED 0x04
b481de9c
ZY
2700#define RXON_CARD_DISABLED 0x10
2701
47f4a587 2702struct iwl_ct_kill_config {
b481de9c
ZY
2703 __le32 reserved;
2704 __le32 critical_temperature_M;
2705 __le32 critical_temperature_R;
ba2d3587 2706} __packed;
b481de9c 2707
672639de
WYG
2708/* 1000, and 6x00 */
2709struct iwl_ct_kill_throttling_config {
2710 __le32 critical_temperature_exit;
2711 __le32 reserved;
2712 __le32 critical_temperature_enter;
ba2d3587 2713} __packed;
672639de 2714
b481de9c
ZY
2715/******************************************************************************
2716 * (8)
2717 * Scan Commands, Responses, Notifications:
2718 *
2719 *****************************************************************************/
2720
51e9bf5d
HH
2721#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2722#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
d16dc48a 2723
3058f021 2724/**
2a421b91 2725 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
3058f021
BC
2726 *
2727 * One for each channel in the scan list.
2728 * Each channel can independently select:
2729 * 1) SSID for directed active scans
2730 * 2) Txpower setting (for rate specified within Tx command)
2731 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2732 * quiet_plcp_th, good_CRC_th)
2733 *
2734 * To avoid uCode errors, make sure the following are true (see comments
2a421b91 2735 * under struct iwl_scan_cmd about max_out_time and quiet_time):
3058f021
BC
2736 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2737 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2738 * 2) quiet_time <= active_dwell
2739 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2740 * passive_dwell < max_out_time
2741 * active_dwell < max_out_time
2742 */
3d24a9f7
TW
2743
2744/* FIXME: rename to AP1, remove tpc */
2745struct iwl3945_scan_channel {
2746 /*
2747 * type is defined as:
2748 * 0:0 1 = active, 0 = passive
2749 * 1:4 SSID direct bit map; if a bit is set, then corresponding
2750 * SSID IE is transmitted in probe request.
2751 * 5:7 reserved
2752 */
2753 u8 type;
2754 u8 channel; /* band is selected by iwl3945_scan_cmd "flags" field */
2755 struct iwl3945_tx_power tpc;
2756 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2757 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
ba2d3587 2758} __packed;
3d24a9f7 2759
0d21044e
WT
2760/* set number of direct probes u8 type */
2761#define IWL39_SCAN_PROBE_MASK(n) ((BIT(n) | (BIT(n) - BIT(1))))
2762
2a421b91 2763struct iwl_scan_channel {
3058f021
BC
2764 /*
2765 * type is defined as:
2766 * 0:0 1 = active, 0 = passive
d16dc48a 2767 * 1:20 SSID direct bit map; if a bit is set, then corresponding
3058f021 2768 * SSID IE is transmitted in probe request.
d16dc48a 2769 * 21:31 reserved
b481de9c 2770 */
d16dc48a
TW
2771 __le32 type;
2772 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
f53696de
TW
2773 u8 tx_gain; /* gain for analog radio */
2774 u8 dsp_atten; /* gain for DSP */
3058f021
BC
2775 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2776 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
ba2d3587 2777} __packed;
b481de9c 2778
0d21044e
WT
2779/* set number of direct probes __le32 type */
2780#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2781
3058f021 2782/**
2a421b91 2783 * struct iwl_ssid_ie - directed scan network information element
3058f021 2784 *
2a3b793d
BC
2785 * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in
2786 * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel;
2787 * each channel may select different ssids from among the 20 (4) entries.
2788 * SSID IEs get transmitted in reverse order of entry.
3058f021 2789 */
2a421b91 2790struct iwl_ssid_ie {
b481de9c
ZY
2791 u8 id;
2792 u8 len;
2793 u8 ssid[32];
ba2d3587 2794} __packed;
b481de9c 2795
9b3bf06a
JB
2796#define PROBE_OPTION_MAX_3945 4
2797#define PROBE_OPTION_MAX 20
51e9bf5d 2798#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
96ff5641
JB
2799#define IWL_GOOD_CRC_TH_DISABLED 0
2800#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2801#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
b481de9c 2802#define IWL_MAX_SCAN_SIZE 1024
89612124 2803#define IWL_MAX_CMD_SIZE 4096
b481de9c
ZY
2804
2805/*
2806 * REPLY_SCAN_CMD = 0x80 (command)
3058f021
BC
2807 *
2808 * The hardware scan command is very powerful; the driver can set it up to
2809 * maintain (relatively) normal network traffic while doing a scan in the
2810 * background. The max_out_time and suspend_time control the ratio of how
2811 * long the device stays on an associated network channel ("service channel")
2812 * vs. how long it's away from the service channel, i.e. tuned to other channels
2813 * for scanning.
2814 *
2815 * max_out_time is the max time off-channel (in usec), and suspend_time
2816 * is how long (in "extended beacon" format) that the scan is "suspended"
2817 * after returning to the service channel. That is, suspend_time is the
2818 * time that we stay on the service channel, doing normal work, between
2819 * scan segments. The driver may set these parameters differently to support
2820 * scanning when associated vs. not associated, and light vs. heavy traffic
2821 * loads when associated.
2822 *
2823 * After receiving this command, the device's scan engine does the following;
2824 *
2825 * 1) Sends SCAN_START notification to driver
2826 * 2) Checks to see if it has time to do scan for one channel
2827 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2828 * to tell AP that we're going off-channel
2829 * 4) Tunes to first channel in scan list, does active or passive scan
2830 * 5) Sends SCAN_RESULT notification to driver
2831 * 6) Checks to see if it has time to do scan on *next* channel in list
2832 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2833 * before max_out_time expires
2834 * 8) Returns to service channel
2835 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2836 * 10) Stays on service channel until suspend_time expires
2837 * 11) Repeats entire process 2-10 until list is complete
2838 * 12) Sends SCAN_COMPLETE notification
2839 *
2840 * For fast, efficient scans, the scan command also has support for staying on
2841 * a channel for just a short time, if doing active scanning and getting no
2842 * responses to the transmitted probe request. This time is controlled by
2843 * quiet_time, and the number of received packets below which a channel is
2844 * considered "quiet" is controlled by quiet_plcp_threshold.
2845 *
2846 * For active scanning on channels that have regulatory restrictions against
2847 * blindly transmitting, the scan can listen before transmitting, to make sure
2848 * that there is already legitimate activity on the channel. If enough
2849 * packets are cleanly received on the channel (controlled by good_CRC_th,
2850 * typical value 1), the scan engine starts transmitting probe requests.
2851 *
2852 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2853 *
2854 * To avoid uCode errors, see timing restrictions described under
2a421b91 2855 * struct iwl_scan_channel.
b481de9c 2856 */
3d24a9f7
TW
2857
2858struct iwl3945_scan_cmd {
2859 __le16 len;
2860 u8 reserved0;
2861 u8 channel_count; /* # channels in channel list */
2862 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2863 * (only for active scan) */
2864 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2865 __le16 good_CRC_th; /* passive -> active promotion threshold */
2866 __le16 reserved1;
2867 __le32 max_out_time; /* max usec to be away from associated (service)
2868 * channel */
2869 __le32 suspend_time; /* pause scan this long (in "extended beacon
2870 * format") when returning to service channel:
2871 * 3945; 31:24 # beacons, 19:0 additional usec,
2872 * 4965; 31:22 # beacons, 21:0 additional usec.
2873 */
2874 __le32 flags; /* RXON_FLG_* */
2875 __le32 filter_flags; /* RXON_FILTER_* */
2876
2877 /* For active scans (set to all-0s for passive scans).
2878 * Does not include payload. Must specify Tx rate; no rate scaling. */
2879 struct iwl3945_tx_cmd tx_cmd;
2880
2881 /* For directed active scans (set to all-0s otherwise) */
9b3bf06a 2882 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX_3945];
3d24a9f7
TW
2883
2884 /*
2885 * Probe request frame, followed by channel list.
2886 *
2887 * Size of probe request frame is specified by byte count in tx_cmd.
2888 * Channel list follows immediately after probe request frame.
2889 * Number of channels in list is specified by channel_count.
2890 * Each channel in list is of type:
2891 *
2892 * struct iwl3945_scan_channel channels[0];
2893 *
2894 * NOTE: Only one band of channels can be scanned per pass. You
2895 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2896 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2897 * before requesting another scan.
2898 */
2899 u8 data[0];
ba2d3587 2900} __packed;
3d24a9f7 2901
2a421b91 2902struct iwl_scan_cmd {
b481de9c
ZY
2903 __le16 len;
2904 u8 reserved0;
3058f021
BC
2905 u8 channel_count; /* # channels in channel list */
2906 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2907 * (only for active scan) */
2908 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2909 __le16 good_CRC_th; /* passive -> active promotion threshold */
2910 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2911 __le32 max_out_time; /* max usec to be away from associated (service)
2912 * channel */
2913 __le32 suspend_time; /* pause scan this long (in "extended beacon
2914 * format") when returning to service chnl:
2915 * 3945; 31:24 # beacons, 19:0 additional usec,
2916 * 4965; 31:22 # beacons, 21:0 additional usec.
2917 */
2918 __le32 flags; /* RXON_FLG_* */
2919 __le32 filter_flags; /* RXON_FILTER_* */
2920
2921 /* For active scans (set to all-0s for passive scans).
2922 * Does not include payload. Must specify Tx rate; no rate scaling. */
83d527d9 2923 struct iwl_tx_cmd tx_cmd;
3058f021
BC
2924
2925 /* For directed active scans (set to all-0s otherwise) */
2a421b91 2926 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
b481de9c 2927
b481de9c 2928 /*
3058f021
BC
2929 * Probe request frame, followed by channel list.
2930 *
2931 * Size of probe request frame is specified by byte count in tx_cmd.
2932 * Channel list follows immediately after probe request frame.
2933 * Number of channels in list is specified by channel_count.
2934 * Each channel in list is of type:
b481de9c 2935 *
2aa6ab86 2936 * struct iwl_scan_channel channels[0];
b481de9c
ZY
2937 *
2938 * NOTE: Only one band of channels can be scanned per pass. You
3058f021
BC
2939 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2940 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2941 * before requesting another scan.
b481de9c 2942 */
3058f021 2943 u8 data[0];
ba2d3587 2944} __packed;
b481de9c
ZY
2945
2946/* Can abort will notify by complete notification with abort status. */
51e9bf5d 2947#define CAN_ABORT_STATUS cpu_to_le32(0x1)
b481de9c
ZY
2948/* complete notification statuses */
2949#define ABORT_STATUS 0x2
2950
2951/*
2952 * REPLY_SCAN_CMD = 0x80 (response)
2953 */
2a421b91 2954struct iwl_scanreq_notification {
b481de9c 2955 __le32 status; /* 1: okay, 2: cannot fulfill request */
ba2d3587 2956} __packed;
b481de9c
ZY
2957
2958/*
2959 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2960 */
2a421b91 2961struct iwl_scanstart_notification {
b481de9c
ZY
2962 __le32 tsf_low;
2963 __le32 tsf_high;
2964 __le32 beacon_timer;
2965 u8 channel;
2966 u8 band;
2967 u8 reserved[2];
2968 __le32 status;
ba2d3587 2969} __packed;
b481de9c
ZY
2970
2971#define SCAN_OWNER_STATUS 0x1;
2972#define MEASURE_OWNER_STATUS 0x2;
2973
0288d237
JB
2974#define IWL_PROBE_STATUS_OK 0
2975#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2976/* error statuses combined with TX_FAILED */
2977#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2978#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2979
b481de9c
ZY
2980#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2981/*
2982 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2983 */
2a421b91 2984struct iwl_scanresults_notification {
b481de9c
ZY
2985 u8 channel;
2986 u8 band;
0288d237
JB
2987 u8 probe_status;
2988 u8 num_probe_not_sent; /* not enough time to send */
b481de9c
ZY
2989 __le32 tsf_low;
2990 __le32 tsf_high;
2991 __le32 statistics[NUMBER_OF_STATISTICS];
ba2d3587 2992} __packed;
b481de9c
ZY
2993
2994/*
2995 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2996 */
2a421b91 2997struct iwl_scancomplete_notification {
b481de9c
ZY
2998 u8 scanned_channels;
2999 u8 status;
3000 u8 reserved;
3001 u8 last_channel;
3002 __le32 tsf_low;
3003 __le32 tsf_high;
ba2d3587 3004} __packed;
b481de9c
ZY
3005
3006
3007/******************************************************************************
3008 * (9)
3009 * IBSS/AP Commands and Notifications:
3010 *
3011 *****************************************************************************/
3012
a85d7cca
JB
3013enum iwl_ibss_manager {
3014 IWL_NOT_IBSS_MANAGER = 0,
3015 IWL_IBSS_MANAGER = 1,
3016};
3017
b481de9c
ZY
3018/*
3019 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
3020 */
3d24a9f7
TW
3021
3022struct iwl3945_beacon_notif {
3023 struct iwl3945_tx_resp beacon_notify_hdr;
3024 __le32 low_tsf;
3025 __le32 high_tsf;
3026 __le32 ibss_mgr_status;
ba2d3587 3027} __packed;
3d24a9f7 3028
bb8c093b
CH
3029struct iwl4965_beacon_notif {
3030 struct iwl4965_tx_resp beacon_notify_hdr;
b481de9c
ZY
3031 __le32 low_tsf;
3032 __le32 high_tsf;
3033 __le32 ibss_mgr_status;
ba2d3587 3034} __packed;
b481de9c
ZY
3035
3036/*
3037 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
3038 */
3d24a9f7
TW
3039
3040struct iwl3945_tx_beacon_cmd {
3041 struct iwl3945_tx_cmd tx;
3042 __le16 tim_idx;
3043 u8 tim_size;
3044 u8 reserved1;
3045 struct ieee80211_hdr frame[0]; /* beacon frame */
ba2d3587 3046} __packed;
3d24a9f7 3047
4bf64efd 3048struct iwl_tx_beacon_cmd {
83d527d9 3049 struct iwl_tx_cmd tx;
b481de9c
ZY
3050 __le16 tim_idx;
3051 u8 tim_size;
3052 u8 reserved1;
3053 struct ieee80211_hdr frame[0]; /* beacon frame */
ba2d3587 3054} __packed;
b481de9c
ZY
3055
3056/******************************************************************************
3057 * (10)
3058 * Statistics Commands and Notifications:
3059 *
3060 *****************************************************************************/
3061
3062#define IWL_TEMP_CONVERT 260
3063
3064#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
3065#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
3066#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
3067
3068/* Used for passing to driver number of successes and failures per rate */
3069struct rate_histogram {
3070 union {
3071 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
3072 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
3073 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
3074 } success;
3075 union {
3076 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
3077 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
3078 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
3079 } failed;
ba2d3587 3080} __packed;
b481de9c
ZY
3081
3082/* statistics command response */
3083
3d24a9f7
TW
3084struct iwl39_statistics_rx_phy {
3085 __le32 ina_cnt;
3086 __le32 fina_cnt;
3087 __le32 plcp_err;
3088 __le32 crc32_err;
3089 __le32 overrun_err;
3090 __le32 early_overrun_err;
3091 __le32 crc32_good;
3092 __le32 false_alarm_cnt;
3093 __le32 fina_sync_err_cnt;
3094 __le32 sfd_timeout;
3095 __le32 fina_timeout;
3096 __le32 unresponded_rts;
3097 __le32 rxe_frame_limit_overrun;
3098 __le32 sent_ack_cnt;
3099 __le32 sent_cts_cnt;
ba2d3587 3100} __packed;
3d24a9f7
TW
3101
3102struct iwl39_statistics_rx_non_phy {
3103 __le32 bogus_cts; /* CTS received when not expecting CTS */
3104 __le32 bogus_ack; /* ACK received when not expecting ACK */
3105 __le32 non_bssid_frames; /* number of frames with BSSID that
3106 * doesn't belong to the STA BSSID */
3107 __le32 filtered_frames; /* count frames that were dumped in the
3108 * filtering process */
3109 __le32 non_channel_beacons; /* beacons with our bss id but not on
3110 * our serving channel */
ba2d3587 3111} __packed;
3d24a9f7
TW
3112
3113struct iwl39_statistics_rx {
3114 struct iwl39_statistics_rx_phy ofdm;
3115 struct iwl39_statistics_rx_phy cck;
3116 struct iwl39_statistics_rx_non_phy general;
ba2d3587 3117} __packed;
3d24a9f7
TW
3118
3119struct iwl39_statistics_tx {
3120 __le32 preamble_cnt;
3121 __le32 rx_detected_cnt;
3122 __le32 bt_prio_defer_cnt;
3123 __le32 bt_prio_kill_cnt;
3124 __le32 few_bytes_cnt;
3125 __le32 cts_timeout;
3126 __le32 ack_timeout;
3127 __le32 expected_ack_cnt;
3128 __le32 actual_ack_cnt;
ba2d3587 3129} __packed;
3d24a9f7
TW
3130
3131struct statistics_dbg {
3132 __le32 burst_check;
3133 __le32 burst_count;
7c094c5c
WYG
3134 __le32 wait_for_silence_timeout_cnt;
3135 __le32 reserved[3];
ba2d3587 3136} __packed;
3d24a9f7
TW
3137
3138struct iwl39_statistics_div {
3139 __le32 tx_on_a;
3140 __le32 tx_on_b;
3141 __le32 exec_time;
3142 __le32 probe_time;
ba2d3587 3143} __packed;
3d24a9f7
TW
3144
3145struct iwl39_statistics_general {
3146 __le32 temperature;
3147 struct statistics_dbg dbg;
3148 __le32 sleep_time;
3149 __le32 slots_out;
3150 __le32 slots_idle;
3151 __le32 ttl_timestamp;
3152 struct iwl39_statistics_div div;
ba2d3587 3153} __packed;
3d24a9f7 3154
b481de9c
ZY
3155struct statistics_rx_phy {
3156 __le32 ina_cnt;
3157 __le32 fina_cnt;
3158 __le32 plcp_err;
3159 __le32 crc32_err;
3160 __le32 overrun_err;
3161 __le32 early_overrun_err;
3162 __le32 crc32_good;
3163 __le32 false_alarm_cnt;
3164 __le32 fina_sync_err_cnt;
3165 __le32 sfd_timeout;
3166 __le32 fina_timeout;
3167 __le32 unresponded_rts;
3168 __le32 rxe_frame_limit_overrun;
3169 __le32 sent_ack_cnt;
3170 __le32 sent_cts_cnt;
b481de9c
ZY
3171 __le32 sent_ba_rsp_cnt;
3172 __le32 dsp_self_kill;
3173 __le32 mh_format_err;
3174 __le32 re_acq_main_rssi_sum;
3175 __le32 reserved3;
ba2d3587 3176} __packed;
b481de9c 3177
b481de9c
ZY
3178struct statistics_rx_ht_phy {
3179 __le32 plcp_err;
3180 __le32 overrun_err;
3181 __le32 early_overrun_err;
3182 __le32 crc32_good;
3183 __le32 crc32_err;
3184 __le32 mh_format_err;
3185 __le32 agg_crc32_good;
3186 __le32 agg_mpdu_cnt;
3187 __le32 agg_cnt;
f0118a45 3188 __le32 unsupport_mcs;
ba2d3587 3189} __packed;
b481de9c 3190
c1b4aa3f 3191#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
34c22cf9 3192
b481de9c
ZY
3193struct statistics_rx_non_phy {
3194 __le32 bogus_cts; /* CTS received when not expecting CTS */
3195 __le32 bogus_ack; /* ACK received when not expecting ACK */
3196 __le32 non_bssid_frames; /* number of frames with BSSID that
3197 * doesn't belong to the STA BSSID */
3198 __le32 filtered_frames; /* count frames that were dumped in the
3199 * filtering process */
3200 __le32 non_channel_beacons; /* beacons with our bss id but not on
3201 * our serving channel */
b481de9c
ZY
3202 __le32 channel_beacons; /* beacons with our bss id and in our
3203 * serving channel */
3204 __le32 num_missed_bcon; /* number of missed beacons */
3205 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
3206 * ADC was in saturation */
3207 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
3208 * for INA */
3209 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
3210 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
3211 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
3212 __le32 interference_data_flag; /* flag for interference data
3213 * availability. 1 when data is
3214 * available. */
3058f021 3215 __le32 channel_load; /* counts RX Enable time in uSec */
b481de9c
ZY
3216 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
3217 * and CCK) counter */
3218 __le32 beacon_rssi_a;
3219 __le32 beacon_rssi_b;
3220 __le32 beacon_rssi_c;
3221 __le32 beacon_energy_a;
3222 __le32 beacon_energy_b;
3223 __le32 beacon_energy_c;
ba2d3587 3224} __packed;
b481de9c 3225
325322ee
WYG
3226struct statistics_rx_non_phy_bt {
3227 struct statistics_rx_non_phy common;
3228 /* additional stats for bt */
3229 __le32 num_bt_kills;
3230 __le32 reserved[2];
da22f795 3231} __packed;
325322ee 3232
b481de9c
ZY
3233struct statistics_rx {
3234 struct statistics_rx_phy ofdm;
3235 struct statistics_rx_phy cck;
3236 struct statistics_rx_non_phy general;
b481de9c 3237 struct statistics_rx_ht_phy ofdm_ht;
ba2d3587 3238} __packed;
b481de9c 3239
325322ee
WYG
3240struct statistics_rx_bt {
3241 struct statistics_rx_phy ofdm;
3242 struct statistics_rx_phy cck;
3243 struct statistics_rx_non_phy_bt general;
3244 struct statistics_rx_ht_phy ofdm_ht;
da22f795 3245} __packed;
325322ee 3246
fcbaf8b0
WYG
3247/**
3248 * struct statistics_tx_power - current tx power
3249 *
3250 * @ant_a: current tx power on chain a in 1/2 dB step
3251 * @ant_b: current tx power on chain b in 1/2 dB step
3252 * @ant_c: current tx power on chain c in 1/2 dB step
3253 */
3254struct statistics_tx_power {
3255 u8 ant_a;
3256 u8 ant_b;
3257 u8 ant_c;
3258 u8 reserved;
ba2d3587 3259} __packed;
fcbaf8b0 3260
b481de9c
ZY
3261struct statistics_tx_non_phy_agg {
3262 __le32 ba_timeout;
3263 __le32 ba_reschedule_frames;
3264 __le32 scd_query_agg_frame_cnt;
3265 __le32 scd_query_no_agg;
3266 __le32 scd_query_agg;
3267 __le32 scd_query_mismatch;
3268 __le32 frame_not_ready;
3269 __le32 underrun;
3270 __le32 bt_prio_kill;
3271 __le32 rx_ba_rsp_cnt;
ba2d3587 3272} __packed;
b481de9c
ZY
3273
3274struct statistics_tx {
3275 __le32 preamble_cnt;
3276 __le32 rx_detected_cnt;
3277 __le32 bt_prio_defer_cnt;
3278 __le32 bt_prio_kill_cnt;
3279 __le32 few_bytes_cnt;
3280 __le32 cts_timeout;
3281 __le32 ack_timeout;
3282 __le32 expected_ack_cnt;
3283 __le32 actual_ack_cnt;
b481de9c
ZY
3284 __le32 dump_msdu_cnt;
3285 __le32 burst_abort_next_frame_mismatch_cnt;
3286 __le32 burst_abort_missing_next_frame_cnt;
3287 __le32 cts_timeout_collision;
3288 __le32 ack_or_ba_timeout_collision;
3289 struct statistics_tx_non_phy_agg agg;
470356b8
WYG
3290 /*
3291 * "tx_power" are optional parameters provided by uCode,
3292 * 6000 series is the only device provide the information,
3293 * Those are reserved fields for all the other devices
3294 */
fcbaf8b0
WYG
3295 struct statistics_tx_power tx_power;
3296 __le32 reserved1;
ba2d3587 3297} __packed;
b481de9c 3298
b481de9c
ZY
3299
3300struct statistics_div {
3301 __le32 tx_on_a;
3302 __le32 tx_on_b;
3303 __le32 exec_time;
3304 __le32 probe_time;
b481de9c
ZY
3305 __le32 reserved1;
3306 __le32 reserved2;
ba2d3587 3307} __packed;
b481de9c 3308
325322ee 3309struct statistics_general_common {
f0118a45
WYG
3310 __le32 temperature; /* radio temperature */
3311 __le32 temperature_m; /* for 5000 and up, this is radio voltage */
b481de9c
ZY
3312 struct statistics_dbg dbg;
3313 __le32 sleep_time;
3314 __le32 slots_out;
3315 __le32 slots_idle;
3316 __le32 ttl_timestamp;
3317 struct statistics_div div;
b481de9c 3318 __le32 rx_enable_counter;
11fc5249
WYG
3319 /*
3320 * num_of_sos_states:
3321 * count the number of times we have to re-tune
3322 * in order to get out of bad PHY status
3323 */
3324 __le32 num_of_sos_states;
da22f795 3325} __packed;
325322ee
WYG
3326
3327struct statistics_bt_activity {
3328 /* Tx statistics */
3329 __le32 hi_priority_tx_req_cnt;
3330 __le32 hi_priority_tx_denied_cnt;
3331 __le32 lo_priority_tx_req_cnt;
3332 __le32 lo_priority_tx_denied_cnt;
3333 /* Rx statistics */
3334 __le32 hi_priority_rx_req_cnt;
3335 __le32 hi_priority_rx_denied_cnt;
3336 __le32 lo_priority_rx_req_cnt;
3337 __le32 lo_priority_rx_denied_cnt;
da22f795 3338} __packed;
325322ee
WYG
3339
3340struct statistics_general {
3341 struct statistics_general_common common;
3342 __le32 reserved2;
3343 __le32 reserved3;
da22f795 3344} __packed;
325322ee
WYG
3345
3346struct statistics_general_bt {
3347 struct statistics_general_common common;
3348 struct statistics_bt_activity activity;
b481de9c
ZY
3349 __le32 reserved2;
3350 __le32 reserved3;
ba2d3587 3351} __packed;
b481de9c 3352
ef8d5529
WYG
3353#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
3354#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
3355#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
3356
b481de9c
ZY
3357/*
3358 * REPLY_STATISTICS_CMD = 0x9c,
767d055d 3359 * all devices identical.
b481de9c
ZY
3360 *
3361 * This command triggers an immediate response containing uCode statistics.
3362 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
3363 *
3364 * If the CLEAR_STATS configuration flag is set, uCode will clear its
3365 * internal copy of the statistics (counters) after issuing the response.
3366 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
3367 *
3368 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
3369 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
3370 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
3371 */
51e9bf5d
HH
3372#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
3373#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
8f91aecb 3374struct iwl_statistics_cmd {
b481de9c 3375 __le32 configuration_flags; /* IWL_STATS_CONF_* */
ba2d3587 3376} __packed;
b481de9c
ZY
3377
3378/*
3379 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
3380 *
3381 * By default, uCode issues this notification after receiving a beacon
3382 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
3383 * REPLY_STATISTICS_CMD 0x9c, above.
3384 *
3385 * Statistics counters continue to increment beacon after beacon, but are
3386 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
3387 * 0x9c with CLEAR_STATS bit set (see above).
3388 *
3389 * uCode also issues this notification during scans. uCode clears statistics
3390 * appropriately so that each notification contains statistics for only the
3391 * one channel that has just been scanned.
3392 */
51e9bf5d 3393#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
7aafef1c 3394#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
3d24a9f7
TW
3395
3396struct iwl3945_notif_statistics {
3397 __le32 flag;
3398 struct iwl39_statistics_rx rx;
3399 struct iwl39_statistics_tx tx;
3400 struct iwl39_statistics_general general;
ba2d3587 3401} __packed;
3d24a9f7 3402
8f91aecb 3403struct iwl_notif_statistics {
b481de9c
ZY
3404 __le32 flag;
3405 struct statistics_rx rx;
3406 struct statistics_tx tx;
3407 struct statistics_general general;
ba2d3587 3408} __packed;
b481de9c 3409
325322ee
WYG
3410struct iwl_bt_notif_statistics {
3411 __le32 flag;
3412 struct statistics_rx_bt rx;
3413 struct statistics_tx tx;
3414 struct statistics_general_bt general;
da22f795 3415} __packed;
b481de9c
ZY
3416
3417/*
3418 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
a13d276f
WYG
3419 *
3420 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
3421 * in regardless of how many missed beacons, which mean when driver receive the
3422 * notification, inside the command, it can find all the beacons information
3423 * which include number of total missed beacons, number of consecutive missed
3424 * beacons, number of beacons received and number of beacons expected to
3425 * receive.
3426 *
3427 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
3428 * in order to bring the radio/PHY back to working state; which has no relation
3429 * to when driver will perform sensitivity calibration.
3430 *
3431 * Driver should set it own missed_beacon_threshold to decide when to perform
3432 * sensitivity calibration based on number of consecutive missed beacons in
3433 * order to improve overall performance, especially in noisy environment.
3434 *
b481de9c 3435 */
a13d276f
WYG
3436
3437#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
3438#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
3439#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
b481de9c 3440
2aa6ab86 3441struct iwl_missed_beacon_notif {
a13d276f 3442 __le32 consecutive_missed_beacons;
b481de9c
ZY
3443 __le32 total_missed_becons;
3444 __le32 num_expected_beacons;
3445 __le32 num_recvd_beacons;
ba2d3587 3446} __packed;
b481de9c 3447
f7d09d7c 3448
b481de9c
ZY
3449/******************************************************************************
3450 * (11)
3451 * Rx Calibration Commands:
3452 *
f7d09d7c
BC
3453 * With the uCode used for open source drivers, most Tx calibration (except
3454 * for Tx Power) and most Rx calibration is done by uCode during the
3455 * "initialize" phase of uCode boot. Driver must calibrate only:
3456 *
3457 * 1) Tx power (depends on temperature), described elsewhere
3458 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
3459 * 3) Receiver sensitivity (to optimize signal detection)
3460 *
b481de9c
ZY
3461 *****************************************************************************/
3462
f7d09d7c
BC
3463/**
3464 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
3465 *
3466 * This command sets up the Rx signal detector for a sensitivity level that
3467 * is high enough to lock onto all signals within the associated network,
3468 * but low enough to ignore signals that are below a certain threshold, so as
3469 * not to have too many "false alarms". False alarms are signals that the
3470 * Rx DSP tries to lock onto, but then discards after determining that they
3471 * are noise.
3472 *
3473 * The optimum number of false alarms is between 5 and 50 per 200 TUs
3474 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
3475 * time listening, not transmitting). Driver must adjust sensitivity so that
3476 * the ratio of actual false alarms to actual Rx time falls within this range.
3477 *
3478 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
3479 * received beacon. These provide information to the driver to analyze the
3480 * sensitivity. Don't analyze statistics that come in from scanning, or any
3481 * other non-associated-network source. Pertinent statistics include:
3482 *
3483 * From "general" statistics (struct statistics_rx_non_phy):
3484 *
3485 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
3486 * Measure of energy of desired signal. Used for establishing a level
3487 * below which the device does not detect signals.
3488 *
3489 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
3490 * Measure of background noise in silent period after beacon.
3491 *
3492 * channel_load
3493 * uSecs of actual Rx time during beacon period (varies according to
3494 * how much time was spent transmitting).
3495 *
3496 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
3497 *
3498 * false_alarm_cnt
3499 * Signal locks abandoned early (before phy-level header).
3500 *
3501 * plcp_err
3502 * Signal locks abandoned late (during phy-level header).
3503 *
3504 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
3505 * beacon to beacon, i.e. each value is an accumulation of all errors
3506 * before and including the latest beacon. Values will wrap around to 0
3507 * after counting up to 2^32 - 1. Driver must differentiate vs.
3508 * previous beacon's values to determine # false alarms in the current
3509 * beacon period.
3510 *
3511 * Total number of false alarms = false_alarms + plcp_errs
3512 *
3513 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
3514 * (notice that the start points for OFDM are at or close to settings for
3515 * maximum sensitivity):
3516 *
3517 * START / MIN / MAX
3518 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
3519 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
3520 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
3521 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
3522 *
3523 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
3524 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
3525 * by *adding* 1 to all 4 of the table entries above, up to the max for
3526 * each entry. Conversely, if false alarm rate is too low (less than 5
3527 * for each 204.8 msecs listening), *subtract* 1 from each entry to
3528 * increase sensitivity.
3529 *
3530 * For CCK sensitivity, keep track of the following:
3531 *
3532 * 1). 20-beacon history of maximum background noise, indicated by
3533 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
3534 * 3 receivers. For any given beacon, the "silence reference" is
3535 * the maximum of last 60 samples (20 beacons * 3 receivers).
3536 *
3537 * 2). 10-beacon history of strongest signal level, as indicated
3538 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
3539 * i.e. the strength of the signal through the best receiver at the
3540 * moment. These measurements are "upside down", with lower values
3541 * for stronger signals, so max energy will be *minimum* value.
3542 *
3543 * Then for any given beacon, the driver must determine the *weakest*
3544 * of the strongest signals; this is the minimum level that needs to be
3545 * successfully detected, when using the best receiver at the moment.
3546 * "Max cck energy" is the maximum (higher value means lower energy!)
3547 * of the last 10 minima. Once this is determined, driver must add
3548 * a little margin by adding "6" to it.
3549 *
3550 * 3). Number of consecutive beacon periods with too few false alarms.
3551 * Reset this to 0 at the first beacon period that falls within the
3552 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
3553 *
3554 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
3555 * (notice that the start points for CCK are at maximum sensitivity):
3556 *
3557 * START / MIN / MAX
3558 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
3559 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
3560 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
3561 *
3562 * If actual rate of CCK false alarms (+ plcp_errors) is too high
3563 * (greater than 50 for each 204.8 msecs listening), method for reducing
3564 * sensitivity is:
3565 *
3566 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
3567 * up to max 400.
3568 *
3569 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
3570 * sensitivity has been reduced a significant amount; bring it up to
3571 * a moderate 161. Otherwise, *add* 3, up to max 200.
3572 *
3573 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
3574 * sensitivity has been reduced only a moderate or small amount;
3575 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
3576 * down to min 0. Otherwise (if gain has been significantly reduced),
3577 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
3578 *
3579 * b) Save a snapshot of the "silence reference".
3580 *
3581 * If actual rate of CCK false alarms (+ plcp_errors) is too low
3582 * (less than 5 for each 204.8 msecs listening), method for increasing
3583 * sensitivity is used only if:
3584 *
3585 * 1a) Previous beacon did not have too many false alarms
3586 * 1b) AND difference between previous "silence reference" and current
3587 * "silence reference" (prev - current) is 2 or more,
3588 * OR 2) 100 or more consecutive beacon periods have had rate of
3589 * less than 5 false alarms per 204.8 milliseconds rx time.
3590 *
3591 * Method for increasing sensitivity:
3592 *
3593 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
3594 * down to min 125.
3595 *
3596 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
3597 * down to min 200.
3598 *
3599 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
3600 *
3601 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
3602 * (between 5 and 50 for each 204.8 msecs listening):
3603 *
3604 * 1) Save a snapshot of the silence reference.
3605 *
3606 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
3607 * give some extra margin to energy threshold by *subtracting* 8
3608 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
3609 *
3610 * For all cases (too few, too many, good range), make sure that the CCK
3611 * detection threshold (energy) is below the energy level for robust
3612 * detection over the past 10 beacon periods, the "Max cck energy".
3613 * Lower values mean higher energy; this means making sure that the value
3614 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3615 *
f7d09d7c
BC
3616 */
3617
3618/*
f0832f13 3619 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
f7d09d7c
BC
3620 */
3621#define HD_TABLE_SIZE (11) /* number of entries */
3622#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3623#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3624#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3625#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3626#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3627#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3628#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3629#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3630#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3631#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3632#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3633
c8312fac
WYG
3634/*
3635 * Additional table entries in enhance SENSITIVITY_CMD
3636 */
3637#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3638#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3639#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3640#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3641#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3642#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3643#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3644#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3645#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3646#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3647#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3648#define HD_RESERVED (22)
3649
3650/* number of entries for enhanced tbl */
3651#define ENHANCE_HD_TABLE_SIZE (23)
3652
3653/* number of additional entries for enhanced tbl */
3654#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3655
3656#define HD_INA_NON_SQUARE_DET_OFDM_DATA cpu_to_le16(0)
3657#define HD_INA_NON_SQUARE_DET_CCK_DATA cpu_to_le16(0)
3658#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA cpu_to_le16(0)
3659#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(668)
3660#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3661#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(486)
3662#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(37)
3663#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(853)
3664#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3665#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(476)
3666#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(99)
3667
3668
f0832f13 3669/* Control field in struct iwl_sensitivity_cmd */
51e9bf5d
HH
3670#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3671#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
b481de9c 3672
f7d09d7c 3673/**
f0832f13 3674 * struct iwl_sensitivity_cmd
f7d09d7c
BC
3675 * @control: (1) updates working table, (0) updates default table
3676 * @table: energy threshold values, use HD_* as index into table
3677 *
3678 * Always use "1" in "control" to update uCode's working table and DSP.
3679 */
f0832f13 3680struct iwl_sensitivity_cmd {
f7d09d7c
BC
3681 __le16 control; /* always use "1" */
3682 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
ba2d3587 3683} __packed;
b481de9c 3684
c8312fac
WYG
3685/*
3686 *
3687 */
3688struct iwl_enhance_sensitivity_cmd {
3689 __le16 control; /* always use "1" */
3690 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
0e954099 3691} __packed;
c8312fac 3692
f7d09d7c
BC
3693
3694/**
3695 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3696 *
767d055d 3697 * This command sets the relative gains of agn device's 3 radio receiver chains.
f7d09d7c
BC
3698 *
3699 * After the first association, driver should accumulate signal and noise
3700 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3701 * beacons from the associated network (don't collect statistics that come
3702 * in from scanning, or any other non-network source).
3703 *
3704 * DISCONNECTED ANTENNA:
3705 *
3706 * Driver should determine which antennas are actually connected, by comparing
3707 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3708 * following values over 20 beacons, one accumulator for each of the chains
3709 * a/b/c, from struct statistics_rx_non_phy:
3710 *
3711 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3712 *
3713 * Find the strongest signal from among a/b/c. Compare the other two to the
3714 * strongest. If any signal is more than 15 dB (times 20, unless you
3715 * divide the accumulated values by 20) below the strongest, the driver
3716 * considers that antenna to be disconnected, and should not try to use that
3717 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3718 * driver should declare the stronger one as connected, and attempt to use it
3719 * (A and B are the only 2 Tx chains!).
3720 *
3721 *
3722 * RX BALANCE:
3723 *
3724 * Driver should balance the 3 receivers (but just the ones that are connected
3725 * to antennas, see above) for gain, by comparing the average signal levels
3726 * detected during the silence after each beacon (background noise).
3727 * Accumulate (add) the following values over 20 beacons, one accumulator for
3728 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3729 *
3730 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3731 *
3732 * Find the weakest background noise level from among a/b/c. This Rx chain
3733 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3734 * finding noise difference:
3735 *
3736 * (accum_noise[i] - accum_noise[reference]) / 30
3737 *
3738 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3739 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3740 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3741 * and set bit 2 to indicate "reduce gain". The value for the reference
3742 * (weakest) chain should be "0".
3743 *
3744 * diff_gain_[abc] bit fields:
3745 * 2: (1) reduce gain, (0) increase gain
3746 * 1-0: amount of gain, units of 1.5 dB
3747 */
3748
f69f42a6 3749/* Phy calibration command for series */
33fd5033
EG
3750
3751enum {
f69f42a6
TW
3752 IWL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7,
3753 IWL_PHY_CALIBRATE_DC_CMD = 8,
3754 IWL_PHY_CALIBRATE_LO_CMD = 9,
f69f42a6 3755 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
f69f42a6
TW
3756 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3757 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3758 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
6a822d06 3759 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 18,
33fd5033
EG
3760};
3761
6a822d06 3762#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
f69f42a6 3763
51e9bf5d 3764#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(0xffffffff)
7c616cba
TW
3765
3766struct iwl_calib_cfg_elmnt_s {
3767 __le32 is_enable;
3768 __le32 start;
3769 __le32 send_res;
3770 __le32 apply_res;
3771 __le32 reserved;
ba2d3587 3772} __packed;
7c616cba
TW
3773
3774struct iwl_calib_cfg_status_s {
3775 struct iwl_calib_cfg_elmnt_s once;
3776 struct iwl_calib_cfg_elmnt_s perd;
3777 __le32 flags;
ba2d3587 3778} __packed;
7c616cba 3779
f69f42a6 3780struct iwl_calib_cfg_cmd {
7c616cba
TW
3781 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3782 struct iwl_calib_cfg_status_s drv_calib_cfg;
3783 __le32 reserved1;
ba2d3587 3784} __packed;
7c616cba 3785
f69f42a6 3786struct iwl_calib_hdr {
7c616cba
TW
3787 u8 op_code;
3788 u8 first_group;
3789 u8 groups_num;
3790 u8 data_valid;
ba2d3587 3791} __packed;
7c616cba 3792
f69f42a6
TW
3793struct iwl_calib_cmd {
3794 struct iwl_calib_hdr hdr;
be5d56ed 3795 u8 data[0];
ba2d3587 3796} __packed;
be5d56ed 3797
0d950d84 3798/* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */
f69f42a6 3799struct iwl_calib_diff_gain_cmd {
0d950d84 3800 struct iwl_calib_hdr hdr;
f69f42a6
TW
3801 s8 diff_gain_a; /* see above */
3802 s8 diff_gain_b;
3803 s8 diff_gain_c;
3804 u8 reserved1;
ba2d3587 3805} __packed;
f69f42a6 3806
0d950d84
TW
3807struct iwl_calib_xtal_freq_cmd {
3808 struct iwl_calib_hdr hdr;
3809 u8 cap_pin1;
3810 u8 cap_pin2;
3811 u8 pad[2];
ba2d3587 3812} __packed;
33fd5033 3813
0d950d84
TW
3814/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3815struct iwl_calib_chain_noise_reset_cmd {
3816 struct iwl_calib_hdr hdr;
3817 u8 data[0];
3818};
3819
3820/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
f69f42a6 3821struct iwl_calib_chain_noise_gain_cmd {
0d950d84 3822 struct iwl_calib_hdr hdr;
33fd5033
EG
3823 u8 delta_gain_1;
3824 u8 delta_gain_2;
0d950d84 3825 u8 pad[2];
ba2d3587 3826} __packed;
33fd5033 3827
b481de9c
ZY
3828/******************************************************************************
3829 * (12)
3830 * Miscellaneous Commands:
3831 *
3832 *****************************************************************************/
3833
3834/*
3835 * LEDs Command & Response
3836 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3837 *
3838 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3839 * this command turns it on or off, or sets up a periodic blinking cycle.
3840 */
ec1a7460 3841struct iwl_led_cmd {
b481de9c
ZY
3842 __le32 interval; /* "interval" in uSec */
3843 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3844 u8 off; /* # intervals off while blinking;
3845 * "0", with >0 "on" value, turns LED on */
3846 u8 on; /* # intervals on while blinking;
3847 * "0", regardless of "off", turns LED off */
3848 u8 reserved;
ba2d3587 3849} __packed;
b481de9c 3850
9636e583 3851/*
fe1bcbfd
WYG
3852 * station priority table entries
3853 * also used as potential "events" value for both
3854 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
9636e583 3855 */
1933ac4d
WYG
3856
3857/*
3858 * COEX events entry flag masks
3859 * RP - Requested Priority
3860 * WP - Win Medium Priority: priority assigned when the contention has been won
3861 */
3862#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3863#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3864#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3865
3866#define COEX_CU_UNASSOC_IDLE_RP 4
3867#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3868#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3869#define COEX_CU_CALIBRATION_RP 4
3870#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3871#define COEX_CU_CONNECTION_ESTAB_RP 4
3872#define COEX_CU_ASSOCIATED_IDLE_RP 4
3873#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3874#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3875#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3876#define COEX_CU_RF_ON_RP 6
3877#define COEX_CU_RF_OFF_RP 4
3878#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3879#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3880#define COEX_CU_RSRVD1_RP 4
3881#define COEX_CU_RSRVD2_RP 4
3882
3883#define COEX_CU_UNASSOC_IDLE_WP 3
3884#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3885#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3886#define COEX_CU_CALIBRATION_WP 3
3887#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3888#define COEX_CU_CONNECTION_ESTAB_WP 3
3889#define COEX_CU_ASSOCIATED_IDLE_WP 3
3890#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3891#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3892#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3893#define COEX_CU_RF_ON_WP 3
3894#define COEX_CU_RF_OFF_WP 3
3895#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3896#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3897#define COEX_CU_RSRVD1_WP 3
3898#define COEX_CU_RSRVD2_WP 3
3899
3900#define COEX_UNASSOC_IDLE_FLAGS 0
3901#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3902 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3903 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3904#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3905 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3906 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3907#define COEX_CALIBRATION_FLAGS \
3908 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3909 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3910#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3911/*
3912 * COEX_CONNECTION_ESTAB:
3913 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3914 */
3915#define COEX_CONNECTION_ESTAB_FLAGS \
3916 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3917 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3918 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3919#define COEX_ASSOCIATED_IDLE_FLAGS 0
3920#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3921 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3922 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3923#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3924 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3925 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3926#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3927#define COEX_RF_ON_FLAGS 0
3928#define COEX_RF_OFF_FLAGS 0
3929#define COEX_STAND_ALONE_DEBUG_FLAGS \
3930 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3931 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3932#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3933 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3934 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3935 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3936#define COEX_RSRVD1_FLAGS 0
3937#define COEX_RSRVD2_FLAGS 0
3938/*
3939 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3940 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3941 */
3942#define COEX_CU_RF_ON_FLAGS \
3943 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3944 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3945 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3946
3947
9636e583 3948enum {
fe1bcbfd 3949 /* un-association part */
9636e583
RR
3950 COEX_UNASSOC_IDLE = 0,
3951 COEX_UNASSOC_MANUAL_SCAN = 1,
3952 COEX_UNASSOC_AUTO_SCAN = 2,
fe1bcbfd 3953 /* calibration */
9636e583
RR
3954 COEX_CALIBRATION = 3,
3955 COEX_PERIODIC_CALIBRATION = 4,
fe1bcbfd 3956 /* connection */
9636e583 3957 COEX_CONNECTION_ESTAB = 5,
fe1bcbfd 3958 /* association part */
9636e583
RR
3959 COEX_ASSOCIATED_IDLE = 6,
3960 COEX_ASSOC_MANUAL_SCAN = 7,
3961 COEX_ASSOC_AUTO_SCAN = 8,
3962 COEX_ASSOC_ACTIVE_LEVEL = 9,
fe1bcbfd 3963 /* RF ON/OFF */
9636e583
RR
3964 COEX_RF_ON = 10,
3965 COEX_RF_OFF = 11,
3966 COEX_STAND_ALONE_DEBUG = 12,
fe1bcbfd 3967 /* IPAN */
9636e583 3968 COEX_IPAN_ASSOC_LEVEL = 13,
fe1bcbfd 3969 /* reserved */
9636e583
RR
3970 COEX_RSRVD1 = 14,
3971 COEX_RSRVD2 = 15,
3972 COEX_NUM_OF_EVENTS = 16
3973};
3974
fe1bcbfd
WYG
3975/*
3976 * Coexistence WIFI/WIMAX Command
3977 * COEX_PRIORITY_TABLE_CMD = 0x5a
3978 *
3979 */
9636e583
RR
3980struct iwl_wimax_coex_event_entry {
3981 u8 request_prio;
3982 u8 win_medium_prio;
3983 u8 reserved;
3984 u8 flags;
ba2d3587 3985} __packed;
9636e583
RR
3986
3987/* COEX flag masks */
3988
a96a27f9 3989/* Station table is valid */
9636e583 3990#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
a96a27f9 3991/* UnMask wake up src at unassociated sleep */
9636e583 3992#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
a96a27f9 3993/* UnMask wake up src at associated sleep */
9636e583
RR
3994#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3995/* Enable CoEx feature. */
3996#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3997
3998struct iwl_wimax_coex_cmd {
3999 u8 flags;
4000 u8 reserved[3];
4001 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
ba2d3587 4002} __packed;
9636e583 4003
fe1bcbfd
WYG
4004/*
4005 * Coexistence MEDIUM NOTIFICATION
4006 * COEX_MEDIUM_NOTIFICATION = 0x5b
4007 *
4008 * notification from uCode to host to indicate medium changes
4009 *
4010 */
4011/*
4012 * status field
4013 * bit 0 - 2: medium status
4014 * bit 3: medium change indication
4015 * bit 4 - 31: reserved
4016 */
4017/* status option values, (0 - 2 bits) */
4018#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
4019#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
4020#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
4021#define COEX_MEDIUM_MSK (0x7)
4022
4023/* send notification status (1 bit) */
4024#define COEX_MEDIUM_CHANGED (0x8)
4025#define COEX_MEDIUM_CHANGED_MSK (0x8)
4026#define COEX_MEDIUM_SHIFT (3)
4027
4028struct iwl_coex_medium_notification {
4029 __le32 status;
4030 __le32 events;
ba2d3587 4031} __packed;
fe1bcbfd
WYG
4032
4033/*
4034 * Coexistence EVENT Command
4035 * COEX_EVENT_CMD = 0x5c
4036 *
4037 * send from host to uCode for coex event request.
4038 */
4039/* flags options */
4040#define COEX_EVENT_REQUEST_MSK (0x1)
4041
4042struct iwl_coex_event_cmd {
4043 u8 flags;
4044 u8 event;
4045 __le16 reserved;
ba2d3587 4046} __packed;
fe1bcbfd
WYG
4047
4048struct iwl_coex_event_resp {
4049 __le32 status;
ba2d3587 4050} __packed;
fe1bcbfd
WYG
4051
4052
0288d237
JB
4053/******************************************************************************
4054 * Bluetooth Coexistence commands
4055 *
4056 *****************************************************************************/
4057
4058/*
4059 * BT Status notification
fbba9410 4060 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
0288d237
JB
4061 */
4062enum iwl_bt_coex_profile_traffic_load {
4063 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
4064 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
4065 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
4066 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
4067/*
4068 * There are no more even though below is a u8, the
4069 * indication from the BT device only has two bits.
4070 */
4071};
4072
fbba9410
WYG
4073#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
4074#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
4075 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
4076#define BT_UART_MSG_FRAME1SSN_POS (3)
4077#define BT_UART_MSG_FRAME1SSN_MSK \
4078 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
4079#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
4080#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
4081 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
4082#define BT_UART_MSG_FRAME1RESERVED_POS (6)
4083#define BT_UART_MSG_FRAME1RESERVED_MSK \
4084 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
4085
4086#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
4087#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
4088 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
4089#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
4090#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
4091 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
4092#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
4093#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
4094 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
4095#define BT_UART_MSG_FRAME2INBAND_POS (5)
4096#define BT_UART_MSG_FRAME2INBAND_MSK \
4097 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
4098#define BT_UART_MSG_FRAME2RESERVED_POS (6)
4099#define BT_UART_MSG_FRAME2RESERVED_MSK \
4100 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
4101
4102#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
4103#define BT_UART_MSG_FRAME3SCOESCO_MSK \
4104 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
4105#define BT_UART_MSG_FRAME3SNIFF_POS (1)
4106#define BT_UART_MSG_FRAME3SNIFF_MSK \
4107 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
4108#define BT_UART_MSG_FRAME3A2DP_POS (2)
4109#define BT_UART_MSG_FRAME3A2DP_MSK \
4110 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
4111#define BT_UART_MSG_FRAME3ACL_POS (3)
4112#define BT_UART_MSG_FRAME3ACL_MSK \
4113 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
4114#define BT_UART_MSG_FRAME3MASTER_POS (4)
4115#define BT_UART_MSG_FRAME3MASTER_MSK \
4116 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
4117#define BT_UART_MSG_FRAME3OBEX_POS (5)
4118#define BT_UART_MSG_FRAME3OBEX_MSK \
4119 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
4120#define BT_UART_MSG_FRAME3RESERVED_POS (6)
4121#define BT_UART_MSG_FRAME3RESERVED_MSK \
4122 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
4123
4124#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
4125#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
4126 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
4127#define BT_UART_MSG_FRAME4RESERVED_POS (6)
4128#define BT_UART_MSG_FRAME4RESERVED_MSK \
4129 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
4130
4131#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
4132#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
4133 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
4134#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
4135#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
4136 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
4137#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
4138#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
4139 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
4140#define BT_UART_MSG_FRAME5RESERVED_POS (6)
4141#define BT_UART_MSG_FRAME5RESERVED_MSK \
4142 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
4143
4144#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
4145#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
4146 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
4147#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
4148#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
4149 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
4150#define BT_UART_MSG_FRAME6RESERVED_POS (6)
4151#define BT_UART_MSG_FRAME6RESERVED_MSK \
4152 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
4153
4154#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
4155#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
4156 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
4157#define BT_UART_MSG_FRAME7INQUIRYPAGESRMODE_POS (3)
4158#define BT_UART_MSG_FRAME7INQUIRYPAGESRMODE_MSK \
4159 (0x3 << BT_UART_MSG_FRAME7INQUIRYPAGESRMODE_POS)
4160#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
4161#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
4162 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
4163#define BT_UART_MSG_FRAME7RESERVED_POS (6)
4164#define BT_UART_MSG_FRAME7RESERVED_MSK \
4165 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
4166
4167
4168struct iwl_bt_uart_msg {
4169 u8 header;
4170 u8 frame1;
4171 u8 frame2;
4172 u8 frame3;
4173 u8 frame4;
4174 u8 frame5;
4175 u8 frame6;
4176 u8 frame7;
4177} __attribute__((packed));
4178
0288d237 4179struct iwl_bt_coex_profile_notif {
fbba9410 4180 struct iwl_bt_uart_msg last_bt_uart_msg;
0288d237
JB
4181 u8 bt_status; /* 0 - off, 1 - on */
4182 u8 bt_traffic_load; /* 0 .. 3? */
4183 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
4184 u8 reserved;
4185} __attribute__((packed));
4186
aeb4a2ee
WYG
4187#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
4188#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
4189#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
4190#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
4191#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
4192#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
4193#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
0288d237
JB
4194
4195/*
4196 * BT Coexistence Priority table
4197 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
4198 */
aeb4a2ee
WYG
4199enum bt_coex_prio_table_events {
4200 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
4201 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
4202 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
4203 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
4204 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
4205 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
4206 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
4207 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
4208 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
4209 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
4210 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
4211 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
4212 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
4213 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
4214 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
4215 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
4216 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
4217 BT_COEX_PRIO_TBL_EVT_MAX,
4218};
4219
4220enum bt_coex_prio_table_priorities {
4221 BT_COEX_PRIO_TBL_DISABLED = 0,
4222 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
4223 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
4224 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
4225 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
4226 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
4227 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
4228 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
4229 BT_COEX_PRIO_TBL_MAX,
4230};
4231
0288d237 4232struct iwl_bt_coex_prio_table_cmd {
aeb4a2ee 4233 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
0288d237
JB
4234} __attribute__((packed));
4235
aeb4a2ee
WYG
4236#define IWL_BT_COEX_ENV_CLOSE 0
4237#define IWL_BT_COEX_ENV_OPEN 1
0288d237
JB
4238/*
4239 * BT Protection Envelope
4240 * REPLY_BT_COEX_PROT_ENV = 0xcd
4241 */
4242struct iwl_bt_coex_prot_env_cmd {
aeb4a2ee 4243 u8 action; /* 0 = closed, 1 = open */
0288d237
JB
4244 u8 type; /* 0 .. 15 */
4245 u8 reserved[2];
4246} __attribute__((packed));
4247
b481de9c
ZY
4248/******************************************************************************
4249 * (13)
4250 * Union of all expected notifications/responses:
4251 *
4252 *****************************************************************************/
4253
db11d634 4254struct iwl_rx_packet {
2f301227
ZY
4255 /*
4256 * The first 4 bytes of the RX frame header contain both the RX frame
4257 * size and some flags.
4258 * Bit fields:
4259 * 31: flag flush RB request
4260 * 30: flag ignore TC (terminal counter) request
4261 * 29: flag fast IRQ request
4262 * 28-14: Reserved
4263 * 13-00: RX frame size
4264 */
396887a2 4265 __le32 len_n_flags;
857485c0 4266 struct iwl_cmd_header hdr;
b481de9c 4267 union {
3d24a9f7
TW
4268 struct iwl3945_rx_frame rx_frame;
4269 struct iwl3945_tx_resp tx_resp;
4270 struct iwl3945_beacon_notif beacon_status;
4271
885ba202 4272 struct iwl_alive_resp alive_frame;
2aa6ab86
TW
4273 struct iwl_spectrum_notification spectrum_notif;
4274 struct iwl_csa_notification csa_notif;
885ba202 4275 struct iwl_error_resp err_resp;
2aa6ab86 4276 struct iwl_card_state_notif card_state_notif;
7a999bf0
TW
4277 struct iwl_add_sta_resp add_sta;
4278 struct iwl_rem_sta_resp rem_sta;
2aa6ab86
TW
4279 struct iwl_sleep_notification sleep_notif;
4280 struct iwl_spectrum_resp spectrum;
8f91aecb 4281 struct iwl_notif_statistics stats;
7980fba5 4282 struct iwl_bt_notif_statistics stats_bt;
653fa4a0 4283 struct iwl_compressed_ba_resp compressed_ba;
2aa6ab86 4284 struct iwl_missed_beacon_notif missed_beacon;
fe1bcbfd
WYG
4285 struct iwl_coex_medium_notification coex_medium_notif;
4286 struct iwl_coex_event_resp coex_event;
0288d237 4287 struct iwl_bt_coex_profile_notif bt_coex_profile_notif;
b481de9c
ZY
4288 __le32 status;
4289 u8 raw[0];
4290 } u;
ba2d3587 4291} __packed;
b481de9c 4292
a3139c59 4293int iwl_agn_check_rxon_cmd(struct iwl_priv *priv);
8f5c87dc 4294
6a63578d 4295#endif /* __iwl_commands_h__ */
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