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[linux.git] / drivers / serial / crisv10.c
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1da177e4
LT		 1/* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
2 *
3 * Serial port driver for the ETRAX 100LX chip
4 *
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
6 *
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
8 *
9 * $Log: serial.c,v $
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
12 *
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
17 *
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
20 *
21 * Revision 1.22 2004/08/24 06:12:20 starvik
22 * Whitespace cleanup
23 *
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
26 *
27 * Revision 1.19 2004/05/17 13:12:15 starvik
28 * Kernel console hook
29 * Big merge from Linux 2.4 still pending.
30 *
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
33 *
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
36 *
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
40 *
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
44 *
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
47 * parity (mark/space)
48 *
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
55 *
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
58 *
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
61 *
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
64 *
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
67 *
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
71 *
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
75 *
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
78 *
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
82 *
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
89 *
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
93 * to make it work.
94 *
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
97 *
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
107 *
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
111 *
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
114 *
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
117 *
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
120 *
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
123 *
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
128 * latencies.
129 *
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
135 *
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
138 *
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
141 *
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
149 *
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
152 * char.
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
155 *
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
160 *
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
163 *
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
166 *
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
177 *
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
183 *
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
186 *
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
191 *
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
194 *
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
198 *
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
201 *
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
204 *
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
207 *
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
210 * where used.
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
214 *
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
219 * to 1
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
222 * serial driver.
223 *
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
226 *
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
230 *
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
233 *
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
236 *
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
242 *
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
245 *
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
247 * Spellling check
248 *
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
251 * Needed by USB
252 *
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
256 *
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
259 *
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
262 *
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
267 *
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
271 *
272 * Items worth noticing:
273 *
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
280 *
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
283 *
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
286 *
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
289 *
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
292 *
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
297 *
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
300 *
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
303 *
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
310 *
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
314 * do the work.
315 *
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
318 *
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
321 *
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
328 *
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
332 * * Indentation fix
333 *
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
337 *
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
340 *
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
346 *
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
349 *
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
354 *
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
356 * Support RS485
357 *
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
360 *
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
365 *
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
368 *
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
371 * * Removed old code
372 *
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
379 *
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
383 *
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
385 * 2.0.34 updates
386 *
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
393 *
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
397 * the input DMA.
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
405 *
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
408 *
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
422 *
423 *
424 */
425
426static char *serial_version = "$Revision: 1.25 $";
427
428#include <linux/config.h>
1da177e4
LT		 429#include <linux/types.h>
430#include <linux/errno.h>
431#include <linux/signal.h>
432#include <linux/sched.h>
433#include <linux/timer.h>
434#include <linux/interrupt.h>
435#include <linux/tty.h>
436#include <linux/tty_flip.h>
437#include <linux/major.h>
438#include <linux/string.h>
439#include <linux/fcntl.h>
440#include <linux/mm.h>
441#include <linux/slab.h>
442#include <linux/init.h>
443#include <asm/uaccess.h>
444#include <linux/kernel.h>
445
446#include <asm/io.h>
447#include <asm/irq.h>
448#include <asm/system.h>
1da177e4
LT		 449#include <asm/bitops.h>
450#include <linux/delay.h>
451
452#include <asm/arch/svinto.h>
453
454/* non-arch dependent serial structures are in linux/serial.h */
455#include <linux/serial.h>
456/* while we keep our own stuff (struct e100_serial) in a local .h file */
457#include "serial.h"
458#include <asm/fasttimer.h>
459
460#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
461#ifndef CONFIG_ETRAX_FAST_TIMER
462#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
463#endif
464#endif
465
466#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
467 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
468#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
469#endif
470
471#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
472#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
473#endif
474
475/*
476 * All of the compatibilty code so we can compile serial.c against
477 * older kernels is hidden in serial_compat.h
478 */
479#if defined(LOCAL_HEADERS)
480#include "serial_compat.h"
481#endif
482
483#define _INLINE_ inline
484
485struct tty_driver *serial_driver;
486
487/* serial subtype definitions */
488#ifndef SERIAL_TYPE_NORMAL
489#define SERIAL_TYPE_NORMAL 1
490#endif
491
492/* number of characters left in xmit buffer before we ask for more */
493#define WAKEUP_CHARS 256
494
495//#define SERIAL_DEBUG_INTR
496//#define SERIAL_DEBUG_OPEN
497//#define SERIAL_DEBUG_FLOW
498//#define SERIAL_DEBUG_DATA
499//#define SERIAL_DEBUG_THROTTLE
500//#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
501//#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
502
503/* Enable this to use serial interrupts to handle when you
504 expect the first received event on the serial port to
505 be an error, break or similar. Used to be able to flash IRMA
506 from eLinux */
507#define SERIAL_HANDLE_EARLY_ERRORS
508
509/* Defined and used in n_tty.c, but we need it here as well */
510#define TTY_THRESHOLD_THROTTLE 128
511
512/* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
513 * must not be to high or flow control won't work if we leave it to the tty
514 * layer so we have our own throttling in flush_to_flip
515 * TTY_FLIPBUF_SIZE=512,
516 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
517 * BUF_SIZE can't be > 128
518 */
519/* Currently 16 descriptors x 128 bytes = 2048 bytes */
520#define SERIAL_DESCR_BUF_SIZE 256
521
522#define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
523#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
524
525/* We don't want to load the system with massive fast timer interrupt
526 * on high baudrates so limit it to 250 us (4kHz) */
527#define MIN_FLUSH_TIME_USEC 250
528
529/* Add an x here to log a lot of timer stuff */
530#define TIMERD(x)
531/* Debug details of interrupt handling */
532#define DINTR1(x) /* irq on/off, errors */
533#define DINTR2(x) /* tx and rx */
534/* Debug flip buffer stuff */
535#define DFLIP(x)
536/* Debug flow control and overview of data flow */
537#define DFLOW(x)
538#define DBAUD(x)
539#define DLOG_INT_TRIG(x)
540
541//#define DEBUG_LOG_INCLUDED
542#ifndef DEBUG_LOG_INCLUDED
543#define DEBUG_LOG(line, string, value)
544#else
545struct debug_log_info
546{
547 unsigned long time;
548 unsigned long timer_data;
549// int line;
550 const char *string;
551 int value;
552};
553#define DEBUG_LOG_SIZE 4096
554
555struct debug_log_info debug_log[DEBUG_LOG_SIZE];
556int debug_log_pos = 0;
557
558#define DEBUG_LOG(_line, _string, _value) do { \
559 if ((_line) == SERIAL_DEBUG_LINE) {\
560 debug_log_func(_line, _string, _value); \
561 }\
562}while(0)
563
564void debug_log_func(int line, const char *string, int value)
565{
566 if (debug_log_pos < DEBUG_LOG_SIZE) {
567 debug_log[debug_log_pos].time = jiffies;
568 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
569// debug_log[debug_log_pos].line = line;
570 debug_log[debug_log_pos].string = string;
571 debug_log[debug_log_pos].value = value;
572 debug_log_pos++;
573 }
574 /*printk(string, value);*/
575}
576#endif
577
578#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
579/* Default number of timer ticks before flushing rx fifo
580 * When using "little data, low latency applications: use 0
581 * When using "much data applications (PPP)" use ~5
582 */
583#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
584#endif
585
586unsigned long timer_data_to_ns(unsigned long timer_data);
587
588static void change_speed(struct e100_serial *info);
589static void rs_throttle(struct tty_struct * tty);
590static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
591static int rs_write(struct tty_struct * tty, int from_user,
592 const unsigned char *buf, int count);
593extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
594 const unsigned char *buf, int count);
595#ifdef CONFIG_ETRAX_RS485
596static int e100_write_rs485(struct tty_struct * tty, int from_user,
597 const unsigned char *buf, int count);
598#endif
599static int get_lsr_info(struct e100_serial * info, unsigned int *value);
600
601
602#define DEF_BAUD 115200 /* 115.2 kbit/s */
603#define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
604#define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
605/* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
606#define DEF_TX 0x80 /* or SERIAL_CTRL_B */
607
608/* offsets from R_SERIALx_CTRL */
609
610#define REG_DATA 0
611#define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
612#define REG_TR_DATA 0
613#define REG_STATUS 1
614#define REG_TR_CTRL 1
615#define REG_REC_CTRL 2
616#define REG_BAUD 3
617#define REG_XOFF 4 /* this is a 32 bit register */
618
619/* The bitfields are the same for all serial ports */
620#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
621#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
622#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
623#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
624#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
625
626#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
627
628/* Values for info->errorcode */
629#define ERRCODE_SET_BREAK (TTY_BREAK)
630#define ERRCODE_INSERT 0x100
631#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
632
633#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
634
635/*
636 * General note regarding the use of IO_* macros in this file:
637 *
638 * We will use the bits defined for DMA channel 6 when using various
639 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
640 * the same for all channels (which of course they are).
641 *
642 * We will also use the bits defined for serial port 0 when writing commands
643 * to the different ports, as these bits too are the same for all ports.
644 */
645
646
647/* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
648static const unsigned long e100_ser_int_mask = 0
649#ifdef CONFIG_ETRAX_SERIAL_PORT0
650| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
651#endif
652#ifdef CONFIG_ETRAX_SERIAL_PORT1
653| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
654#endif
655#ifdef CONFIG_ETRAX_SERIAL_PORT2
656| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
657#endif
658#ifdef CONFIG_ETRAX_SERIAL_PORT3
659| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
660#endif
661;
662unsigned long r_alt_ser_baudrate_shadow = 0;
663
664/* this is the data for the four serial ports in the etrax100 */
665/* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
666/* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
667
668static struct e100_serial rs_table[] = {
669 { .baud = DEF_BAUD,
670 .port = (unsigned char *)R_SERIAL0_CTRL,
671 .irq = 1U << 12, /* uses DMA 6 and 7 */
672 .oclrintradr = R_DMA_CH6_CLR_INTR,
673 .ofirstadr = R_DMA_CH6_FIRST,
674 .ocmdadr = R_DMA_CH6_CMD,
675 .ostatusadr = R_DMA_CH6_STATUS,
676 .iclrintradr = R_DMA_CH7_CLR_INTR,
677 .ifirstadr = R_DMA_CH7_FIRST,
678 .icmdadr = R_DMA_CH7_CMD,
679 .idescradr = R_DMA_CH7_DESCR,
680 .flags = STD_FLAGS,
681 .rx_ctrl = DEF_RX,
682 .tx_ctrl = DEF_TX,
683 .iseteop = 2,
684#ifdef CONFIG_ETRAX_SERIAL_PORT0
685 .enabled = 1,
686#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
687 .dma_out_enabled = 1,
688#else
689 .dma_out_enabled = 0,
690#endif
691#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
692 .dma_in_enabled = 1,
693#else
694 .dma_in_enabled = 0
695#endif
696#else
697 .enabled = 0,
698 .dma_out_enabled = 0,
699 .dma_in_enabled = 0
700#endif
701
702}, /* ttyS0 */
703#ifndef CONFIG_SVINTO_SIM
704 { .baud = DEF_BAUD,
705 .port = (unsigned char *)R_SERIAL1_CTRL,
706 .irq = 1U << 16, /* uses DMA 8 and 9 */
707 .oclrintradr = R_DMA_CH8_CLR_INTR,
708 .ofirstadr = R_DMA_CH8_FIRST,
709 .ocmdadr = R_DMA_CH8_CMD,
710 .ostatusadr = R_DMA_CH8_STATUS,
711 .iclrintradr = R_DMA_CH9_CLR_INTR,
712 .ifirstadr = R_DMA_CH9_FIRST,
713 .icmdadr = R_DMA_CH9_CMD,
714 .idescradr = R_DMA_CH9_DESCR,
715 .flags = STD_FLAGS,
716 .rx_ctrl = DEF_RX,
717 .tx_ctrl = DEF_TX,
718 .iseteop = 3,
719#ifdef CONFIG_ETRAX_SERIAL_PORT1
720 .enabled = 1,
721#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
722 .dma_out_enabled = 1,
723#else
724 .dma_out_enabled = 0,
725#endif
726#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
727 .dma_in_enabled = 1,
728#else
729 .dma_in_enabled = 0
730#endif
731#else
732 .enabled = 0,
733 .dma_out_enabled = 0,
734 .dma_in_enabled = 0
735#endif
736}, /* ttyS1 */
737
738 { .baud = DEF_BAUD,
739 .port = (unsigned char *)R_SERIAL2_CTRL,
740 .irq = 1U << 4, /* uses DMA 2 and 3 */
741 .oclrintradr = R_DMA_CH2_CLR_INTR,
742 .ofirstadr = R_DMA_CH2_FIRST,
743 .ocmdadr = R_DMA_CH2_CMD,
744 .ostatusadr = R_DMA_CH2_STATUS,
745 .iclrintradr = R_DMA_CH3_CLR_INTR,
746 .ifirstadr = R_DMA_CH3_FIRST,
747 .icmdadr = R_DMA_CH3_CMD,
748 .idescradr = R_DMA_CH3_DESCR,
749 .flags = STD_FLAGS,
750 .rx_ctrl = DEF_RX,
751 .tx_ctrl = DEF_TX,
752 .iseteop = 0,
753#ifdef CONFIG_ETRAX_SERIAL_PORT2
754 .enabled = 1,
755#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
756 .dma_out_enabled = 1,
757#else
758 .dma_out_enabled = 0,
759#endif
760#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
761 .dma_in_enabled = 1,
762#else
763 .dma_in_enabled = 0
764#endif
765#else
766 .enabled = 0,
767 .dma_out_enabled = 0,
768 .dma_in_enabled = 0
769#endif
770 }, /* ttyS2 */
771
772 { .baud = DEF_BAUD,
773 .port = (unsigned char *)R_SERIAL3_CTRL,
774 .irq = 1U << 8, /* uses DMA 4 and 5 */
775 .oclrintradr = R_DMA_CH4_CLR_INTR,
776 .ofirstadr = R_DMA_CH4_FIRST,
777 .ocmdadr = R_DMA_CH4_CMD,
778 .ostatusadr = R_DMA_CH4_STATUS,
779 .iclrintradr = R_DMA_CH5_CLR_INTR,
780 .ifirstadr = R_DMA_CH5_FIRST,
781 .icmdadr = R_DMA_CH5_CMD,
782 .idescradr = R_DMA_CH5_DESCR,
783 .flags = STD_FLAGS,
784 .rx_ctrl = DEF_RX,
785 .tx_ctrl = DEF_TX,
786 .iseteop = 1,
787#ifdef CONFIG_ETRAX_SERIAL_PORT3
788 .enabled = 1,
789#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
790 .dma_out_enabled = 1,
791#else
792 .dma_out_enabled = 0,
793#endif
794#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
795 .dma_in_enabled = 1,
796#else
797 .dma_in_enabled = 0
798#endif
799#else
800 .enabled = 0,
801 .dma_out_enabled = 0,
802 .dma_in_enabled = 0
803#endif
804 } /* ttyS3 */
805#endif
806};
807
808
809#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
810
811static struct termios *serial_termios[NR_PORTS];
812static struct termios *serial_termios_locked[NR_PORTS];
813#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
814static struct fast_timer fast_timers[NR_PORTS];
815#endif
816
817#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
818#define PROCSTAT(x) x
819struct ser_statistics_type {
820 int overrun_cnt;
821 int early_errors_cnt;
822 int ser_ints_ok_cnt;
823 int errors_cnt;
824 unsigned long int processing_flip;
825 unsigned long processing_flip_still_room;
826 unsigned long int timeout_flush_cnt;
827 int rx_dma_ints;
828 int tx_dma_ints;
829 int rx_tot;
830 int tx_tot;
831};
832
833static struct ser_statistics_type ser_stat[NR_PORTS];
834
835#else
836
837#define PROCSTAT(x)
838
839#endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
840
841/* RS-485 */
842#if defined(CONFIG_ETRAX_RS485)
843#ifdef CONFIG_ETRAX_FAST_TIMER
844static struct fast_timer fast_timers_rs485[NR_PORTS];
845#endif
846#if defined(CONFIG_ETRAX_RS485_ON_PA)
847static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
848#endif
849#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
850static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
851#endif
852#endif
853
854/* Info and macros needed for each ports extra control/status signals. */
855#define E100_STRUCT_PORT(line, pinname) \
856 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
857 (R_PORT_PA_DATA): ( \
858 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
859 (R_PORT_PB_DATA):&dummy_ser[line]))
860
861#define E100_STRUCT_SHADOW(line, pinname) \
862 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
863 (&port_pa_data_shadow): ( \
864 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
865 (&port_pb_data_shadow):&dummy_ser[line]))
866#define E100_STRUCT_MASK(line, pinname) \
867 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
868 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
869 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
870 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
871
872#define DUMMY_DTR_MASK 1
873#define DUMMY_RI_MASK 2
874#define DUMMY_DSR_MASK 4
875#define DUMMY_CD_MASK 8
876static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
877
878/* If not all status pins are used or disabled, use mixed mode */
879#ifdef CONFIG_ETRAX_SERIAL_PORT0
880
881#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
882
883#if SER0_PA_BITSUM != -4
884# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
885# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
886# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
887# endif
888# endif
889# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
890# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
891# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
892# endif
893# endif
894# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
895# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
896# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
897# endif
898# endif
899# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
900# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
901# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
902# endif
903# endif
904#endif
905
906#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
907
908#if SER0_PB_BITSUM != -4
909# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
910# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
911# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
912# endif
913# endif
914# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
915# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
916# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
917# endif
918# endif
919# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
920# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
921# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
922# endif
923# endif
924# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
925# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
926# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
927# endif
928# endif
929#endif
930
931#endif /* PORT0 */
932
933
934#ifdef CONFIG_ETRAX_SERIAL_PORT1
935
936#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
937
938#if SER1_PA_BITSUM != -4
939# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
940# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
941# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
942# endif
943# endif
944# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
945# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
946# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
947# endif
948# endif
949# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
950# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
951# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
952# endif
953# endif
954# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
955# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
956# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
957# endif
958# endif
959#endif
960
961#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
962
963#if SER1_PB_BITSUM != -4
964# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
965# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
966# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
967# endif
968# endif
969# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
970# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
971# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
972# endif
973# endif
974# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
975# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
976# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
977# endif
978# endif
979# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
980# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
981# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
982# endif
983# endif
984#endif
985
986#endif /* PORT1 */
987
988#ifdef CONFIG_ETRAX_SERIAL_PORT2
989
990#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
991
992#if SER2_PA_BITSUM != -4
993# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
994# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
995# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
996# endif
997# endif
998# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
999# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1000# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1001# endif
1002# endif
1003# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1004# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1005# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1006# endif
1007# endif
1008# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1009# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1010# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1011# endif
1012# endif
1013#endif
1014
1015#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1016
1017#if SER2_PB_BITSUM != -4
1018# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1019# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1020# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1021# endif
1022# endif
1023# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1024# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1025# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1026# endif
1027# endif
1028# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1029# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1030# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1031# endif
1032# endif
1033# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1034# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1035# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1036# endif
1037# endif
1038#endif
1039
1040#endif /* PORT2 */
1041
1042#ifdef CONFIG_ETRAX_SERIAL_PORT3
1043
1044#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1045
1046#if SER3_PA_BITSUM != -4
1047# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1048# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1049# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1050# endif
1051# endif
1052# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1053# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1054# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1055# endif
1056# endif
1057# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1058# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1059# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1060# endif
1061# endif
1062# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1063# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1064# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1065# endif
1066# endif
1067#endif
1068
1069#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1070
1071#if SER3_PB_BITSUM != -4
1072# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1073# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1074# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1075# endif
1076# endif
1077# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1078# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1079# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1080# endif
1081# endif
1082# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1083# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1084# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1085# endif
1086# endif
1087# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1088# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1089# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1090# endif
1091# endif
1092#endif
1093
1094#endif /* PORT3 */
1095
1096
1097#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1098 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1099 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1100 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1101#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1102#endif
1103
1104#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1105/* The pins can be mixed on PA and PB */
1106#define CONTROL_PINS_PORT_NOT_USED(line) \
1107 &dummy_ser[line], &dummy_ser[line], \
1108 &dummy_ser[line], &dummy_ser[line], \
1109 &dummy_ser[line], &dummy_ser[line], \
1110 &dummy_ser[line], &dummy_ser[line], \
1111 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1112
1113
1114struct control_pins
1115{
1116 volatile unsigned char *dtr_port;
1117 unsigned char *dtr_shadow;
1118 volatile unsigned char *ri_port;
1119 unsigned char *ri_shadow;
1120 volatile unsigned char *dsr_port;
1121 unsigned char *dsr_shadow;
1122 volatile unsigned char *cd_port;
1123 unsigned char *cd_shadow;
1124
1125 unsigned char dtr_mask;
1126 unsigned char ri_mask;
1127 unsigned char dsr_mask;
1128 unsigned char cd_mask;
1129};
1130
1131static const struct control_pins e100_modem_pins[NR_PORTS] =
1132{
1133 /* Ser 0 */
1134 {
1135#ifdef CONFIG_ETRAX_SERIAL_PORT0
1136 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1137 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1138 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1139 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1140 E100_STRUCT_MASK(0,DTR),
1141 E100_STRUCT_MASK(0,RI),
1142 E100_STRUCT_MASK(0,DSR),
1143 E100_STRUCT_MASK(0,CD)
1144#else
1145 CONTROL_PINS_PORT_NOT_USED(0)
1146#endif
1147 },
1148
1149 /* Ser 1 */
1150 {
1151#ifdef CONFIG_ETRAX_SERIAL_PORT1
1152 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1153 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1154 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1155 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1156 E100_STRUCT_MASK(1,DTR),
1157 E100_STRUCT_MASK(1,RI),
1158 E100_STRUCT_MASK(1,DSR),
1159 E100_STRUCT_MASK(1,CD)
1160#else
1161 CONTROL_PINS_PORT_NOT_USED(1)
1162#endif
1163 },
1164
1165 /* Ser 2 */
1166 {
1167#ifdef CONFIG_ETRAX_SERIAL_PORT2
1168 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1169 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1170 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1171 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1172 E100_STRUCT_MASK(2,DTR),
1173 E100_STRUCT_MASK(2,RI),
1174 E100_STRUCT_MASK(2,DSR),
1175 E100_STRUCT_MASK(2,CD)
1176#else
1177 CONTROL_PINS_PORT_NOT_USED(2)
1178#endif
1179 },
1180
1181 /* Ser 3 */
1182 {
1183#ifdef CONFIG_ETRAX_SERIAL_PORT3
1184 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1185 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1186 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1187 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1188 E100_STRUCT_MASK(3,DTR),
1189 E100_STRUCT_MASK(3,RI),
1190 E100_STRUCT_MASK(3,DSR),
1191 E100_STRUCT_MASK(3,CD)
1192#else
1193 CONTROL_PINS_PORT_NOT_USED(3)
1194#endif
1195 }
1196};
1197#else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1198
1199/* All pins are on either PA or PB for each serial port */
1200#define CONTROL_PINS_PORT_NOT_USED(line) \
1201 &dummy_ser[line], &dummy_ser[line], \
1202 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1203
1204
1205struct control_pins
1206{
1207 volatile unsigned char *port;
1208 unsigned char *shadow;
1209
1210 unsigned char dtr_mask;
1211 unsigned char ri_mask;
1212 unsigned char dsr_mask;
1213 unsigned char cd_mask;
1214};
1215
1216#define dtr_port port
1217#define dtr_shadow shadow
1218#define ri_port port
1219#define ri_shadow shadow
1220#define dsr_port port
1221#define dsr_shadow shadow
1222#define cd_port port
1223#define cd_shadow shadow
1224
1225static const struct control_pins e100_modem_pins[NR_PORTS] =
1226{
1227 /* Ser 0 */
1228 {
1229#ifdef CONFIG_ETRAX_SERIAL_PORT0
1230 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1231 E100_STRUCT_MASK(0,DTR),
1232 E100_STRUCT_MASK(0,RI),
1233 E100_STRUCT_MASK(0,DSR),
1234 E100_STRUCT_MASK(0,CD)
1235#else
1236 CONTROL_PINS_PORT_NOT_USED(0)
1237#endif
1238 },
1239
1240 /* Ser 1 */
1241 {
1242#ifdef CONFIG_ETRAX_SERIAL_PORT1
1243 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1244 E100_STRUCT_MASK(1,DTR),
1245 E100_STRUCT_MASK(1,RI),
1246 E100_STRUCT_MASK(1,DSR),
1247 E100_STRUCT_MASK(1,CD)
1248#else
1249 CONTROL_PINS_PORT_NOT_USED(1)
1250#endif
1251 },
1252
1253 /* Ser 2 */
1254 {
1255#ifdef CONFIG_ETRAX_SERIAL_PORT2
1256 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1257 E100_STRUCT_MASK(2,DTR),
1258 E100_STRUCT_MASK(2,RI),
1259 E100_STRUCT_MASK(2,DSR),
1260 E100_STRUCT_MASK(2,CD)
1261#else
1262 CONTROL_PINS_PORT_NOT_USED(2)
1263#endif
1264 },
1265
1266 /* Ser 3 */
1267 {
1268#ifdef CONFIG_ETRAX_SERIAL_PORT3
1269 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1270 E100_STRUCT_MASK(3,DTR),
1271 E100_STRUCT_MASK(3,RI),
1272 E100_STRUCT_MASK(3,DSR),
1273 E100_STRUCT_MASK(3,CD)
1274#else
1275 CONTROL_PINS_PORT_NOT_USED(3)
1276#endif
1277 }
1278};
1279#endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1280
1281#define E100_RTS_MASK 0x20
1282#define E100_CTS_MASK 0x40
1283
1284/* All serial port signals are active low:
1285 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1286 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1287 *
1288 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1289 */
1290
1291/* Output */
1292#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1293/* Input */
1294#define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1295
1296/* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1297/* Is an output */
1298#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1299
1300/* Normally inputs */
1301#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1302#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1303
1304/* Input */
1305#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1306
1307
1308/*
1309 * tmp_buf is used as a temporary buffer by serial_write. We need to
1310 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1311 * and some other program tries to do a serial write at the same time.
1312 * Since the lock will only come under contention when the system is
1313 * swapping and available memory is low, it makes sense to share one
1314 * buffer across all the serial ports, since it significantly saves
1315 * memory if large numbers of serial ports are open.
1316 */
1317static unsigned char *tmp_buf;
1318#ifdef DECLARE_MUTEX
1319static DECLARE_MUTEX(tmp_buf_sem);
1320#else
1321static struct semaphore tmp_buf_sem = MUTEX;
1322#endif
1323
1324/* Calculate the chartime depending on baudrate, numbor of bits etc. */
1325static void update_char_time(struct e100_serial * info)
1326{
1327 tcflag_t cflags = info->tty->termios->c_cflag;
1328 int bits;
1329
1330 /* calc. number of bits / data byte */
1331 /* databits + startbit and 1 stopbit */
1332 if ((cflags & CSIZE) == CS7)
1333 bits = 9;
1334 else
1335 bits = 10;
1336
1337 if (cflags & CSTOPB) /* 2 stopbits ? */
1338 bits++;
1339
1340 if (cflags & PARENB) /* parity bit ? */
1341 bits++;
1342
1343 /* calc timeout */
1344 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1345 info->flush_time_usec = 4*info->char_time_usec;
1346 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1347 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1348
1349}
1350
1351/*
1352 * This function maps from the Bxxxx defines in asm/termbits.h into real
1353 * baud rates.
1354 */
1355
1356static int
1357cflag_to_baud(unsigned int cflag)
1358{
1359 static int baud_table[] = {
1360 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1361 4800, 9600, 19200, 38400 };
1362
1363 static int ext_baud_table[] = {
1364 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1365 0, 0, 0, 0, 0, 0, 0, 0 };
1366
1367 if (cflag & CBAUDEX)
1368 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1369 else
1370 return baud_table[cflag & CBAUD];
1371}
1372
1373/* and this maps to an etrax100 hardware baud constant */
1374
1375static unsigned char
1376cflag_to_etrax_baud(unsigned int cflag)
1377{
1378 char retval;
1379
1380 static char baud_table[] = {
1381 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1382
1383 static char ext_baud_table[] = {
1384 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1385
1386 if (cflag & CBAUDEX)
1387 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1388 else
1389 retval = baud_table[cflag & CBAUD];
1390
1391 if (retval < 0) {
1392 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1393 retval = 5; /* choose default 9600 instead */
1394 }
1395
1396 return retval | (retval << 4); /* choose same for both TX and RX */
1397}
1398
1399
1400/* Various static support functions */
1401
1402/* Functions to set or clear DTR/RTS on the requested line */
1403/* It is complicated by the fact that RTS is a serial port register, while
1404 * DTR might not be implemented in the HW at all, and if it is, it can be on
1405 * any general port.
1406 */
1407
1408
1409static inline void
1410e100_dtr(struct e100_serial *info, int set)
1411{
1412#ifndef CONFIG_SVINTO_SIM
1413 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1414
1415#ifdef SERIAL_DEBUG_IO
1416 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1417 printk("ser%i shadow before 0x%02X get: %i\n",
1418 info->line, *e100_modem_pins[info->line].dtr_shadow,
1419 E100_DTR_GET(info));
1420#endif
1421 /* DTR is active low */
1422 {
1423 unsigned long flags;
1424
1425 save_flags(flags);
1426 cli();
1427 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1428 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1429 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1430 restore_flags(flags);
1431 }
1432
1433#ifdef SERIAL_DEBUG_IO
1434 printk("ser%i shadow after 0x%02X get: %i\n",
1435 info->line, *e100_modem_pins[info->line].dtr_shadow,
1436 E100_DTR_GET(info));
1437#endif
1438#endif
1439}
1440
1441/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1442 * 0=0V , 1=3.3V
1443 */
1444static inline void
1445e100_rts(struct e100_serial *info, int set)
1446{
1447#ifndef CONFIG_SVINTO_SIM
1448 unsigned long flags;
1449 save_flags(flags);
1450 cli();
1451 info->rx_ctrl &= ~E100_RTS_MASK;
1452 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1453 info->port[REG_REC_CTRL] = info->rx_ctrl;
1454 restore_flags(flags);
1455#ifdef SERIAL_DEBUG_IO
1456 printk("ser%i rts %i\n", info->line, set);
1457#endif
1458#endif
1459}
1460
1461
1462/* If this behaves as a modem, RI and CD is an output */
1463static inline void
1464e100_ri_out(struct e100_serial *info, int set)
1465{
1466#ifndef CONFIG_SVINTO_SIM
1467 /* RI is active low */
1468 {
1469 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1470 unsigned long flags;
1471
1472 save_flags(flags);
1473 cli();
1474 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1475 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1476 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1477 restore_flags(flags);
1478 }
1479#endif
1480}
1481static inline void
1482e100_cd_out(struct e100_serial *info, int set)
1483{
1484#ifndef CONFIG_SVINTO_SIM
1485 /* CD is active low */
1486 {
1487 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1488 unsigned long flags;
1489
1490 save_flags(flags);
1491 cli();
1492 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1493 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1494 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1495 restore_flags(flags);
1496 }
1497#endif
1498}
1499
1500static inline void
1501e100_disable_rx(struct e100_serial *info)
1502{
1503#ifndef CONFIG_SVINTO_SIM
1504 /* disable the receiver */
1505 info->port[REG_REC_CTRL] =
1506 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1507#endif
1508}
1509
1510static inline void
1511e100_enable_rx(struct e100_serial *info)
1512{
1513#ifndef CONFIG_SVINTO_SIM
1514 /* enable the receiver */
1515 info->port[REG_REC_CTRL] =
1516 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1517#endif
1518}
1519
1520/* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1521
1522static inline void
1523e100_disable_rxdma_irq(struct e100_serial *info)
1524{
1525#ifdef SERIAL_DEBUG_INTR
1526 printk("rxdma_irq(%d): 0\n",info->line);
1527#endif
1528 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1529 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1530}
1531
1532static inline void
1533e100_enable_rxdma_irq(struct e100_serial *info)
1534{
1535#ifdef SERIAL_DEBUG_INTR
1536 printk("rxdma_irq(%d): 1\n",info->line);
1537#endif
1538 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1539 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1540}
1541
1542/* the tx DMA uses only dma_descr interrupt */
1543
1544static _INLINE_ void
1545e100_disable_txdma_irq(struct e100_serial *info)
1546{
1547#ifdef SERIAL_DEBUG_INTR
1548 printk("txdma_irq(%d): 0\n",info->line);
1549#endif
1550 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1551 *R_IRQ_MASK2_CLR = info->irq;
1552}
1553
1554static _INLINE_ void
1555e100_enable_txdma_irq(struct e100_serial *info)
1556{
1557#ifdef SERIAL_DEBUG_INTR
1558 printk("txdma_irq(%d): 1\n",info->line);
1559#endif
1560 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1561 *R_IRQ_MASK2_SET = info->irq;
1562}
1563
1564static _INLINE_ void
1565e100_disable_txdma_channel(struct e100_serial *info)
1566{
1567 unsigned long flags;
1568
1569 /* Disable output DMA channel for the serial port in question
1570 * ( set to something other then serialX)
1571 */
1572 save_flags(flags);
1573 cli();
1574 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1575 if (info->line == 0) {
1576 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1577 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1578 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1579 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1580 }
1581 } else if (info->line == 1) {
1582 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1583 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1584 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1585 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1586 }
1587 } else if (info->line == 2) {
1588 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1589 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1590 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1591 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1592 }
1593 } else if (info->line == 3) {
1594 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1595 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1596 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1597 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1598 }
1599 }
1600 *R_GEN_CONFIG = genconfig_shadow;
1601 restore_flags(flags);
1602}
1603
1604
1605static _INLINE_ void
1606e100_enable_txdma_channel(struct e100_serial *info)
1607{
1608 unsigned long flags;
1609
1610 save_flags(flags);
1611 cli();
1612 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1613 /* Enable output DMA channel for the serial port in question */
1614 if (info->line == 0) {
1615 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1616 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1617 } else if (info->line == 1) {
1618 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1619 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1620 } else if (info->line == 2) {
1621 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1622 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1623 } else if (info->line == 3) {
1624 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1625 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1626 }
1627 *R_GEN_CONFIG = genconfig_shadow;
1628 restore_flags(flags);
1629}
1630
1631static _INLINE_ void
1632e100_disable_rxdma_channel(struct e100_serial *info)
1633{
1634 unsigned long flags;
1635
1636 /* Disable input DMA channel for the serial port in question
1637 * ( set to something other then serialX)
1638 */
1639 save_flags(flags);
1640 cli();
1641 if (info->line == 0) {
1642 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1643 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1644 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1645 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1646 }
1647 } else if (info->line == 1) {
1648 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1649 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1650 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1651 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1652 }
1653 } else if (info->line == 2) {
1654 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1655 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1656 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1657 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1658 }
1659 } else if (info->line == 3) {
1660 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1661 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1662 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1663 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1664 }
1665 }
1666 *R_GEN_CONFIG = genconfig_shadow;
1667 restore_flags(flags);
1668}
1669
1670
1671static _INLINE_ void
1672e100_enable_rxdma_channel(struct e100_serial *info)
1673{
1674 unsigned long flags;
1675
1676 save_flags(flags);
1677 cli();
1678 /* Enable input DMA channel for the serial port in question */
1679 if (info->line == 0) {
1680 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1681 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1682 } else if (info->line == 1) {
1683 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1684 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1685 } else if (info->line == 2) {
1686 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1687 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1688 } else if (info->line == 3) {
1689 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1690 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1691 }
1692 *R_GEN_CONFIG = genconfig_shadow;
1693 restore_flags(flags);
1694}
1695
1696#ifdef SERIAL_HANDLE_EARLY_ERRORS
1697/* in order to detect and fix errors on the first byte
1698 we have to use the serial interrupts as well. */
1699
1700static inline void
1701e100_disable_serial_data_irq(struct e100_serial *info)
1702{
1703#ifdef SERIAL_DEBUG_INTR
1704 printk("ser_irq(%d): 0\n",info->line);
1705#endif
1706 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1707 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1708}
1709
1710static inline void
1711e100_enable_serial_data_irq(struct e100_serial *info)
1712{
1713#ifdef SERIAL_DEBUG_INTR
1714 printk("ser_irq(%d): 1\n",info->line);
1715 printk("**** %d = %d\n",
1716 (8+2*info->line),
1717 (1U << (8+2*info->line)));
1718#endif
1719 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1720 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1721}
1722#endif
1723
1724static inline void
1725e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1726{
1727#ifdef SERIAL_DEBUG_INTR
1728 printk("ser_tx_irq(%d): 0\n",info->line);
1729#endif
1730 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1731 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1732}
1733
1734static inline void
1735e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1736{
1737#ifdef SERIAL_DEBUG_INTR
1738 printk("ser_tx_irq(%d): 1\n",info->line);
1739 printk("**** %d = %d\n",
1740 (8+1+2*info->line),
1741 (1U << (8+1+2*info->line)));
1742#endif
1743 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1744 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1745}
1746
1747static inline void e100_enable_rx_irq(struct e100_serial *info)
1748{
1749 if (info->uses_dma_in)
1750 e100_enable_rxdma_irq(info);
1751 else
1752 e100_enable_serial_data_irq(info);
1753}
1754static inline void e100_disable_rx_irq(struct e100_serial *info)
1755{
1756 if (info->uses_dma_in)
1757 e100_disable_rxdma_irq(info);
1758 else
1759 e100_disable_serial_data_irq(info);
1760}
1761
1762#if defined(CONFIG_ETRAX_RS485)
1763/* Enable RS-485 mode on selected port. This is UGLY. */
1764static int
1765e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1766{
1767 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1768
1769#if defined(CONFIG_ETRAX_RS485_ON_PA)
1770 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1771#endif
1772#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1773 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1774 rs485_port_g_bit, 1);
1775#endif
1776#if defined(CONFIG_ETRAX_RS485_LTC1387)
1777 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1778 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1779 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1780 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1781#endif
1782
1783 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1784 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1785 if (r->delay_rts_before_send >= 1000)
1786 info->rs485.delay_rts_before_send = 1000;
1787 else
1788 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1789 info->rs485.enabled = r->enabled;
1790/* printk("rts: on send = %i, after = %i, enabled = %i",
1791 info->rs485.rts_on_send,
1792 info->rs485.rts_after_sent,
1793 info->rs485.enabled
1794 );
1795*/
1796 return 0;
1797}
1798
1799static int
1800e100_write_rs485(struct tty_struct *tty, int from_user,
1801 const unsigned char *buf, int count)
1802{
1803 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1804 int old_enabled = info->rs485.enabled;
1805
1806 /* rs485 is always implicitly enabled if we're using the ioctl()
1807 * but it doesn't have to be set in the rs485_control
1808 * (to be backward compatible with old apps)
1809 * So we store, set and restore it.
1810 */
1811 info->rs485.enabled = 1;
1812 /* rs_write now deals with RS485 if enabled */
1813 count = rs_write(tty, from_user, buf, count);
1814 info->rs485.enabled = old_enabled;
1815 return count;
1816}
1817
1818#ifdef CONFIG_ETRAX_FAST_TIMER
1819/* Timer function to toggle RTS when using FAST_TIMER */
1820static void rs485_toggle_rts_timer_function(unsigned long data)
1821{
1822 struct e100_serial *info = (struct e100_serial *)data;
1823
1824 fast_timers_rs485[info->line].function = NULL;
1825 e100_rts(info, info->rs485.rts_after_sent);
1826#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1827 e100_enable_rx(info);
1828 e100_enable_rx_irq(info);
1829#endif
1830}
1831#endif
1832#endif /* CONFIG_ETRAX_RS485 */
1833
1834/*
1835 * ------------------------------------------------------------
1836 * rs_stop() and rs_start()
1837 *
1838 * This routines are called before setting or resetting tty->stopped.
1839 * They enable or disable transmitter using the XOFF registers, as necessary.
1840 * ------------------------------------------------------------
1841 */
1842
1843static void
1844rs_stop(struct tty_struct *tty)
1845{
1846 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1847 if (info) {
1848 unsigned long flags;
1849 unsigned long xoff;
1850
1851 save_flags(flags); cli();
1852 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1853 CIRC_CNT(info->xmit.head,
1854 info->xmit.tail,SERIAL_XMIT_SIZE)));
1855
1856 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1857 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1858 if (tty->termios->c_iflag & IXON ) {
1859 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1860 }
1861
1862 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1863 restore_flags(flags);
1864 }
1865}
1866
1867static void
1868rs_start(struct tty_struct *tty)
1869{
1870 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1871 if (info) {
1872 unsigned long flags;
1873 unsigned long xoff;
1874
1875 save_flags(flags); cli();
1876 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1877 CIRC_CNT(info->xmit.head,
1878 info->xmit.tail,SERIAL_XMIT_SIZE)));
1879 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1880 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1881 if (tty->termios->c_iflag & IXON ) {
1882 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1883 }
1884
1885 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1886 if (!info->uses_dma_out &&
1887 info->xmit.head != info->xmit.tail && info->xmit.buf)
1888 e100_enable_serial_tx_ready_irq(info);
1889
1890 restore_flags(flags);
1891 }
1892}
1893
1894/*
1895 * ----------------------------------------------------------------------
1896 *
1897 * Here starts the interrupt handling routines. All of the following
1898 * subroutines are declared as inline and are folded into
1899 * rs_interrupt(). They were separated out for readability's sake.
1900 *
1901 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1902 * runs with interrupts turned off. People who may want to modify
1903 * rs_interrupt() should try to keep the interrupt handler as fast as
1904 * possible. After you are done making modifications, it is not a bad
1905 * idea to do:
1906 *
1907 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1908 *
1909 * and look at the resulting assemble code in serial.s.
1910 *
1911 * - Ted Ts'o ([email protected]), 7-Mar-93
1912 * -----------------------------------------------------------------------
1913 */
1914
1915/*
1916 * This routine is used by the interrupt handler to schedule
1917 * processing in the software interrupt portion of the driver.
1918 */
1919static _INLINE_ void
1920rs_sched_event(struct e100_serial *info,
1921 int event)
1922{
1923 if (info->event & (1 << event))
1924 return;
1925 info->event |= 1 << event;
1926 schedule_work(&info->work);
1927}
1928
1929/* The output DMA channel is free - use it to send as many chars as possible
1930 * NOTES:
1931 * We don't pay attention to info->x_char, which means if the TTY wants to
1932 * use XON/XOFF it will set info->x_char but we won't send any X char!
1933 *
1934 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1935 * buffer containing the X char, and skip updating xmit. We'd also have to
1936 * check if the last sent char was the X char when we enter this function
1937 * the next time, to avoid updating xmit with the sent X value.
1938 */
1939
1940static void
1941transmit_chars_dma(struct e100_serial *info)
1942{
1943 unsigned int c, sentl;
1944 struct etrax_dma_descr *descr;
1945
1946#ifdef CONFIG_SVINTO_SIM
1947 /* This will output too little if tail is not 0 always since
1948 * we don't reloop to send the other part. Anyway this SHOULD be a
1949 * no-op - transmit_chars_dma would never really be called during sim
1950 * since rs_write does not write into the xmit buffer then.
1951 */
1952 if (info->xmit.tail)
1953 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1954 if (info->xmit.head != info->xmit.tail) {
1955 SIMCOUT(info->xmit.buf + info->xmit.tail,
1956 CIRC_CNT(info->xmit.head,
1957 info->xmit.tail,
1958 SERIAL_XMIT_SIZE));
1959 info->xmit.head = info->xmit.tail; /* move back head */
1960 info->tr_running = 0;
1961 }
1962 return;
1963#endif
1964 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1965 *info->oclrintradr =
1966 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1967 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1968
1969#ifdef SERIAL_DEBUG_INTR
1970 if (info->line == SERIAL_DEBUG_LINE)
1971 printk("tc\n");
1972#endif
1973 if (!info->tr_running) {
1974 /* weirdo... we shouldn't get here! */
1975 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1976 return;
1977 }
1978
1979 descr = &info->tr_descr;
1980
1981 /* first get the amount of bytes sent during the last DMA transfer,
1982 and update xmit accordingly */
1983
1984 /* if the stop bit was not set, all data has been sent */
1985 if (!(descr->status & d_stop)) {
1986 sentl = descr->sw_len;
1987 } else
1988 /* otherwise we find the amount of data sent here */
1989 sentl = descr->hw_len;
1990
1991 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1992
1993 /* update stats */
1994 info->icount.tx += sentl;
1995
1996 /* update xmit buffer */
1997 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1998
1999 /* if there is only a few chars left in the buf, wake up the blocked
2000 write if any */
2001 if (CIRC_CNT(info->xmit.head,
2002 info->xmit.tail,
2003 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2004 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2005
2006 /* find out the largest amount of consecutive bytes we want to send now */
2007
2008 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2009
2010 /* Don't send all in one DMA transfer - divide it so we wake up
2011 * application before all is sent
2012 */
2013
2014 if (c >= 4*WAKEUP_CHARS)
2015 c = c/2;
2016
2017 if (c <= 0) {
2018 /* our job here is done, don't schedule any new DMA transfer */
2019 info->tr_running = 0;
2020
2021#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2022 if (info->rs485.enabled) {
2023 /* Set a short timer to toggle RTS */
2024 start_one_shot_timer(&fast_timers_rs485[info->line],
2025 rs485_toggle_rts_timer_function,
2026 (unsigned long)info,
2027 info->char_time_usec*2,
2028 "RS-485");
2029 }
2030#endif /* RS485 */
2031 return;
2032 }
2033
2034 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2035 /* set up the descriptor correctly for output */
2036 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2037 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2038 descr->sw_len = c;
2039 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2040 descr->status = 0;
2041
2042 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2043 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2044
2045 /* DMA is now running (hopefully) */
2046} /* transmit_chars_dma */
2047
2048static void
2049start_transmit(struct e100_serial *info)
2050{
2051#if 0
2052 if (info->line == SERIAL_DEBUG_LINE)
2053 printk("x\n");
2054#endif
2055
2056 info->tr_descr.sw_len = 0;
2057 info->tr_descr.hw_len = 0;
2058 info->tr_descr.status = 0;
2059 info->tr_running = 1;
2060 if (info->uses_dma_out)
2061 transmit_chars_dma(info);
2062 else
2063 e100_enable_serial_tx_ready_irq(info);
2064} /* start_transmit */
2065
2066#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2067static int serial_fast_timer_started = 0;
2068static int serial_fast_timer_expired = 0;
2069static void flush_timeout_function(unsigned long data);
2070#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2071 unsigned long timer_flags; \
2072 save_flags(timer_flags); \
2073 cli(); \
2074 if (fast_timers[info->line].function == NULL) { \
2075 serial_fast_timer_started++; \
2076 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2077 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2078 start_one_shot_timer(&fast_timers[info->line], \
2079 flush_timeout_function, \
2080 (unsigned long)info, \
2081 (usec), \
2082 string); \
2083 } \
2084 else { \
2085 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2086 } \
2087 restore_flags(timer_flags); \
2088}
2089#define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2090
2091#else
2092#define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2093#define START_FLUSH_FAST_TIMER(info, string)
2094#endif
2095
2096static struct etrax_recv_buffer *
2097alloc_recv_buffer(unsigned int size)
2098{
2099 struct etrax_recv_buffer *buffer;
2100
2101 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2102 return NULL;
2103
2104 buffer->next = NULL;
2105 buffer->length = 0;
2106 buffer->error = TTY_NORMAL;
2107
2108 return buffer;
2109}
2110
2111static void
2112append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2113{
2114 unsigned long flags;
2115
2116 save_flags(flags);
2117 cli();
2118
2119 if (!info->first_recv_buffer)
2120 info->first_recv_buffer = buffer;
2121 else
2122 info->last_recv_buffer->next = buffer;
2123
2124 info->last_recv_buffer = buffer;
2125
2126 info->recv_cnt += buffer->length;
2127 if (info->recv_cnt > info->max_recv_cnt)
2128 info->max_recv_cnt = info->recv_cnt;
2129
2130 restore_flags(flags);
2131}
2132
2133static int
2134add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2135{
2136 struct etrax_recv_buffer *buffer;
2137 if (info->uses_dma_in) {
2138 if (!(buffer = alloc_recv_buffer(4)))
2139 return 0;
2140
2141 buffer->length = 1;
2142 buffer->error = flag;
2143 buffer->buffer[0] = data;
2144
2145 append_recv_buffer(info, buffer);
2146
2147 info->icount.rx++;
2148 } else {
2149 struct tty_struct *tty = info->tty;
2150 *tty->flip.char_buf_ptr = data;
2151 *tty->flip.flag_buf_ptr = flag;
2152 tty->flip.flag_buf_ptr++;
2153 tty->flip.char_buf_ptr++;
2154 tty->flip.count++;
2155 info->icount.rx++;
2156 }
2157
2158 return 1;
2159}
2160
2161extern _INLINE_ unsigned int
2162handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
2163{
2164 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2165
2166 if (info->recv_cnt + recvl > 65536) {
2167 printk(KERN_CRIT
2168 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2169 return 0;
2170 }
2171
2172 buffer->length = recvl;
2173
2174 if (info->errorcode == ERRCODE_SET_BREAK)
2175 buffer->error = TTY_BREAK;
2176 info->errorcode = 0;
2177
2178 append_recv_buffer(info, buffer);
2179
2180 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2181 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2182
2183 descr->buf = virt_to_phys(buffer->buffer);
2184
2185 return recvl;
2186}
2187
2188static _INLINE_ unsigned int
2189handle_all_descr_data(struct e100_serial *info)
2190{
2191 struct etrax_dma_descr *descr;
2192 unsigned int recvl;
2193 unsigned int ret = 0;
2194
2195 while (1)
2196 {
2197 descr = &info->rec_descr[info->cur_rec_descr];
2198
2199 if (descr == phys_to_virt(*info->idescradr))
2200 break;
2201
2202 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2203 info->cur_rec_descr = 0;
2204
2205 /* find out how many bytes were read */
2206
2207 /* if the eop bit was not set, all data has been received */
2208 if (!(descr->status & d_eop)) {
2209 recvl = descr->sw_len;
2210 } else {
2211 /* otherwise we find the amount of data received here */
2212 recvl = descr->hw_len;
2213 }
2214
2215 /* Reset the status information */
2216 descr->status = 0;
2217
2218 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2219 if (info->tty->stopped) {
2220 unsigned char *buf = phys_to_virt(descr->buf);
2221 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2222 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2223 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2224 }
2225 );
2226
2227 /* update stats */
2228 info->icount.rx += recvl;
2229
2230 ret += handle_descr_data(info, descr, recvl);
2231 }
2232
2233 return ret;
2234}
2235
2236static _INLINE_ void
2237receive_chars_dma(struct e100_serial *info)
2238{
2239 struct tty_struct *tty;
2240 unsigned char rstat;
2241
2242#ifdef CONFIG_SVINTO_SIM
2243 /* No receive in the simulator. Will probably be when the rest of
2244 * the serial interface works, and this piece will just be removed.
2245 */
2246 return;
2247#endif
2248
2249 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2250 *info->iclrintradr =
2251 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2252 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2253
2254 tty = info->tty;
2255 if (!tty) /* Something wrong... */
2256 return;
2257
2258#ifdef SERIAL_HANDLE_EARLY_ERRORS
2259 if (info->uses_dma_in)
2260 e100_enable_serial_data_irq(info);
2261#endif
2262
2263 if (info->errorcode == ERRCODE_INSERT_BREAK)
2264 add_char_and_flag(info, '\0', TTY_BREAK);
2265
2266 handle_all_descr_data(info);
2267
2268 /* Read the status register to detect errors */
2269 rstat = info->port[REG_STATUS];
2270 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2271 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2272 }
2273
2274 if (rstat & SER_ERROR_MASK) {
2275 /* If we got an error, we must reset it by reading the
2276 * data_in field
2277 */
2278 unsigned char data = info->port[REG_DATA];
2279
2280 PROCSTAT(ser_stat[info->line].errors_cnt++);
2281 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2282 ((rstat & SER_ERROR_MASK) << 8) | data);
2283
2284 if (rstat & SER_PAR_ERR_MASK)
2285 add_char_and_flag(info, data, TTY_PARITY);
2286 else if (rstat & SER_OVERRUN_MASK)
2287 add_char_and_flag(info, data, TTY_OVERRUN);
2288 else if (rstat & SER_FRAMING_ERR_MASK)
2289 add_char_and_flag(info, data, TTY_FRAME);
2290 }
2291
2292 START_FLUSH_FAST_TIMER(info, "receive_chars");
2293
2294 /* Restart the receiving DMA */
2295 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2296}
2297
2298static _INLINE_ int
2299start_recv_dma(struct e100_serial *info)
2300{
2301 struct etrax_dma_descr *descr = info->rec_descr;
2302 struct etrax_recv_buffer *buffer;
2303 int i;
2304
2305 /* Set up the receiving descriptors */
2306 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2307 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2308 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2309
2310 descr[i].ctrl = d_int;
2311 descr[i].buf = virt_to_phys(buffer->buffer);
2312 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2313 descr[i].hw_len = 0;
2314 descr[i].status = 0;
2315 descr[i].next = virt_to_phys(&descr[i+1]);
2316 }
2317
2318 /* Link the last descriptor to the first */
2319 descr[i-1].next = virt_to_phys(&descr[0]);
2320
2321 /* Start with the first descriptor in the list */
2322 info->cur_rec_descr = 0;
2323
2324 /* Start the DMA */
2325 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2326 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2327
2328 /* Input DMA should be running now */
2329 return 1;
2330}
2331
2332static void
2333start_receive(struct e100_serial *info)
2334{
2335#ifdef CONFIG_SVINTO_SIM
2336 /* No receive in the simulator. Will probably be when the rest of
2337 * the serial interface works, and this piece will just be removed.
2338 */
2339 return;
2340#endif
2341 info->tty->flip.count = 0;
2342 if (info->uses_dma_in) {
2343 /* reset the input dma channel to be sure it works */
2344
2345 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2346 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2347 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2348
2349 start_recv_dma(info);
2350 }
2351}
2352
2353
2354static _INLINE_ void
2355status_handle(struct e100_serial *info, unsigned short status)
2356{
2357}
2358
2359/* the bits in the MASK2 register are laid out like this:
2360 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2361 where I is the input channel and O is the output channel for the port.
2362 info->irq is the bit number for the DMAO_DESCR so to check the others we
2363 shift info->irq to the left.
2364*/
2365
2366/* dma output channel interrupt handler
2367 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2368 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2369*/
2370
2371static irqreturn_t
2372tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2373{
2374 struct e100_serial *info;
2375 unsigned long ireg;
2376 int i;
2377 int handled = 0;
2378
2379#ifdef CONFIG_SVINTO_SIM
2380 /* No receive in the simulator. Will probably be when the rest of
2381 * the serial interface works, and this piece will just be removed.
2382 */
2383 {
2384 const char *s = "What? tr_interrupt in simulator??\n";
2385 SIMCOUT(s,strlen(s));
2386 }
2387 return IRQ_HANDLED;
2388#endif
2389
2390 /* find out the line that caused this irq and get it from rs_table */
2391
2392 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2393
2394 for (i = 0; i < NR_PORTS; i++) {
2395 info = rs_table + i;
2396 if (!info->enabled || !info->uses_dma_out)
2397 continue;
2398 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2399 if (ireg & info->irq) {
2400 handled = 1;
2401 /* we can send a new dma bunch. make it so. */
2402 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2403 /* Read jiffies_usec first,
2404 * we want this time to be as late as possible
2405 */
2406 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2407 info->last_tx_active_usec = GET_JIFFIES_USEC();
2408 info->last_tx_active = jiffies;
2409 transmit_chars_dma(info);
2410 }
2411
2412 /* FIXME: here we should really check for a change in the
2413 status lines and if so call status_handle(info) */
2414 }
2415 return IRQ_RETVAL(handled);
2416} /* tr_interrupt */
2417
2418/* dma input channel interrupt handler */
2419
2420static irqreturn_t
2421rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2422{
2423 struct e100_serial *info;
2424 unsigned long ireg;
2425 int i;
2426 int handled = 0;
2427
2428#ifdef CONFIG_SVINTO_SIM
2429 /* No receive in the simulator. Will probably be when the rest of
2430 * the serial interface works, and this piece will just be removed.
2431 */
2432 {
2433 const char *s = "What? rec_interrupt in simulator??\n";
2434 SIMCOUT(s,strlen(s));
2435 }
2436 return IRQ_HANDLED;
2437#endif
2438
2439 /* find out the line that caused this irq and get it from rs_table */
2440
2441 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2442
2443 for (i = 0; i < NR_PORTS; i++) {
2444 info = rs_table + i;
2445 if (!info->enabled || !info->uses_dma_in)
2446 continue;
2447 /* check for both dma_eop and dma_descr for the input dma channel */
2448 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2449 handled = 1;
2450 /* we have received something */
2451 receive_chars_dma(info);
2452 }
2453
2454 /* FIXME: here we should really check for a change in the
2455 status lines and if so call status_handle(info) */
2456 }
2457 return IRQ_RETVAL(handled);
2458} /* rec_interrupt */
2459
2460static _INLINE_ int
2461force_eop_if_needed(struct e100_serial *info)
2462{
2463 /* We check data_avail bit to determine if data has
2464 * arrived since last time
2465 */
2466 unsigned char rstat = info->port[REG_STATUS];
2467
2468 /* error or datavail? */
2469 if (rstat & SER_ERROR_MASK) {
2470 /* Some error has occurred. If there has been valid data, an
2471 * EOP interrupt will be made automatically. If no data, the
2472 * normal ser_interrupt should be enabled and handle it.
2473 * So do nothing!
2474 */
2475 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2476 rstat | (info->line << 8));
2477 return 0;
2478 }
2479
2480 if (rstat & SER_DATA_AVAIL_MASK) {
2481 /* Ok data, no error, count it */
2482 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2483 rstat | (info->line << 8)));
2484 /* Read data to clear status flags */
2485 (void)info->port[REG_DATA];
2486
2487 info->forced_eop = 0;
2488 START_FLUSH_FAST_TIMER(info, "magic");
2489 return 0;
2490 }
2491
2492 /* hit the timeout, force an EOP for the input
2493 * dma channel if we haven't already
2494 */
2495 if (!info->forced_eop) {
2496 info->forced_eop = 1;
2497 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2498 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2499 FORCE_EOP(info);
2500 }
2501
2502 return 1;
2503}
2504
2505extern _INLINE_ void
2506flush_to_flip_buffer(struct e100_serial *info)
2507{
2508 struct tty_struct *tty;
2509 struct etrax_recv_buffer *buffer;
2510 unsigned int length;
2511 unsigned long flags;
2512 int max_flip_size;
2513
2514 if (!info->first_recv_buffer)
2515 return;
2516
2517 save_flags(flags);
2518 cli();
2519
2520 if (!(tty = info->tty)) {
2521 restore_flags(flags);
2522 return;
2523 }
2524
2525 length = tty->flip.count;
2526 /* Don't flip more than the ldisc has room for.
2527 * The return value from ldisc.receive_room(tty) - might not be up to
2528 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2529 * processed and not accounted for yet.
2530 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2531 * Lets buffer data here and let flow control take care of it.
2532 * Since we normally flip large chunks, the ldisc don't react
2533 * with throttle until too late if we flip to much.
2534 */
2535 max_flip_size = tty->ldisc.receive_room(tty);
2536 if (max_flip_size < 0)
2537 max_flip_size = 0;
2538 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2539 length + info->recv_cnt + /* We have this queued */
2540 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2541 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2542 /* check TTY_THROTTLED first so it indicates our state */
2543 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2544 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2545 rs_throttle(tty);
2546 }
2547#if 0
2548 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2549 length + info->recv_cnt + /* We have this queued */
2550 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2551 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2552 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2553 rs_throttle(tty);
2554 }
2555#endif
2556 }
2557
2558 if (max_flip_size > TTY_FLIPBUF_SIZE)
2559 max_flip_size = TTY_FLIPBUF_SIZE;
2560
2561 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2562 unsigned int count = buffer->length;
2563
2564 if (length + count > max_flip_size)
2565 count = max_flip_size - length;
2566
2567 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2568 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2569 tty->flip.flag_buf_ptr[length] = buffer->error;
2570
2571 length += count;
2572 info->recv_cnt -= count;
2573 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2574
2575 if (count == buffer->length) {
2576 info->first_recv_buffer = buffer->next;
2577 kfree(buffer);
2578 } else {
2579 buffer->length -= count;
2580 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2581 buffer->error = TTY_NORMAL;
2582 }
2583 }
2584
2585 if (!info->first_recv_buffer)
2586 info->last_recv_buffer = NULL;
2587
2588 tty->flip.count = length;
2589 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2590 DEBUG_LOG(info->line, "ldisc %lu\n",
2591 tty->ldisc.chars_in_buffer(tty));
2592 DEBUG_LOG(info->line, "flip.count %lu\n",
2593 tty->flip.count);
2594 }
2595 );
2596 restore_flags(flags);
2597
2598 DFLIP(
2599 if (1) {
2600
2601 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2602 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2603 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2604 } else {
2605 }
2606 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2607 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2608 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2609 }
2610
2611 );
2612
2613 /* this includes a check for low-latency */
2614 tty_flip_buffer_push(tty);
2615}
2616
2617static _INLINE_ void
2618check_flush_timeout(struct e100_serial *info)
2619{
2620 /* Flip what we've got (if we can) */
2621 flush_to_flip_buffer(info);
2622
2623 /* We might need to flip later, but not to fast
2624 * since the system is busy processing input... */
2625 if (info->first_recv_buffer)
2626 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2627
2628 /* Force eop last, since data might have come while we're processing
2629 * and if we started the slow timer above, we won't start a fast
2630 * below.
2631 */
2632 force_eop_if_needed(info);
2633}
2634
2635#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2636static void flush_timeout_function(unsigned long data)
2637{
2638 struct e100_serial *info = (struct e100_serial *)data;
2639
2640 fast_timers[info->line].function = NULL;
2641 serial_fast_timer_expired++;
2642 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2643 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2644 check_flush_timeout(info);
2645}
2646
2647#else
2648
2649/* dma fifo/buffer timeout handler
2650 forces an end-of-packet for the dma input channel if no chars
2651 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2652*/
2653
2654static struct timer_list flush_timer;
2655
2656static void
2657timed_flush_handler(unsigned long ptr)
2658{
2659 struct e100_serial *info;
2660 int i;
2661
2662#ifdef CONFIG_SVINTO_SIM
2663 return;
2664#endif
2665
2666 for (i = 0; i < NR_PORTS; i++) {
2667 info = rs_table + i;
2668 if (info->uses_dma_in)
2669 check_flush_timeout(info);
2670 }
2671
2672 /* restart flush timer */
2673 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2674}
2675#endif
2676
2677#ifdef SERIAL_HANDLE_EARLY_ERRORS
2678
2679/* If there is an error (ie break) when the DMA is running and
2680 * there are no bytes in the fifo the DMA is stopped and we get no
2681 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2682 * transfer, and if it is without error we can turn the serial
2683 * interrupts off.
2684 */
2685
2686/*
2687BREAK handling on ETRAX 100:
2688ETRAX will generate interrupt although there is no stop bit between the
2689characters.
2690
2691Depending on how long the break sequence is, the end of the breaksequence
2692will look differently:
2693| indicates start/end of a character.
2694
2695B= Break character (0x00) with framing error.
2696E= Error byte with parity error received after B characters.
2697F= "Faked" valid byte received immediately after B characters.
2698V= Valid byte
2699
27001.
2701 B BL ___________________________ V
2702.._|__________|__________| |valid data |
2703
2704Multiple frame errors with data == 0x00 (B),
2705the timing matches up "perfectly" so no extra ending char is detected.
2706The RXD pin is 1 in the last interrupt, in that case
2707we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2708know if another byte will come and this really is case 2. below
2709(e.g F=0xFF or 0xFE)
2710If RXD pin is 0 we can expect another character (see 2. below).
2711
2712
27132.
2714
2715 B B E or F__________________..__ V
2716.._|__________|__________|______ | |valid data
2717 "valid" or
2718 parity error
2719
2720Multiple frame errors with data == 0x00 (B),
2721but the part of the break trigs is interpreted as a start bit (and possibly
2722some 0 bits followed by a number of 1 bits and a stop bit).
2723Depending on parity settings etc. this last character can be either
2724a fake "valid" char (F) or have a parity error (E).
2725
2726If the character is valid it will be put in the buffer,
2727we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2728will set the flags so the tty will handle it,
2729if it's an error byte it will not be put in the buffer
2730and we set info->errorcode = ERRCODE_INSERT_BREAK.
2731
2732To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2733of the last faulty char (B) and compares it with the current time:
2734If the time elapsed time is less then 2*char_time_usec we will assume
2735it's a faked F char and not a Valid char and set
2736info->errorcode = ERRCODE_SET_BREAK.
2737
2738Flaws in the above solution:
2739~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2740We use the timer to distinguish a F character from a V character,
2741if a V character is to close after the break we might make the wrong decision.
2742
2743TODO: The break will be delayed until an F or V character is received.
2744
2745*/
2746
2747extern _INLINE_
2748struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2749{
2750 unsigned long data_read;
2751 struct tty_struct *tty = info->tty;
2752
2753 if (!tty) {
2754 printk("!NO TTY!\n");
2755 return info;
2756 }
2757 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2758 /* check TTY_THROTTLED first so it indicates our state */
2759 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2760 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2761 rs_throttle(tty);
2762 }
2763 }
2764 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2765 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2766 tty->flip.work.func((void *) tty);
2767 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2768 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2769 return info; /* if TTY_DONT_FLIP is set */
2770 }
2771 }
2772 /* Read data and status at the same time */
2773 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2774more_data:
2775 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2776 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2777 }
2778 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2779
2780 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2781 IO_MASK(R_SERIAL0_READ, par_err) |
2782 IO_MASK(R_SERIAL0_READ, overrun) )) {
2783 /* An error */
2784 info->last_rx_active_usec = GET_JIFFIES_USEC();
2785 info->last_rx_active = jiffies;
2786 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2787 DLOG_INT_TRIG(
2788 if (!log_int_trig1_pos) {
2789 log_int_trig1_pos = log_int_pos;
2790 log_int(rdpc(), 0, 0);
2791 }
2792 );
2793
2794
2795 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2796 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2797 /* Most likely a break, but we get interrupts over and
2798 * over again.
2799 */
2800
2801 if (!info->break_detected_cnt) {
2802 DEBUG_LOG(info->line, "#BRK start\n", 0);
2803 }
2804 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2805 /* The RX pin is high now, so the break
2806 * must be over, but....
2807 * we can't really know if we will get another
2808 * last byte ending the break or not.
2809 * And we don't know if the byte (if any) will
2810 * have an error or look valid.
2811 */
2812 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2813 info->errorcode = ERRCODE_INSERT_BREAK;
2814 }
2815 info->break_detected_cnt++;
2816 } else {
2817 /* The error does not look like a break, but could be
2818 * the end of one
2819 */
2820 if (info->break_detected_cnt) {
2821 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2822 info->errorcode = ERRCODE_INSERT_BREAK;
2823 } else {
2824 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2825 info->icount.brk++;
2826 *tty->flip.char_buf_ptr = 0;
2827 *tty->flip.flag_buf_ptr = TTY_BREAK;
2828 tty->flip.flag_buf_ptr++;
2829 tty->flip.char_buf_ptr++;
2830 tty->flip.count++;
2831 info->icount.rx++;
2832 }
2833 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2834
2835 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2836 info->icount.parity++;
2837 *tty->flip.flag_buf_ptr = TTY_PARITY;
2838 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2839 info->icount.overrun++;
2840 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2841 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2842 info->icount.frame++;
2843 *tty->flip.flag_buf_ptr = TTY_FRAME;
2844 }
2845 info->errorcode = 0;
2846 }
2847 info->break_detected_cnt = 0;
2848 }
2849 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2850 /* No error */
2851 DLOG_INT_TRIG(
2852 if (!log_int_trig1_pos) {
2853 if (log_int_pos >= log_int_size) {
2854 log_int_pos = 0;
2855 }
2856 log_int_trig0_pos = log_int_pos;
2857 log_int(rdpc(), 0, 0);
2858 }
2859 );
2860 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2861 *tty->flip.flag_buf_ptr = 0;
2862 } else {
2863 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2864 }
2865
2866
2867 tty->flip.flag_buf_ptr++;
2868 tty->flip.char_buf_ptr++;
2869 tty->flip.count++;
2870 info->icount.rx++;
2871 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2872 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2873 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2874 goto more_data;
2875 }
2876
2877 tty_flip_buffer_push(info->tty);
2878 return info;
2879}
2880
2881extern _INLINE_
2882struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2883{
2884 unsigned char rstat;
2885
2886#ifdef SERIAL_DEBUG_INTR
2887 printk("Interrupt from serport %d\n", i);
2888#endif
2889/* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2890 if (!info->uses_dma_in) {
2891 return handle_ser_rx_interrupt_no_dma(info);
2892 }
2893 /* DMA is used */
2894 rstat = info->port[REG_STATUS];
2895 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2896 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2897 }
2898
2899 if (rstat & SER_ERROR_MASK) {
2900 unsigned char data;
2901
2902 info->last_rx_active_usec = GET_JIFFIES_USEC();
2903 info->last_rx_active = jiffies;
2904 /* If we got an error, we must reset it by reading the
2905 * data_in field
2906 */
2907 data = info->port[REG_DATA];
2908 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2909 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2910 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2911 /* Most likely a break, but we get interrupts over and
2912 * over again.
2913 */
2914
2915 if (!info->break_detected_cnt) {
2916 DEBUG_LOG(info->line, "#BRK start\n", 0);
2917 }
2918 if (rstat & SER_RXD_MASK) {
2919 /* The RX pin is high now, so the break
2920 * must be over, but....
2921 * we can't really know if we will get another
2922 * last byte ending the break or not.
2923 * And we don't know if the byte (if any) will
2924 * have an error or look valid.
2925 */
2926 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2927 info->errorcode = ERRCODE_INSERT_BREAK;
2928 }
2929 info->break_detected_cnt++;
2930 } else {
2931 /* The error does not look like a break, but could be
2932 * the end of one
2933 */
2934 if (info->break_detected_cnt) {
2935 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2936 info->errorcode = ERRCODE_INSERT_BREAK;
2937 } else {
2938 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2939 info->icount.brk++;
2940 add_char_and_flag(info, '\0', TTY_BREAK);
2941 }
2942
2943 if (rstat & SER_PAR_ERR_MASK) {
2944 info->icount.parity++;
2945 add_char_and_flag(info, data, TTY_PARITY);
2946 } else if (rstat & SER_OVERRUN_MASK) {
2947 info->icount.overrun++;
2948 add_char_and_flag(info, data, TTY_OVERRUN);
2949 } else if (rstat & SER_FRAMING_ERR_MASK) {
2950 info->icount.frame++;
2951 add_char_and_flag(info, data, TTY_FRAME);
2952 }
2953
2954 info->errorcode = 0;
2955 }
2956 info->break_detected_cnt = 0;
2957 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2958 ((rstat & SER_ERROR_MASK) << 8) | data);
2959 }
2960 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2961 } else { /* It was a valid byte, now let the DMA do the rest */
2962 unsigned long curr_time_u = GET_JIFFIES_USEC();
2963 unsigned long curr_time = jiffies;
2964
2965 if (info->break_detected_cnt) {
2966 /* Detect if this character is a new valid char or the
2967 * last char in a break sequence: If LSBits are 0 and
2968 * MSBits are high AND the time is close to the
2969 * previous interrupt we should discard it.
2970 */
2971 long elapsed_usec =
2972 (curr_time - info->last_rx_active) * (1000000/HZ) +
2973 curr_time_u - info->last_rx_active_usec;
2974 if (elapsed_usec < 2*info->char_time_usec) {
2975 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2976 /* Report as BREAK (error) and let
2977 * receive_chars_dma() handle it
2978 */
2979 info->errorcode = ERRCODE_SET_BREAK;
2980 } else {
2981 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2982 }
2983 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2984 }
2985
2986#ifdef SERIAL_DEBUG_INTR
2987 printk("** OK, disabling ser_interrupts\n");
2988#endif
2989 e100_disable_serial_data_irq(info);
2990 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2991 info->break_detected_cnt = 0;
2992
2993 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2994 }
2995 /* Restarting the DMA never hurts */
2996 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2997 START_FLUSH_FAST_TIMER(info, "ser_int");
2998 return info;
2999} /* handle_ser_rx_interrupt */
3000
3001extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
3002{
3003 unsigned long flags;
3004
3005 if (info->x_char) {
3006 unsigned char rstat;
3007 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
3008 save_flags(flags); cli();
3009 rstat = info->port[REG_STATUS];
3010 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3011
3012 info->port[REG_TR_DATA] = info->x_char;
3013 info->icount.tx++;
3014 info->x_char = 0;
3015 /* We must enable since it is disabled in ser_interrupt */
3016 e100_enable_serial_tx_ready_irq(info);
3017 restore_flags(flags);
3018 return;
3019 }
3020 if (info->uses_dma_out) {
3021 unsigned char rstat;
3022 int i;
3023 /* We only use normal tx interrupt when sending x_char */
3024 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
3025 save_flags(flags); cli();
3026 rstat = info->port[REG_STATUS];
3027 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3028 e100_disable_serial_tx_ready_irq(info);
3029 if (info->tty->stopped)
3030 rs_stop(info->tty);
3031 /* Enable the DMA channel and tell it to continue */
3032 e100_enable_txdma_channel(info);
3033 /* Wait 12 cycles before doing the DMA command */
3034 for(i = 6; i > 0; i--)
3035 nop();
3036
3037 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3038 restore_flags(flags);
3039 return;
3040 }
3041 /* Normal char-by-char interrupt */
3042 if (info->xmit.head == info->xmit.tail
3043 || info->tty->stopped
3044 || info->tty->hw_stopped) {
3045 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3046 e100_disable_serial_tx_ready_irq(info);
3047 info->tr_running = 0;
3048 return;
3049 }
3050 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3051 /* Send a byte, rs485 timing is critical so turn of ints */
3052 save_flags(flags); cli();
3053 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3054 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3055 info->icount.tx++;
3056 if (info->xmit.head == info->xmit.tail) {
3057#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3058 if (info->rs485.enabled) {
3059 /* Set a short timer to toggle RTS */
3060 start_one_shot_timer(&fast_timers_rs485[info->line],
3061 rs485_toggle_rts_timer_function,
3062 (unsigned long)info,
3063 info->char_time_usec*2,
3064 "RS-485");
3065 }
3066#endif /* RS485 */
3067 info->last_tx_active_usec = GET_JIFFIES_USEC();
3068 info->last_tx_active = jiffies;
3069 e100_disable_serial_tx_ready_irq(info);
3070 info->tr_running = 0;
3071 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3072 } else {
3073 /* We must enable since it is disabled in ser_interrupt */
3074 e100_enable_serial_tx_ready_irq(info);
3075 }
3076 restore_flags(flags);
3077
3078 if (CIRC_CNT(info->xmit.head,
3079 info->xmit.tail,
3080 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3081 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3082
3083} /* handle_ser_tx_interrupt */
3084
3085/* result of time measurements:
3086 * RX duration 54-60 us when doing something, otherwise 6-9 us
3087 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3088 */
3089static irqreturn_t
3090ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3091{
3092 static volatile int tx_started = 0;
3093 struct e100_serial *info;
3094 int i;
3095 unsigned long flags;
3096 unsigned long irq_mask1_rd;
3097 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3098 int handled = 0;
3099 static volatile unsigned long reentered_ready_mask = 0;
3100
3101 save_flags(flags); cli();
3102 irq_mask1_rd = *R_IRQ_MASK1_RD;
3103 /* First handle all rx interrupts with ints disabled */
3104 info = rs_table;
3105 irq_mask1_rd &= e100_ser_int_mask;
3106 for (i = 0; i < NR_PORTS; i++) {
3107 /* Which line caused the data irq? */
3108 if (irq_mask1_rd & data_mask) {
3109 handled = 1;
3110 handle_ser_rx_interrupt(info);
3111 }
3112 info += 1;
3113 data_mask <<= 2;
3114 }
3115 /* Handle tx interrupts with interrupts enabled so we
3116 * can take care of new data interrupts while transmitting
3117 * We protect the tx part with the tx_started flag.
3118 * We disable the tr_ready interrupts we are about to handle and
3119 * unblock the serial interrupt so new serial interrupts may come.
3120 *
3121 * If we get a new interrupt:
3122 * - it migth be due to synchronous serial ports.
3123 * - serial irq will be blocked by general irq handler.
3124 * - async data will be handled above (sync will be ignored).
3125 * - tx_started flag will prevent us from trying to send again and
3126 * we will exit fast - no need to unblock serial irq.
3127 * - Next (sync) serial interrupt handler will be runned with
3128 * disabled interrupt due to restore_flags() at end of function,
3129 * so sync handler will not be preempted or reentered.
3130 */
3131 if (!tx_started) {
3132 unsigned long ready_mask;
3133 unsigned long
3134 tx_started = 1;
3135 /* Only the tr_ready interrupts left */
3136 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3137 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3138 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3139 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3140 while (irq_mask1_rd) {
3141 /* Disable those we are about to handle */
3142 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3143 /* Unblock the serial interrupt */
3144 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3145
3146 sti();
3147 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3148 info = rs_table;
3149 for (i = 0; i < NR_PORTS; i++) {
3150 /* Which line caused the ready irq? */
3151 if (irq_mask1_rd & ready_mask) {
3152 handled = 1;
3153 handle_ser_tx_interrupt(info);
3154 }
3155 info += 1;
3156 ready_mask <<= 2;
3157 }
3158 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3159 cli();
3160 /* Handle reentered TX interrupt */
3161 irq_mask1_rd = reentered_ready_mask;
3162 }
3163 cli();
3164 tx_started = 0;
3165 } else {
3166 unsigned long ready_mask;
3167 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3168 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3169 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3170 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3171 if (ready_mask) {
3172 reentered_ready_mask |= ready_mask;
3173 /* Disable those we are about to handle */
3174 *R_IRQ_MASK1_CLR = ready_mask;
3175 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3176 }
3177 }
3178
3179 restore_flags(flags);
3180 return IRQ_RETVAL(handled);
3181} /* ser_interrupt */
3182#endif
3183
3184/*
3185 * -------------------------------------------------------------------
3186 * Here ends the serial interrupt routines.
3187 * -------------------------------------------------------------------
3188 */
3189
3190/*
3191 * This routine is used to handle the "bottom half" processing for the
3192 * serial driver, known also the "software interrupt" processing.
3193 * This processing is done at the kernel interrupt level, after the
3194 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3195 * is where time-consuming activities which can not be done in the
3196 * interrupt driver proper are done; the interrupt driver schedules
3197 * them using rs_sched_event(), and they get done here.
3198 */
3199static void
3200do_softint(void *private_)
3201{
3202 struct e100_serial *info = (struct e100_serial *) private_;
3203 struct tty_struct *tty;
3204
3205 tty = info->tty;
3206 if (!tty)
3207 return;
3208
3209 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3210 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3211 tty->ldisc.write_wakeup)
3212 (tty->ldisc.write_wakeup)(tty);
3213 wake_up_interruptible(&tty->write_wait);
3214 }
3215}
3216
3217static int
3218startup(struct e100_serial * info)
3219{
3220 unsigned long flags;
3221 unsigned long xmit_page;
3222 int i;
3223
3224 xmit_page = get_zeroed_page(GFP_KERNEL);
3225 if (!xmit_page)
3226 return -ENOMEM;
3227
3228 save_flags(flags);
3229 cli();
3230
3231 /* if it was already initialized, skip this */
3232
3233 if (info->flags & ASYNC_INITIALIZED) {
3234 restore_flags(flags);
3235 free_page(xmit_page);
3236 return 0;
3237 }
3238
3239 if (info->xmit.buf)
3240 free_page(xmit_page);
3241 else
3242 info->xmit.buf = (unsigned char *) xmit_page;
3243
3244#ifdef SERIAL_DEBUG_OPEN
3245 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3246#endif
3247
3248#ifdef CONFIG_SVINTO_SIM
3249 /* Bits and pieces collected from below. Better to have them
3250 in one ifdef:ed clause than to mix in a lot of ifdefs,
3251 right? */
3252 if (info->tty)
3253 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3254
3255 info->xmit.head = info->xmit.tail = 0;
3256 info->first_recv_buffer = info->last_recv_buffer = NULL;
3257 info->recv_cnt = info->max_recv_cnt = 0;
3258
3259 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3260 info->rec_descr[i].buf = NULL;
3261
3262 /* No real action in the simulator, but may set info important
3263 to ioctl. */
3264 change_speed(info);
3265#else
3266
3267 /*
3268 * Clear the FIFO buffers and disable them
3269 * (they will be reenabled in change_speed())
3270 */
3271
3272 /*
3273 * Reset the DMA channels and make sure their interrupts are cleared
3274 */
3275
3276 if (info->dma_in_enabled) {
3277 info->uses_dma_in = 1;
3278 e100_enable_rxdma_channel(info);
3279
3280 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3281
3282 /* Wait until reset cycle is complete */
3283 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3284 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3285
3286 /* Make sure the irqs are cleared */
3287 *info->iclrintradr =
3288 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3289 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3290 } else {
3291 e100_disable_rxdma_channel(info);
3292 }
3293
3294 if (info->dma_out_enabled) {
3295 info->uses_dma_out = 1;
3296 e100_enable_txdma_channel(info);
3297 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3298
3299 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3300 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3301
3302 /* Make sure the irqs are cleared */
3303 *info->oclrintradr =
3304 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3305 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3306 } else {
3307 e100_disable_txdma_channel(info);
3308 }
3309
3310 if (info->tty)
3311 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3312
3313 info->xmit.head = info->xmit.tail = 0;
3314 info->first_recv_buffer = info->last_recv_buffer = NULL;
3315 info->recv_cnt = info->max_recv_cnt = 0;
3316
3317 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3318 info->rec_descr[i].buf = 0;
3319
3320 /*
3321 * and set the speed and other flags of the serial port
3322 * this will start the rx/tx as well
3323 */
3324#ifdef SERIAL_HANDLE_EARLY_ERRORS
3325 e100_enable_serial_data_irq(info);
3326#endif
3327 change_speed(info);
3328
3329 /* dummy read to reset any serial errors */
3330
3331 (void)info->port[REG_DATA];
3332
3333 /* enable the interrupts */
3334 if (info->uses_dma_out)
3335 e100_enable_txdma_irq(info);
3336
3337 e100_enable_rx_irq(info);
3338
3339 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3340
3341 /* setup the dma input descriptor and start dma */
3342
3343 start_receive(info);
3344
3345 /* for safety, make sure the descriptors last result is 0 bytes written */
3346
3347 info->tr_descr.sw_len = 0;
3348 info->tr_descr.hw_len = 0;
3349 info->tr_descr.status = 0;
3350
3351 /* enable RTS/DTR last */
3352
3353 e100_rts(info, 1);
3354 e100_dtr(info, 1);
3355
3356#endif /* CONFIG_SVINTO_SIM */
3357
3358 info->flags |= ASYNC_INITIALIZED;
3359
3360 restore_flags(flags);
3361 return 0;
3362}
3363
3364/*
3365 * This routine will shutdown a serial port; interrupts are disabled, and
3366 * DTR is dropped if the hangup on close termio flag is on.
3367 */
3368static void
3369shutdown(struct e100_serial * info)
3370{
3371 unsigned long flags;
3372 struct etrax_dma_descr *descr = info->rec_descr;
3373 struct etrax_recv_buffer *buffer;
3374 int i;
3375
3376#ifndef CONFIG_SVINTO_SIM
3377 /* shut down the transmitter and receiver */
3378 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3379 e100_disable_rx(info);
3380 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3381
3382 /* disable interrupts, reset dma channels */
3383 if (info->uses_dma_in) {
3384 e100_disable_rxdma_irq(info);
3385 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3386 info->uses_dma_in = 0;
3387 } else {
3388 e100_disable_serial_data_irq(info);
3389 }
3390
3391 if (info->uses_dma_out) {
3392 e100_disable_txdma_irq(info);
3393 info->tr_running = 0;
3394 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3395 info->uses_dma_out = 0;
3396 } else {
3397 e100_disable_serial_tx_ready_irq(info);
3398 info->tr_running = 0;
3399 }
3400
3401#endif /* CONFIG_SVINTO_SIM */
3402
3403 if (!(info->flags & ASYNC_INITIALIZED))
3404 return;
3405
3406#ifdef SERIAL_DEBUG_OPEN
3407 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3408 info->irq);
3409#endif
3410
3411 save_flags(flags);
3412 cli(); /* Disable interrupts */
3413
3414 if (info->xmit.buf) {
3415 free_page((unsigned long)info->xmit.buf);
3416 info->xmit.buf = NULL;
3417 }
3418
3419 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3420 if (descr[i].buf) {
3421 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3422 kfree(buffer);
3423 descr[i].buf = 0;
3424 }
3425
3426 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3427 /* hang up DTR and RTS if HUPCL is enabled */
3428 e100_dtr(info, 0);
3429 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3430 }
3431
3432 if (info->tty)
3433 set_bit(TTY_IO_ERROR, &info->tty->flags);
3434
3435 info->flags &= ~ASYNC_INITIALIZED;
3436 restore_flags(flags);
3437}
3438
3439
3440/* change baud rate and other assorted parameters */
3441
3442static void
3443change_speed(struct e100_serial *info)
3444{
3445 unsigned int cflag;
3446 unsigned long xoff;
3447 unsigned long flags;
3448 /* first some safety checks */
3449
3450 if (!info->tty || !info->tty->termios)
3451 return;
3452 if (!info->port)
3453 return;
3454
3455 cflag = info->tty->termios->c_cflag;
3456
3457 /* possibly, the tx/rx should be disabled first to do this safely */
3458
3459 /* change baud-rate and write it to the hardware */
3460 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3461 /* Special baudrate */
3462 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3463 unsigned long alt_source =
3464 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3465 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3466 /* R_ALT_SER_BAUDRATE selects the source */
3467 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3468 (unsigned long)info->baud_base, info->custom_divisor));
3469 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3470 /* 0, 2-65535 (0=65536) */
3471 u16 divisor = info->custom_divisor;
3472 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3473 /* baudrate is 3.125MHz/custom_divisor */
3474 alt_source =
3475 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3476 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3477 alt_source = 0x11;
3478 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3479 *R_SERIAL_PRESCALE = divisor;
3480 info->baud = SERIAL_PRESCALE_BASE/divisor;
3481 }
3482#ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3483 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3484 info->custom_divisor == 1) ||
3485 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3486 info->custom_divisor == 8)) {
3487 /* ext_clk selected */
3488 alt_source =
3489 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3490 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3491 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3492 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3493 }
3494 }
3495#endif
3496 else
3497 {
3498 /* Bad baudbase, we don't support using timer0
3499 * for baudrate.
3500 */
3501 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3502 (unsigned long)info->baud_base, info->custom_divisor);
3503 }
3504 r_alt_ser_baudrate_shadow &= ~mask;
3505 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3506 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3507 } else {
3508 /* Normal baudrate */
3509 /* Make sure we use normal baudrate */
3510 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3511 unsigned long alt_source =
3512 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3513 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3514 r_alt_ser_baudrate_shadow &= ~mask;
3515 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3516#ifndef CONFIG_SVINTO_SIM
3517 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3518#endif /* CONFIG_SVINTO_SIM */
3519
3520 info->baud = cflag_to_baud(cflag);
3521#ifndef CONFIG_SVINTO_SIM
3522 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3523#endif /* CONFIG_SVINTO_SIM */
3524 }
3525
3526#ifndef CONFIG_SVINTO_SIM
3527 /* start with default settings and then fill in changes */
3528 save_flags(flags);
3529 cli();
3530 /* 8 bit, no/even parity */
3531 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3532 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3533 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3534
3535 /* 8 bit, no/even parity, 1 stop bit, no cts */
3536 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3537 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3538 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3539 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3540 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3541
3542 if ((cflag & CSIZE) == CS7) {
3543 /* set 7 bit mode */
3544 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3545 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3546 }
3547
3548 if (cflag & CSTOPB) {
3549 /* set 2 stop bit mode */
3550 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3551 }
3552
3553 if (cflag & PARENB) {
3554 /* enable parity */
3555 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3556 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3557 }
3558
3559 if (cflag & CMSPAR) {
3560 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3561 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3562 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3563 }
3564 if (cflag & PARODD) {
3565 /* set odd parity (or Mark if CMSPAR) */
3566 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3567 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3568 }
3569
3570 if (cflag & CRTSCTS) {
3571 /* enable automatic CTS handling */
3572 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3573 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3574 }
3575
3576 /* make sure the tx and rx are enabled */
3577
3578 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3579 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3580
3581 /* actually write the control regs to the hardware */
3582
3583 info->port[REG_TR_CTRL] = info->tx_ctrl;
3584 info->port[REG_REC_CTRL] = info->rx_ctrl;
3585 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3586 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3587 if (info->tty->termios->c_iflag & IXON ) {
3588 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3589 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3590 }
3591
3592 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3593 restore_flags(flags);
3594#endif /* !CONFIG_SVINTO_SIM */
3595
3596 update_char_time(info);
3597
3598} /* change_speed */
3599
3600/* start transmitting chars NOW */
3601
3602static void
3603rs_flush_chars(struct tty_struct *tty)
3604{
3605 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3606 unsigned long flags;
3607
3608 if (info->tr_running ||
3609 info->xmit.head == info->xmit.tail ||
3610 tty->stopped ||
3611 tty->hw_stopped ||
3612 !info->xmit.buf)
3613 return;
3614
3615#ifdef SERIAL_DEBUG_FLOW
3616 printk("rs_flush_chars\n");
3617#endif
3618
3619 /* this protection might not exactly be necessary here */
3620
3621 save_flags(flags);
3622 cli();
3623 start_transmit(info);
3624 restore_flags(flags);
3625}
3626
3627extern _INLINE_ int
3628rs_raw_write(struct tty_struct * tty, int from_user,
3629 const unsigned char *buf, int count)
3630{
3631 int c, ret = 0;
3632 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3633 unsigned long flags;
3634
3635 /* first some sanity checks */
3636
3637 if (!tty || !info->xmit.buf || !tmp_buf)
3638 return 0;
3639
3640#ifdef SERIAL_DEBUG_DATA
3641 if (info->line == SERIAL_DEBUG_LINE)
3642 printk("rs_raw_write (%d), status %d\n",
3643 count, info->port[REG_STATUS]);
3644#endif
3645
3646#ifdef CONFIG_SVINTO_SIM
3647 /* Really simple. The output is here and now. */
3648 SIMCOUT(buf, count);
3649 return count;
3650#endif
3651 save_flags(flags);
3652 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3653 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3654
3655
3656 /* the cli/restore_flags pairs below are needed because the
3657 * DMA interrupt handler moves the info->xmit values. the memcpy
3658 * needs to be in the critical region unfortunately, because we
3659 * need to read xmit values, memcpy, write xmit values in one
3660 * atomic operation... this could perhaps be avoided by more clever
3661 * design.
3662 */
3663 if (from_user) {
3664 down(&tmp_buf_sem);
3665 while (1) {
3666 int c1;
3667 c = CIRC_SPACE_TO_END(info->xmit.head,
3668 info->xmit.tail,
3669 SERIAL_XMIT_SIZE);
3670 if (count < c)
3671 c = count;
3672 if (c <= 0)
3673 break;
3674
3675 c -= copy_from_user(tmp_buf, buf, c);
3676 if (!c) {
3677 if (!ret)
3678 ret = -EFAULT;
3679 break;
3680 }
3681 cli();
3682 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3683 info->xmit.tail,
3684 SERIAL_XMIT_SIZE);
3685 if (c1 < c)
3686 c = c1;
3687 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3688 info->xmit.head = ((info->xmit.head + c) &
3689 (SERIAL_XMIT_SIZE-1));
3690 restore_flags(flags);
3691 buf += c;
3692 count -= c;
3693 ret += c;
3694 }
3695 up(&tmp_buf_sem);
3696 } else {
3697 cli();
3698 while (count) {
3699 c = CIRC_SPACE_TO_END(info->xmit.head,
3700 info->xmit.tail,
3701 SERIAL_XMIT_SIZE);
3702
3703 if (count < c)
3704 c = count;
3705 if (c <= 0)
3706 break;
3707
3708 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3709 info->xmit.head = (info->xmit.head + c) &
3710 (SERIAL_XMIT_SIZE-1);
3711 buf += c;
3712 count -= c;
3713 ret += c;
3714 }
3715 restore_flags(flags);
3716 }
3717
3718 /* enable transmitter if not running, unless the tty is stopped
3719 * this does not need IRQ protection since if tr_running == 0
3720 * the IRQ's are not running anyway for this port.
3721 */
3722 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3723
3724 if (info->xmit.head != info->xmit.tail &&
3725 !tty->stopped &&
3726 !tty->hw_stopped &&
3727 !info->tr_running) {
3728 start_transmit(info);
3729 }
3730
3731 return ret;
3732} /* raw_raw_write() */
3733
3734static int
3735rs_write(struct tty_struct * tty, int from_user,
3736 const unsigned char *buf, int count)
3737{
3738#if defined(CONFIG_ETRAX_RS485)
3739 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3740
3741 if (info->rs485.enabled)
3742 {
3743 /* If we are in RS-485 mode, we need to toggle RTS and disable
3744 * the receiver before initiating a DMA transfer
3745 */
3746#ifdef CONFIG_ETRAX_FAST_TIMER
3747 /* Abort any started timer */
3748 fast_timers_rs485[info->line].function = NULL;
3749 del_fast_timer(&fast_timers_rs485[info->line]);
3750#endif
3751 e100_rts(info, info->rs485.rts_on_send);
3752#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3753 e100_disable_rx(info);
3754 e100_enable_rx_irq(info);
3755#endif
3756
3757 if (info->rs485.delay_rts_before_send > 0)
3758 msleep(info->rs485.delay_rts_before_send);
3759 }
3760#endif /* CONFIG_ETRAX_RS485 */
3761
3762 count = rs_raw_write(tty, from_user, buf, count);
3763
3764#if defined(CONFIG_ETRAX_RS485)
3765 if (info->rs485.enabled)
3766 {
3767 unsigned int val;
3768 /* If we are in RS-485 mode the following has to be done:
3769 * wait until DMA is ready
3770 * wait on transmit shift register
3771 * toggle RTS
3772 * enable the receiver
3773 */
3774
3775 /* Sleep until all sent */
3776 tty_wait_until_sent(tty, 0);
3777#ifdef CONFIG_ETRAX_FAST_TIMER
3778 /* Now sleep a little more so that shift register is empty */
3779 schedule_usleep(info->char_time_usec * 2);
3780#endif
3781 /* wait on transmit shift register */
3782 do{
3783 get_lsr_info(info, &val);
3784 }while (!(val & TIOCSER_TEMT));
3785
3786 e100_rts(info, info->rs485.rts_after_sent);
3787
3788#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3789 e100_enable_rx(info);
3790 e100_enable_rxdma_irq(info);
3791#endif
3792 }
3793#endif /* CONFIG_ETRAX_RS485 */
3794
3795 return count;
3796} /* rs_write */
3797
3798
3799/* how much space is available in the xmit buffer? */
3800
3801static int
3802rs_write_room(struct tty_struct *tty)
3803{
3804 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3805
3806 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3807}
3808
3809/* How many chars are in the xmit buffer?
3810 * This does not include any chars in the transmitter FIFO.
3811 * Use wait_until_sent for waiting for FIFO drain.
3812 */
3813
3814static int
3815rs_chars_in_buffer(struct tty_struct *tty)
3816{
3817 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3818
3819 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3820}
3821
3822/* discard everything in the xmit buffer */
3823
3824static void
3825rs_flush_buffer(struct tty_struct *tty)
3826{
3827 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3828 unsigned long flags;
3829
3830 save_flags(flags);
3831 cli();
3832 info->xmit.head = info->xmit.tail = 0;
3833 restore_flags(flags);
3834
3835 wake_up_interruptible(&tty->write_wait);
3836
3837 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3838 tty->ldisc.write_wakeup)
3839 (tty->ldisc.write_wakeup)(tty);
3840}
3841
3842/*
3843 * This function is used to send a high-priority XON/XOFF character to
3844 * the device
3845 *
3846 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3847 * but we do it in handle_ser_tx_interrupt().
3848 * We disable DMA channel and enable tx ready interrupt and write the
3849 * character when possible.
3850 */
3851static void rs_send_xchar(struct tty_struct *tty, char ch)
3852{
3853 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3854 unsigned long flags;
3855 save_flags(flags); cli();
3856 if (info->uses_dma_out) {
3857 /* Put the DMA on hold and disable the channel */
3858 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3859 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3860 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3861 e100_disable_txdma_channel(info);
3862 }
3863
3864 /* Must make sure transmitter is not stopped before we can transmit */
3865 if (tty->stopped)
3866 rs_start(tty);
3867
3868 /* Enable manual transmit interrupt and send from there */
3869 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3870 info->x_char = ch;
3871 e100_enable_serial_tx_ready_irq(info);
3872 restore_flags(flags);
3873}
3874
3875/*
3876 * ------------------------------------------------------------
3877 * rs_throttle()
3878 *
3879 * This routine is called by the upper-layer tty layer to signal that
3880 * incoming characters should be throttled.
3881 * ------------------------------------------------------------
3882 */
3883static void
3884rs_throttle(struct tty_struct * tty)
3885{
3886 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3887#ifdef SERIAL_DEBUG_THROTTLE
3888 char buf[64];
3889
3890 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3891 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3892#endif
3893 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3894
3895 /* Do RTS before XOFF since XOFF might take some time */
3896 if (tty->termios->c_cflag & CRTSCTS) {
3897 /* Turn off RTS line */
3898 e100_rts(info, 0);
3899 }
3900 if (I_IXOFF(tty))
3901 rs_send_xchar(tty, STOP_CHAR(tty));
3902
3903}
3904
3905static void
3906rs_unthrottle(struct tty_struct * tty)
3907{
3908 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3909#ifdef SERIAL_DEBUG_THROTTLE
3910 char buf[64];
3911
3912 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3913 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3914#endif
3915 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3916 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3917 /* Do RTS before XOFF since XOFF might take some time */
3918 if (tty->termios->c_cflag & CRTSCTS) {
3919 /* Assert RTS line */
3920 e100_rts(info, 1);
3921 }
3922
3923 if (I_IXOFF(tty)) {
3924 if (info->x_char)
3925 info->x_char = 0;
3926 else
3927 rs_send_xchar(tty, START_CHAR(tty));
3928 }
3929
3930}
3931
3932/*
3933 * ------------------------------------------------------------
3934 * rs_ioctl() and friends
3935 * ------------------------------------------------------------
3936 */
3937
3938static int
3939get_serial_info(struct e100_serial * info,
3940 struct serial_struct * retinfo)
3941{
3942 struct serial_struct tmp;
3943
3944 /* this is all probably wrong, there are a lot of fields
3945 * here that we don't have in e100_serial and maybe we
3946 * should set them to something else than 0.
3947 */
3948
3949 if (!retinfo)
3950 return -EFAULT;
3951 memset(&tmp, 0, sizeof(tmp));
3952 tmp.type = info->type;
3953 tmp.line = info->line;
3954 tmp.port = (int)info->port;
3955 tmp.irq = info->irq;
3956 tmp.flags = info->flags;
3957 tmp.baud_base = info->baud_base;
3958 tmp.close_delay = info->close_delay;
3959 tmp.closing_wait = info->closing_wait;
3960 tmp.custom_divisor = info->custom_divisor;
3961 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3962 return -EFAULT;
3963 return 0;
3964}
3965
3966static int
3967set_serial_info(struct e100_serial *info,
3968 struct serial_struct *new_info)
3969{
3970 struct serial_struct new_serial;
3971 struct e100_serial old_info;
3972 int retval = 0;
3973
3974 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3975 return -EFAULT;
3976
3977 old_info = *info;
3978
3979 if (!capable(CAP_SYS_ADMIN)) {
3980 if ((new_serial.type != info->type) ||
3981 (new_serial.close_delay != info->close_delay) ||
3982 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3983 (info->flags & ~ASYNC_USR_MASK)))
3984 return -EPERM;
3985 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3986 (new_serial.flags & ASYNC_USR_MASK));
3987 goto check_and_exit;
3988 }
3989
3990 if (info->count > 1)
3991 return -EBUSY;
3992
3993 /*
3994 * OK, past this point, all the error checking has been done.
3995 * At this point, we start making changes.....
3996 */
3997
3998 info->baud_base = new_serial.baud_base;
3999 info->flags = ((info->flags & ~ASYNC_FLAGS) |
4000 (new_serial.flags & ASYNC_FLAGS));
4001 info->custom_divisor = new_serial.custom_divisor;
4002 info->type = new_serial.type;
4003 info->close_delay = new_serial.close_delay;
4004 info->closing_wait = new_serial.closing_wait;
4005 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4006
4007 check_and_exit:
4008 if (info->flags & ASYNC_INITIALIZED) {
4009 change_speed(info);
4010 } else
4011 retval = startup(info);
4012 return retval;
4013}
4014
4015/*
4016 * get_lsr_info - get line status register info
4017 *
4018 * Purpose: Let user call ioctl() to get info when the UART physically
4019 * is emptied. On bus types like RS485, the transmitter must
4020 * release the bus after transmitting. This must be done when
4021 * the transmit shift register is empty, not be done when the
4022 * transmit holding register is empty. This functionality
4023 * allows an RS485 driver to be written in user space.
4024 */
4025static int
4026get_lsr_info(struct e100_serial * info, unsigned int *value)
4027{
4028 unsigned int result = TIOCSER_TEMT;
4029#ifndef CONFIG_SVINTO_SIM
4030 unsigned long curr_time = jiffies;
4031 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4032 unsigned long elapsed_usec =
4033 (curr_time - info->last_tx_active) * 1000000/HZ +
4034 curr_time_usec - info->last_tx_active_usec;
4035
4036 if (info->xmit.head != info->xmit.tail ||
4037 elapsed_usec < 2*info->char_time_usec) {
4038 result = 0;
4039 }
4040#endif
4041
4042 if (copy_to_user(value, &result, sizeof(int)))
4043 return -EFAULT;
4044 return 0;
4045}
4046
4047#ifdef SERIAL_DEBUG_IO
4048struct state_str
4049{
4050 int state;
4051 const char *str;
4052};
4053
4054const struct state_str control_state_str[] = {
4055 {TIOCM_DTR, "DTR" },
4056 {TIOCM_RTS, "RTS"},
4057 {TIOCM_ST, "ST?" },
4058 {TIOCM_SR, "SR?" },
4059 {TIOCM_CTS, "CTS" },
4060 {TIOCM_CD, "CD" },
4061 {TIOCM_RI, "RI" },
4062 {TIOCM_DSR, "DSR" },
4063 {0, NULL }
4064};
4065
4066char *get_control_state_str(int MLines, char *s)
4067{
4068 int i = 0;
4069
4070 s[0]='\0';
4071 while (control_state_str[i].str != NULL) {
4072 if (MLines & control_state_str[i].state) {
4073 if (s[0] != '\0') {
4074 strcat(s, ", ");
4075 }
4076 strcat(s, control_state_str[i].str);
4077 }
4078 i++;
4079 }
4080 return s;
4081}
4082#endif
4083
4084static int
4085get_modem_info(struct e100_serial * info, unsigned int *value)
4086{
4087 unsigned int result;
4088 /* Polarity isn't verified */
4089#if 0 /*def SERIAL_DEBUG_IO */
4090
4091 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4092 E100_RTS_GET(info),
4093 E100_DTR_GET(info),
4094 E100_CD_GET(info),
4095 E100_RI_GET(info),
4096 E100_DSR_GET(info),
4097 E100_CTS_GET(info));
4098#endif
4099
4100 result =
4101 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4102 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4103 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4104 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4105 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4106 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4107
4108#ifdef SERIAL_DEBUG_IO
4109 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4110 {
4111 char s[100];
4112
4113 get_control_state_str(result, s);
4114 printk("state: %s\n", s);
4115 }
4116#endif
4117 if (copy_to_user(value, &result, sizeof(int)))
4118 return -EFAULT;
4119 return 0;
4120}
4121
4122
4123static int
4124set_modem_info(struct e100_serial * info, unsigned int cmd,
4125 unsigned int *value)
4126{
4127 unsigned int arg;
4128
4129 if (copy_from_user(&arg, value, sizeof(int)))
4130 return -EFAULT;
4131
4132 switch (cmd) {
4133 case TIOCMBIS:
4134 if (arg & TIOCM_RTS) {
4135 e100_rts(info, 1);
4136 }
4137 if (arg & TIOCM_DTR) {
4138 e100_dtr(info, 1);
4139 }
4140 /* Handle FEMALE behaviour */
4141 if (arg & TIOCM_RI) {
4142 e100_ri_out(info, 1);
4143 }
4144 if (arg & TIOCM_CD) {
4145 e100_cd_out(info, 1);
4146 }
4147 break;
4148 case TIOCMBIC:
4149 if (arg & TIOCM_RTS) {
4150 e100_rts(info, 0);
4151 }
4152 if (arg & TIOCM_DTR) {
4153 e100_dtr(info, 0);
4154 }
4155 /* Handle FEMALE behaviour */
4156 if (arg & TIOCM_RI) {
4157 e100_ri_out(info, 0);
4158 }
4159 if (arg & TIOCM_CD) {
4160 e100_cd_out(info, 0);
4161 }
4162 break;
4163 case TIOCMSET:
4164 e100_rts(info, arg & TIOCM_RTS);
4165 e100_dtr(info, arg & TIOCM_DTR);
4166 /* Handle FEMALE behaviour */
4167 e100_ri_out(info, arg & TIOCM_RI);
4168 e100_cd_out(info, arg & TIOCM_CD);
4169 break;
4170 default:
4171 return -EINVAL;
4172 }
4173 return 0;
4174}
4175
4176
4177static void
4178rs_break(struct tty_struct *tty, int break_state)
4179{
4180 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4181 unsigned long flags;
4182
4183 if (!info->port)
4184 return;
4185
4186 save_flags(flags);
4187 cli();
4188 if (break_state == -1) {
4189 /* Go to manual mode and set the txd pin to 0 */
4190 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4191 } else {
4192 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4193 }
4194 info->port[REG_TR_CTRL] = info->tx_ctrl;
4195 restore_flags(flags);
4196}
4197
4198static int
4199rs_ioctl(struct tty_struct *tty, struct file * file,
4200 unsigned int cmd, unsigned long arg)
4201{
4202 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4203
4204 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4205 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4206 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4207 if (tty->flags & (1 << TTY_IO_ERROR))
4208 return -EIO;
4209 }
4210
4211 switch (cmd) {
4212 case TIOCMGET:
4213 return get_modem_info(info, (unsigned int *) arg);
4214 case TIOCMBIS:
4215 case TIOCMBIC:
4216 case TIOCMSET:
4217 return set_modem_info(info, cmd, (unsigned int *) arg);
4218 case TIOCGSERIAL:
4219 return get_serial_info(info,
4220 (struct serial_struct *) arg);
4221 case TIOCSSERIAL:
4222 return set_serial_info(info,
4223 (struct serial_struct *) arg);
4224 case TIOCSERGETLSR: /* Get line status register */
4225 return get_lsr_info(info, (unsigned int *) arg);
4226
4227 case TIOCSERGSTRUCT:
4228 if (copy_to_user((struct e100_serial *) arg,
4229 info, sizeof(struct e100_serial)))
4230 return -EFAULT;
4231 return 0;
4232
4233#if defined(CONFIG_ETRAX_RS485)
4234 case TIOCSERSETRS485:
4235 {
4236 struct rs485_control rs485ctrl;
4237 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4238 return -EFAULT;
4239
4240 return e100_enable_rs485(tty, &rs485ctrl);
4241 }
4242
4243 case TIOCSERWRRS485:
4244 {
4245 struct rs485_write rs485wr;
4246 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4247 return -EFAULT;
4248
4249 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4250 }
4251#endif
4252
4253 default:
4254 return -ENOIOCTLCMD;
4255 }
4256 return 0;
4257}
4258
4259static void
4260rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4261{
4262 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4263
4264 if (tty->termios->c_cflag == old_termios->c_cflag &&
4265 tty->termios->c_iflag == old_termios->c_iflag)
4266 return;
4267
4268 change_speed(info);
4269
4270 /* Handle turning off CRTSCTS */
4271 if ((old_termios->c_cflag & CRTSCTS) &&
4272 !(tty->termios->c_cflag & CRTSCTS)) {
4273 tty->hw_stopped = 0;
4274 rs_start(tty);
4275 }
4276
4277}
4278
4279/* In debugport.c - register a console write function that uses the normal
4280 * serial driver
4281 */
4282typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4283
4284extern debugport_write_function debug_write_function;
4285
4286static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4287{
4288 int cnt;
4289 int written = 0;
4290 struct tty_struct *tty;
4291 static int recurse_cnt = 0;
4292
4293 tty = rs_table[i].tty;
4294 if (tty) {
4295 unsigned long flags;
4296 if (recurse_cnt > 5) /* We skip this debug output */
4297 return 1;
4298
4299 local_irq_save(flags);
4300 recurse_cnt++;
4301 local_irq_restore(flags);
4302 do {
4303 cnt = rs_write(tty, 0, buf + written, len);
4304 if (cnt >= 0) {
4305 written += cnt;
4306 buf += cnt;
4307 len -= cnt;
4308 } else
4309 len = cnt;
4310 } while(len > 0);
4311 local_irq_save(flags);
4312 recurse_cnt--;
4313 local_irq_restore(flags);
4314 return 1;
4315 }
4316 return 0;
4317}
4318
4319/*
4320 * ------------------------------------------------------------
4321 * rs_close()
4322 *
4323 * This routine is called when the serial port gets closed. First, we
4324 * wait for the last remaining data to be sent. Then, we unlink its
4325 * S structure from the interrupt chain if necessary, and we free
4326 * that IRQ if nothing is left in the chain.
4327 * ------------------------------------------------------------
4328 */
4329static void
4330rs_close(struct tty_struct *tty, struct file * filp)
4331{
4332 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4333 unsigned long flags;
4334
4335 if (!info)
4336 return;
4337
4338 /* interrupts are disabled for this entire function */
4339
4340 save_flags(flags);
4341 cli();
4342
4343 if (tty_hung_up_p(filp)) {
4344 restore_flags(flags);
4345 return;
4346 }
4347
4348#ifdef SERIAL_DEBUG_OPEN
4349 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4350 info->line, info->count);
4351#endif
4352 if ((tty->count == 1) && (info->count != 1)) {
4353 /*
4354 * Uh, oh. tty->count is 1, which means that the tty
4355 * structure will be freed. Info->count should always
4356 * be one in these conditions. If it's greater than
4357 * one, we've got real problems, since it means the
4358 * serial port won't be shutdown.
4359 */
4360 printk(KERN_CRIT
4361 "rs_close: bad serial port count; tty->count is 1, "
4362 "info->count is %d\n", info->count);
4363 info->count = 1;
4364 }
4365 if (--info->count < 0) {
4366 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4367 info->line, info->count);
4368 info->count = 0;
4369 }
4370 if (info->count) {
4371 restore_flags(flags);
4372 return;
4373 }
4374 info->flags |= ASYNC_CLOSING;
4375 /*
4376 * Save the termios structure, since this port may have
4377 * separate termios for callout and dialin.
4378 */
4379 if (info->flags & ASYNC_NORMAL_ACTIVE)
4380 info->normal_termios = *tty->termios;
4381 /*
4382 * Now we wait for the transmit buffer to clear; and we notify
4383 * the line discipline to only process XON/XOFF characters.
4384 */
4385 tty->closing = 1;
4386 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4387 tty_wait_until_sent(tty, info->closing_wait);
4388 /*
4389 * At this point we stop accepting input. To do this, we
4390 * disable the serial receiver and the DMA receive interrupt.
4391 */
4392#ifdef SERIAL_HANDLE_EARLY_ERRORS
4393 e100_disable_serial_data_irq(info);
4394#endif
4395
4396#ifndef CONFIG_SVINTO_SIM
4397 e100_disable_rx(info);
4398 e100_disable_rx_irq(info);
4399
4400 if (info->flags & ASYNC_INITIALIZED) {
4401 /*
4402 * Before we drop DTR, make sure the UART transmitter
4403 * has completely drained; this is especially
4404 * important as we have a transmit FIFO!
4405 */
4406 rs_wait_until_sent(tty, HZ);
4407 }
4408#endif
4409
4410 shutdown(info);
4411 if (tty->driver->flush_buffer)
4412 tty->driver->flush_buffer(tty);
4413 if (tty->ldisc.flush_buffer)
4414 tty->ldisc.flush_buffer(tty);
4415 tty->closing = 0;
4416 info->event = 0;
4417 info->tty = 0;
4418 if (info->blocked_open) {
3c76bc5b
NA		 4419 if (info->close_delay)
4420 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 4421 wake_up_interruptible(&info->open_wait);
4422 }
4423 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4424 wake_up_interruptible(&info->close_wait);
4425 restore_flags(flags);
4426
4427 /* port closed */
4428
4429#if defined(CONFIG_ETRAX_RS485)
4430 if (info->rs485.enabled) {
4431 info->rs485.enabled = 0;
4432#if defined(CONFIG_ETRAX_RS485_ON_PA)
4433 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4434#endif
4435#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4436 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4437 rs485_port_g_bit, 0);
4438#endif
4439#if defined(CONFIG_ETRAX_RS485_LTC1387)
4440 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4441 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4442 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4443 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4444#endif
4445 }
4446#endif
4447}
4448
4449/*
4450 * rs_wait_until_sent() --- wait until the transmitter is empty
4451 */
4452static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4453{
4454 unsigned long orig_jiffies;
4455 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4456 unsigned long curr_time = jiffies;
4457 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4458 long elapsed_usec =
4459 (curr_time - info->last_tx_active) * (1000000/HZ) +
4460 curr_time_usec - info->last_tx_active_usec;
4461
4462 /*
4463 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4464 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4465 */
4466 orig_jiffies = jiffies;
4467 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4468 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4469 (elapsed_usec < 2*info->char_time_usec)) {
3c76bc5b 4470 schedule_timeout_interruptible(1);
1da177e4
LT		 4471 if (signal_pending(current))
4472 break;
4473 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4474 break;
4475 curr_time = jiffies;
4476 curr_time_usec = GET_JIFFIES_USEC();
4477 elapsed_usec =
4478 (curr_time - info->last_tx_active) * (1000000/HZ) +
4479 curr_time_usec - info->last_tx_active_usec;
4480 }
4481 set_current_state(TASK_RUNNING);
4482}
4483
4484/*
4485 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4486 */
4487void
4488rs_hangup(struct tty_struct *tty)
4489{
4490 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4491
4492 rs_flush_buffer(tty);
4493 shutdown(info);
4494 info->event = 0;
4495 info->count = 0;
4496 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4497 info->tty = 0;
4498 wake_up_interruptible(&info->open_wait);
4499}
4500
4501/*
4502 * ------------------------------------------------------------
4503 * rs_open() and friends
4504 * ------------------------------------------------------------
4505 */
4506static int
4507block_til_ready(struct tty_struct *tty, struct file * filp,
4508 struct e100_serial *info)
4509{
4510 DECLARE_WAITQUEUE(wait, current);
4511 unsigned long flags;
4512 int retval;
4513 int do_clocal = 0, extra_count = 0;
4514
4515 /*
4516 * If the device is in the middle of being closed, then block
4517 * until it's done, and then try again.
4518 */
4519 if (tty_hung_up_p(filp) ||
4520 (info->flags & ASYNC_CLOSING)) {
4521 if (info->flags & ASYNC_CLOSING)
4522 interruptible_sleep_on(&info->close_wait);
4523#ifdef SERIAL_DO_RESTART
4524 if (info->flags & ASYNC_HUP_NOTIFY)
4525 return -EAGAIN;
4526 else
4527 return -ERESTARTSYS;
4528#else
4529 return -EAGAIN;
4530#endif
4531 }
4532
4533 /*
4534 * If non-blocking mode is set, or the port is not enabled,
4535 * then make the check up front and then exit.
4536 */
4537 if ((filp->f_flags & O_NONBLOCK) ||
4538 (tty->flags & (1 << TTY_IO_ERROR))) {
4539 info->flags |= ASYNC_NORMAL_ACTIVE;
4540 return 0;
4541 }
4542
4543 if (tty->termios->c_cflag & CLOCAL) {
4544 do_clocal = 1;
4545 }
4546
4547 /*
4548 * Block waiting for the carrier detect and the line to become
4549 * free (i.e., not in use by the callout). While we are in
4550 * this loop, info->count is dropped by one, so that
4551 * rs_close() knows when to free things. We restore it upon
4552 * exit, either normal or abnormal.
4553 */
4554 retval = 0;
4555 add_wait_queue(&info->open_wait, &wait);
4556#ifdef SERIAL_DEBUG_OPEN
4557 printk("block_til_ready before block: ttyS%d, count = %d\n",
4558 info->line, info->count);
4559#endif
4560 save_flags(flags);
4561 cli();
4562 if (!tty_hung_up_p(filp)) {
4563 extra_count++;
4564 info->count--;
4565 }
4566 restore_flags(flags);
4567 info->blocked_open++;
4568 while (1) {
4569 save_flags(flags);
4570 cli();
4571 /* assert RTS and DTR */
4572 e100_rts(info, 1);
4573 e100_dtr(info, 1);
4574 restore_flags(flags);
4575 set_current_state(TASK_INTERRUPTIBLE);
4576 if (tty_hung_up_p(filp) ||
4577 !(info->flags & ASYNC_INITIALIZED)) {
4578#ifdef SERIAL_DO_RESTART
4579 if (info->flags & ASYNC_HUP_NOTIFY)
4580 retval = -EAGAIN;
4581 else
4582 retval = -ERESTARTSYS;
4583#else
4584 retval = -EAGAIN;
4585#endif
4586 break;
4587 }
4588 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4589 /* && (do_clocal || DCD_IS_ASSERTED) */
4590 break;
4591 if (signal_pending(current)) {
4592 retval = -ERESTARTSYS;
4593 break;
4594 }
4595#ifdef SERIAL_DEBUG_OPEN
4596 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4597 info->line, info->count);
4598#endif
4599 schedule();
4600 }
4601 set_current_state(TASK_RUNNING);
4602 remove_wait_queue(&info->open_wait, &wait);
4603 if (extra_count)
4604 info->count++;
4605 info->blocked_open--;
4606#ifdef SERIAL_DEBUG_OPEN
4607 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4608 info->line, info->count);
4609#endif
4610 if (retval)
4611 return retval;
4612 info->flags |= ASYNC_NORMAL_ACTIVE;
4613 return 0;
4614}
4615
4616/*
4617 * This routine is called whenever a serial port is opened.
4618 * It performs the serial-specific initialization for the tty structure.
4619 */
4620static int
4621rs_open(struct tty_struct *tty, struct file * filp)
4622{
4623 struct e100_serial *info;
4624 int retval, line;
4625 unsigned long page;
4626
4627 /* find which port we want to open */
4628
4629 line = tty->index;
4630
4631 if (line < 0 || line >= NR_PORTS)
4632 return -ENODEV;
4633
4634 /* find the corresponding e100_serial struct in the table */
4635 info = rs_table + line;
4636
4637 /* don't allow the opening of ports that are not enabled in the HW config */
4638 if (!info->enabled)
4639 return -ENODEV;
4640
4641#ifdef SERIAL_DEBUG_OPEN
4642 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4643 info->count);
4644#endif
4645
4646 info->count++;
4647 tty->driver_data = info;
4648 info->tty = tty;
4649
4650 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4651
4652 if (!tmp_buf) {
4653 page = get_zeroed_page(GFP_KERNEL);
4654 if (!page) {
4655 return -ENOMEM;
4656 }
4657 if (tmp_buf)
4658 free_page(page);
4659 else
4660 tmp_buf = (unsigned char *) page;
4661 }
4662
4663 /*
4664 * If the port is in the middle of closing, bail out now
4665 */
4666 if (tty_hung_up_p(filp) ||
4667 (info->flags & ASYNC_CLOSING)) {
4668 if (info->flags & ASYNC_CLOSING)
4669 interruptible_sleep_on(&info->close_wait);
4670#ifdef SERIAL_DO_RESTART
4671 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4672 -EAGAIN : -ERESTARTSYS);
4673#else
4674 return -EAGAIN;
4675#endif
4676 }
4677
4678 /*
4679 * Start up the serial port
4680 */
4681
4682 retval = startup(info);
4683 if (retval)
4684 return retval;
4685
4686 retval = block_til_ready(tty, filp, info);
4687 if (retval) {
4688#ifdef SERIAL_DEBUG_OPEN
4689 printk("rs_open returning after block_til_ready with %d\n",
4690 retval);
4691#endif
4692 return retval;
4693 }
4694
4695 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4696 *tty->termios = info->normal_termios;
4697 change_speed(info);
4698 }
4699
4700#ifdef SERIAL_DEBUG_OPEN
4701 printk("rs_open ttyS%d successful...\n", info->line);
4702#endif
4703 DLOG_INT_TRIG( log_int_pos = 0);
4704
4705 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4706 info->icount.rx = 0;
4707 } );
4708
4709 return 0;
4710}
4711
4712/*
4713 * /proc fs routines....
4714 */
4715
4716extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
4717{
4718 char stat_buf[30];
4719 int ret;
4720 unsigned long tmp;
4721
4722 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4723 info->line, (unsigned long)info->port, info->irq);
4724
4725 if (!info->port || (info->type == PORT_UNKNOWN)) {
4726 ret += sprintf(buf+ret, "\n");
4727 return ret;
4728 }
4729
4730 stat_buf[0] = 0;
4731 stat_buf[1] = 0;
4732 if (!E100_RTS_GET(info))
4733 strcat(stat_buf, "|RTS");
4734 if (!E100_CTS_GET(info))
4735 strcat(stat_buf, "|CTS");
4736 if (!E100_DTR_GET(info))
4737 strcat(stat_buf, "|DTR");
4738 if (!E100_DSR_GET(info))
4739 strcat(stat_buf, "|DSR");
4740 if (!E100_CD_GET(info))
4741 strcat(stat_buf, "|CD");
4742 if (!E100_RI_GET(info))
4743 strcat(stat_buf, "|RI");
4744
4745 ret += sprintf(buf+ret, " baud:%d", info->baud);
4746
4747 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4748 (unsigned long)info->icount.tx,
4749 (unsigned long)info->icount.rx);
4750 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4751 if (tmp) {
4752 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4753 (unsigned long)tmp,
4754 (unsigned long)SERIAL_XMIT_SIZE);
4755 }
4756
4757 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4758 (unsigned long)info->recv_cnt,
4759 (unsigned long)info->max_recv_cnt);
4760
4761#if 1
4762 if (info->tty) {
4763
4764 if (info->tty->stopped)
4765 ret += sprintf(buf+ret, " stopped:%i",
4766 (int)info->tty->stopped);
4767 if (info->tty->hw_stopped)
4768 ret += sprintf(buf+ret, " hw_stopped:%i",
4769 (int)info->tty->hw_stopped);
4770 }
4771
4772 {
4773 unsigned char rstat = info->port[REG_STATUS];
4774 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4775 ret += sprintf(buf+ret, " xoff_detect:1");
4776 }
4777
4778#endif
4779
4780
4781
4782
4783 if (info->icount.frame)
4784 ret += sprintf(buf+ret, " fe:%lu",
4785 (unsigned long)info->icount.frame);
4786
4787 if (info->icount.parity)
4788 ret += sprintf(buf+ret, " pe:%lu",
4789 (unsigned long)info->icount.parity);
4790
4791 if (info->icount.brk)
4792 ret += sprintf(buf+ret, " brk:%lu",
4793 (unsigned long)info->icount.brk);
4794
4795 if (info->icount.overrun)
4796 ret += sprintf(buf+ret, " oe:%lu",
4797 (unsigned long)info->icount.overrun);
4798
4799 /*
4800 * Last thing is the RS-232 status lines
4801 */
4802 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4803 return ret;
4804}
4805
4806int rs_read_proc(char *page, char **start, off_t off, int count,
4807 int *eof, void *data)
4808{
4809 int i, len = 0, l;
4810 off_t begin = 0;
4811
4812 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4813 serial_version);
4814 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4815 if (!rs_table[i].enabled)
4816 continue;
4817 l = line_info(page + len, &rs_table[i]);
4818 len += l;
4819 if (len+begin > off+count)
4820 goto done;
4821 if (len+begin < off) {
4822 begin += len;
4823 len = 0;
4824 }
4825 }
4826#ifdef DEBUG_LOG_INCLUDED
4827 for (i = 0; i < debug_log_pos; i++) {
4828 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4829 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4830 if (len+begin > off+count)
4831 goto done;
4832 if (len+begin < off) {
4833 begin += len;
4834 len = 0;
4835 }
4836 }
4837 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4838 i, DEBUG_LOG_SIZE, begin+len);
4839 debug_log_pos = 0;
4840#endif
4841
4842 *eof = 1;
4843done:
4844 if (off >= len+begin)
4845 return 0;
4846 *start = page + (off-begin);
4847 return ((count < begin+len-off) ? count : begin+len-off);
4848}
4849
4850/* Finally, routines used to initialize the serial driver. */
4851
4852static void
4853show_serial_version(void)
4854{
4855 printk(KERN_INFO
4856 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4857 &serial_version[11]); /* "$Revision: x.yy" */
4858}
4859
4860/* rs_init inits the driver at boot (using the module_init chain) */
4861
4862static struct tty_operations rs_ops = {
4863 .open = rs_open,
4864 .close = rs_close,
4865 .write = rs_write,
4866 .flush_chars = rs_flush_chars,
4867 .write_room = rs_write_room,
4868 .chars_in_buffer = rs_chars_in_buffer,
4869 .flush_buffer = rs_flush_buffer,
4870 .ioctl = rs_ioctl,
4871 .throttle = rs_throttle,
4872 .unthrottle = rs_unthrottle,
4873 .set_termios = rs_set_termios,
4874 .stop = rs_stop,
4875 .start = rs_start,
4876 .hangup = rs_hangup,
4877 .break_ctl = rs_break,
4878 .send_xchar = rs_send_xchar,
4879 .wait_until_sent = rs_wait_until_sent,
4880 .read_proc = rs_read_proc,
4881};
4882
4883static int __init
4884rs_init(void)
4885{
4886 int i;
4887 struct e100_serial *info;
4888 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4889
4890 if (!driver)
4891 return -ENOMEM;
4892
4893 show_serial_version();
4894
4895 /* Setup the timed flush handler system */
4896
4897#if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4898 init_timer(&flush_timer);
4899 flush_timer.function = timed_flush_handler;
4900 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4901#endif
4902
4903 /* Initialize the tty_driver structure */
4904
4905 driver->driver_name = "serial";
4906 driver->name = "ttyS";
4907 driver->major = TTY_MAJOR;
4908 driver->minor_start = 64;
4909 driver->type = TTY_DRIVER_TYPE_SERIAL;
4910 driver->subtype = SERIAL_TYPE_NORMAL;
4911 driver->init_termios = tty_std_termios;
4912 driver->init_termios.c_cflag =
4913 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4914 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4915 driver->termios = serial_termios;
4916 driver->termios_locked = serial_termios_locked;
4917
4918 tty_set_operations(driver, &rs_ops);
4919 serial_driver = driver;
4920 if (tty_register_driver(driver))
4921 panic("Couldn't register serial driver\n");
4922 /* do some initializing for the separate ports */
4923
4924 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4925 info->uses_dma_in = 0;
4926 info->uses_dma_out = 0;
4927 info->line = i;
4928 info->tty = 0;
4929 info->type = PORT_ETRAX;
4930 info->tr_running = 0;
4931 info->forced_eop = 0;
4932 info->baud_base = DEF_BAUD_BASE;
4933 info->custom_divisor = 0;
4934 info->flags = 0;
4935 info->close_delay = 5*HZ/10;
4936 info->closing_wait = 30*HZ;
4937 info->x_char = 0;
4938 info->event = 0;
4939 info->count = 0;
4940 info->blocked_open = 0;
4941 info->normal_termios = driver->init_termios;
4942 init_waitqueue_head(&info->open_wait);
4943 init_waitqueue_head(&info->close_wait);
4944 info->xmit.buf = NULL;
4945 info->xmit.tail = info->xmit.head = 0;
4946 info->first_recv_buffer = info->last_recv_buffer = NULL;
4947 info->recv_cnt = info->max_recv_cnt = 0;
4948 info->last_tx_active_usec = 0;
4949 info->last_tx_active = 0;
4950
4951#if defined(CONFIG_ETRAX_RS485)
4952 /* Set sane defaults */
4953 info->rs485.rts_on_send = 0;
4954 info->rs485.rts_after_sent = 1;
4955 info->rs485.delay_rts_before_send = 0;
4956 info->rs485.enabled = 0;
4957#endif
4958 INIT_WORK(&info->work, do_softint, info);
4959
4960 if (info->enabled) {
4961 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4962 serial_driver->name, info->line, (unsigned int)info->port);
4963 }
4964 }
4965#ifdef CONFIG_ETRAX_FAST_TIMER
4966#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4967 memset(fast_timers, 0, sizeof(fast_timers));
4968#endif
4969#ifdef CONFIG_ETRAX_RS485
4970 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4971#endif
4972 fast_timer_init();
4973#endif
4974
4975#ifndef CONFIG_SVINTO_SIM
4976 /* Not needed in simulator. May only complicate stuff. */
4977 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4978
4979 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4980 panic("irq8");
4981
4982#ifdef CONFIG_ETRAX_SERIAL_PORT0
4983#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4984 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4985 panic("irq22");
4986#endif
4987#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4988 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4989 panic("irq23");
4990#endif
4991#endif
4992
4993#ifdef CONFIG_ETRAX_SERIAL_PORT1
4994#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4995 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
4996 panic("irq24");
4997#endif
4998#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4999 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
5000 panic("irq25");
5001#endif
5002#endif
5003#ifdef CONFIG_ETRAX_SERIAL_PORT2
5004 /* DMA Shared with par0 (and SCSI0 and ATA) */
5005#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
5006 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
5007 panic("irq18");
5008#endif
5009#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
5010 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
5011 panic("irq19");
5012#endif
5013#endif
5014#ifdef CONFIG_ETRAX_SERIAL_PORT3
5015 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
5016#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
5017 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
5018 panic("irq20");
5019#endif
5020#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
5021 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
5022 panic("irq21");
5023#endif
5024#endif
5025
5026#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5027 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5028 "fast serial dma timeout", NULL)) {
5029 printk(KERN_CRIT "err: timer1 irq\n");
5030 }
5031#endif
5032#endif /* CONFIG_SVINTO_SIM */
5033 debug_write_function = rs_debug_write_function;
5034 return 0;
5035}
5036
5037/* this makes sure that rs_init is called during kernel boot */
5038
5039module_init(rs_init);
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