]> Git Repo - linux.git/blame - drivers/hwmon/tmp401.c
Merge tag 'drm-next-2020-04-08' of git://anongit.freedesktop.org/drm/drm
[linux.git] / drivers / hwmon / tmp401.c
CommitLineData
74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
ab2b79d5
HG
2/* tmp401.c
3 *
4 * Copyright (C) 2007,2008 Hans de Goede <[email protected]>
fce0758f
AP
5 * Preliminary tmp411 support by:
6 * Gabriel Konat, Sander Leget, Wouter Willems
7 * Copyright (C) 2009 Andre Prendel <[email protected]>
ab2b79d5 8 *
29dd3b64
GR
9 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
10 * Copyright (c) 2013 Guenter Roeck <[email protected]>
ab2b79d5
HG
11 */
12
13/*
14 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
15 *
16 * Note this IC is in some aspect similar to the LM90, but it has quite a
17 * few differences too, for example the local temp has a higher resolution
18 * and thus has 16 bits registers for its value and limit instead of 8 bits.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
947e9271 23#include <linux/bitops.h>
ab2b79d5
HG
24#include <linux/slab.h>
25#include <linux/jiffies.h>
26#include <linux/i2c.h>
27#include <linux/hwmon.h>
28#include <linux/hwmon-sysfs.h>
29#include <linux/err.h>
30#include <linux/mutex.h>
31#include <linux/sysfs.h>
32
33/* Addresses to scan */
9aecac04 34static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
907a6d58 35 0x4e, 0x4f, I2C_CLIENT_END };
ab2b79d5 36
c0a68601 37enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
ab2b79d5
HG
38
39/*
40 * The TMP401 registers, note some registers have different addresses for
41 * reading and writing
42 */
43#define TMP401_STATUS 0x02
44#define TMP401_CONFIG_READ 0x03
45#define TMP401_CONFIG_WRITE 0x09
46#define TMP401_CONVERSION_RATE_READ 0x04
47#define TMP401_CONVERSION_RATE_WRITE 0x0A
48#define TMP401_TEMP_CRIT_HYST 0x21
ab2b79d5
HG
49#define TMP401_MANUFACTURER_ID_REG 0xFE
50#define TMP401_DEVICE_ID_REG 0xFF
51
c0a68601 52static const u8 TMP401_TEMP_MSB_READ[7][2] = {
14f2a665
GR
53 { 0x00, 0x01 }, /* temp */
54 { 0x06, 0x08 }, /* low limit */
55 { 0x05, 0x07 }, /* high limit */
56 { 0x20, 0x19 }, /* therm (crit) limit */
57 { 0x30, 0x34 }, /* lowest */
58 { 0x32, 0x36 }, /* highest */
c0a68601 59 { 0, 0x11 }, /* offset */
14f2a665
GR
60};
61
c0a68601 62static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
14f2a665
GR
63 { 0, 0 }, /* temp (unused) */
64 { 0x0C, 0x0E }, /* low limit */
65 { 0x0B, 0x0D }, /* high limit */
66 { 0x20, 0x19 }, /* therm (crit) limit */
67 { 0x30, 0x34 }, /* lowest */
68 { 0x32, 0x36 }, /* highest */
c0a68601 69 { 0, 0x11 }, /* offset */
14f2a665
GR
70};
71
29dd3b64
GR
72static const u8 TMP432_TEMP_MSB_READ[4][3] = {
73 { 0x00, 0x01, 0x23 }, /* temp */
74 { 0x06, 0x08, 0x16 }, /* low limit */
75 { 0x05, 0x07, 0x15 }, /* high limit */
76 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
77};
78
79static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
80 { 0, 0, 0 }, /* temp - unused */
81 { 0x0C, 0x0E, 0x16 }, /* low limit */
82 { 0x0B, 0x0D, 0x15 }, /* high limit */
83 { 0x20, 0x19, 0x1A }, /* therm (crit) limit */
84};
85
29dd3b64
GR
86/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
87static const u8 TMP432_STATUS_REG[] = {
88 0x1b, 0x36, 0x35, 0x37 };
89
ab2b79d5 90/* Flags */
947e9271
GR
91#define TMP401_CONFIG_RANGE BIT(2)
92#define TMP401_CONFIG_SHUTDOWN BIT(6)
93#define TMP401_STATUS_LOCAL_CRIT BIT(0)
94#define TMP401_STATUS_REMOTE_CRIT BIT(1)
95#define TMP401_STATUS_REMOTE_OPEN BIT(2)
96#define TMP401_STATUS_REMOTE_LOW BIT(3)
97#define TMP401_STATUS_REMOTE_HIGH BIT(4)
98#define TMP401_STATUS_LOCAL_LOW BIT(5)
99#define TMP401_STATUS_LOCAL_HIGH BIT(6)
ab2b79d5 100
29dd3b64
GR
101/* On TMP432, each status has its own register */
102#define TMP432_STATUS_LOCAL BIT(0)
103#define TMP432_STATUS_REMOTE1 BIT(1)
104#define TMP432_STATUS_REMOTE2 BIT(2)
105
ab2b79d5
HG
106/* Manufacturer / Device ID's */
107#define TMP401_MANUFACTURER_ID 0x55
108#define TMP401_DEVICE_ID 0x11
4ce5b1fe
GR
109#define TMP411A_DEVICE_ID 0x12
110#define TMP411B_DEVICE_ID 0x13
111#define TMP411C_DEVICE_ID 0x10
a1fac92b 112#define TMP431_DEVICE_ID 0x31
29dd3b64 113#define TMP432_DEVICE_ID 0x32
06adbaec 114#define TMP435_DEVICE_ID 0x35
ab2b79d5 115
ab2b79d5
HG
116/*
117 * Driver data (common to all clients)
118 */
119
120static const struct i2c_device_id tmp401_id[] = {
121 { "tmp401", tmp401 },
fce0758f 122 { "tmp411", tmp411 },
a1fac92b 123 { "tmp431", tmp431 },
29dd3b64 124 { "tmp432", tmp432 },
06adbaec 125 { "tmp435", tmp435 },
c0a68601 126 { "tmp461", tmp461 },
ab2b79d5
HG
127 { }
128};
129MODULE_DEVICE_TABLE(i2c, tmp401_id);
130
ab2b79d5
HG
131/*
132 * Client data (each client gets its own)
133 */
134
135struct tmp401_data {
f3643ac7
GR
136 struct i2c_client *client;
137 const struct attribute_group *groups[3];
ab2b79d5
HG
138 struct mutex update_lock;
139 char valid; /* zero until following fields are valid */
140 unsigned long last_updated; /* in jiffies */
dc71afe5 141 enum chips kind;
ab2b79d5 142
0846e30d
GR
143 unsigned int update_interval; /* in milliseconds */
144
ab2b79d5 145 /* register values */
29dd3b64 146 u8 status[4];
ab2b79d5 147 u8 config;
c0a68601 148 u16 temp[7][3];
ab2b79d5
HG
149 u8 temp_crit_hyst;
150};
151
152/*
153 * Sysfs attr show / store functions
154 */
155
156static int tmp401_register_to_temp(u16 reg, u8 config)
157{
158 int temp = reg;
159
160 if (config & TMP401_CONFIG_RANGE)
161 temp -= 64 * 256;
162
14f2a665 163 return DIV_ROUND_CLOSEST(temp * 125, 32);
ab2b79d5
HG
164}
165
14f2a665 166static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
ab2b79d5
HG
167{
168 if (config & TMP401_CONFIG_RANGE) {
2a844c14 169 temp = clamp_val(temp, -64000, 191000);
ab2b79d5
HG
170 temp += 64000;
171 } else
2a844c14 172 temp = clamp_val(temp, 0, 127000);
ab2b79d5 173
14f2a665 174 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
ab2b79d5
HG
175}
176
14f2a665
GR
177static int tmp401_update_device_reg16(struct i2c_client *client,
178 struct tmp401_data *data)
ea63c2b9 179{
14f2a665
GR
180 int i, j, val;
181 int num_regs = data->kind == tmp411 ? 6 : 4;
29dd3b64 182 int num_sensors = data->kind == tmp432 ? 3 : 2;
14f2a665 183
29dd3b64 184 for (i = 0; i < num_sensors; i++) { /* local / r1 / r2 */
14f2a665 185 for (j = 0; j < num_regs; j++) { /* temp / low / ... */
29dd3b64 186 u8 regaddr;
24333ac2 187
29dd3b64
GR
188 regaddr = data->kind == tmp432 ?
189 TMP432_TEMP_MSB_READ[j][i] :
190 TMP401_TEMP_MSB_READ[j][i];
24333ac2
JDW
191 if (j == 3) { /* crit is msb only */
192 val = i2c_smbus_read_byte_data(client, regaddr);
193 } else {
194 val = i2c_smbus_read_word_swapped(client,
195 regaddr);
196 }
14f2a665
GR
197 if (val < 0)
198 return val;
24333ac2
JDW
199
200 data->temp[j][i] = j == 3 ? val << 8 : val;
ea63c2b9
AP
201 }
202 }
14f2a665 203 return 0;
ea63c2b9
AP
204}
205
206static struct tmp401_data *tmp401_update_device(struct device *dev)
207{
f3643ac7
GR
208 struct tmp401_data *data = dev_get_drvdata(dev);
209 struct i2c_client *client = data->client;
14f2a665 210 struct tmp401_data *ret = data;
29dd3b64 211 int i, val;
0846e30d 212 unsigned long next_update;
ea63c2b9
AP
213
214 mutex_lock(&data->update_lock);
215
0846e30d 216 next_update = data->last_updated +
4e2284d2 217 msecs_to_jiffies(data->update_interval);
0846e30d 218 if (time_after(jiffies, next_update) || !data->valid) {
29dd3b64
GR
219 if (data->kind != tmp432) {
220 /*
221 * The driver uses the TMP432 status format internally.
222 * Convert status to TMP432 format for other chips.
223 */
224 val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
225 if (val < 0) {
226 ret = ERR_PTR(val);
227 goto abort;
228 }
229 data->status[0] =
230 (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
231 data->status[1] =
232 ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
233 ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
234 data->status[2] =
235 ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
236 ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
237 data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
238 | TMP401_STATUS_REMOTE_CRIT);
239 } else {
240 for (i = 0; i < ARRAY_SIZE(data->status); i++) {
241 val = i2c_smbus_read_byte_data(client,
242 TMP432_STATUS_REG[i]);
243 if (val < 0) {
244 ret = ERR_PTR(val);
245 goto abort;
246 }
247 data->status[i] = val;
248 }
14f2a665 249 }
29dd3b64 250
14f2a665
GR
251 val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
252 if (val < 0) {
253 ret = ERR_PTR(val);
254 goto abort;
255 }
256 data->config = val;
257 val = tmp401_update_device_reg16(client, data);
258 if (val < 0) {
259 ret = ERR_PTR(val);
260 goto abort;
261 }
262 val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
263 if (val < 0) {
264 ret = ERR_PTR(val);
265 goto abort;
266 }
267 data->temp_crit_hyst = val;
ea63c2b9
AP
268
269 data->last_updated = jiffies;
270 data->valid = 1;
271 }
272
14f2a665 273abort:
ea63c2b9 274 mutex_unlock(&data->update_lock);
14f2a665 275 return ret;
ab2b79d5
HG
276}
277
e36917f4
GR
278static ssize_t temp_show(struct device *dev, struct device_attribute *devattr,
279 char *buf)
ab2b79d5 280{
14f2a665
GR
281 int nr = to_sensor_dev_attr_2(devattr)->nr;
282 int index = to_sensor_dev_attr_2(devattr)->index;
ab2b79d5
HG
283 struct tmp401_data *data = tmp401_update_device(dev);
284
14f2a665
GR
285 if (IS_ERR(data))
286 return PTR_ERR(data);
ab2b79d5
HG
287
288 return sprintf(buf, "%d\n",
14f2a665 289 tmp401_register_to_temp(data->temp[nr][index], data->config));
ab2b79d5
HG
290}
291
e36917f4
GR
292static ssize_t temp_crit_hyst_show(struct device *dev,
293 struct device_attribute *devattr,
294 char *buf)
ab2b79d5
HG
295{
296 int temp, index = to_sensor_dev_attr(devattr)->index;
297 struct tmp401_data *data = tmp401_update_device(dev);
298
14f2a665
GR
299 if (IS_ERR(data))
300 return PTR_ERR(data);
301
ab2b79d5 302 mutex_lock(&data->update_lock);
14f2a665 303 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
ab2b79d5
HG
304 temp -= data->temp_crit_hyst * 1000;
305 mutex_unlock(&data->update_lock);
306
307 return sprintf(buf, "%d\n", temp);
308}
309
e36917f4
GR
310static ssize_t status_show(struct device *dev,
311 struct device_attribute *devattr, char *buf)
ab2b79d5 312{
29dd3b64
GR
313 int nr = to_sensor_dev_attr_2(devattr)->nr;
314 int mask = to_sensor_dev_attr_2(devattr)->index;
ab2b79d5
HG
315 struct tmp401_data *data = tmp401_update_device(dev);
316
14f2a665
GR
317 if (IS_ERR(data))
318 return PTR_ERR(data);
ab2b79d5 319
29dd3b64 320 return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
ab2b79d5
HG
321}
322
e36917f4
GR
323static ssize_t temp_store(struct device *dev,
324 struct device_attribute *devattr, const char *buf,
325 size_t count)
ab2b79d5 326{
14f2a665
GR
327 int nr = to_sensor_dev_attr_2(devattr)->nr;
328 int index = to_sensor_dev_attr_2(devattr)->index;
f3643ac7
GR
329 struct tmp401_data *data = dev_get_drvdata(dev);
330 struct i2c_client *client = data->client;
ab2b79d5
HG
331 long val;
332 u16 reg;
29dd3b64 333 u8 regaddr;
ab2b79d5 334
179c4fdb 335 if (kstrtol(buf, 10, &val))
ab2b79d5
HG
336 return -EINVAL;
337
14f2a665 338 reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
ab2b79d5
HG
339
340 mutex_lock(&data->update_lock);
341
29dd3b64
GR
342 regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
343 : TMP401_TEMP_MSB_WRITE[nr][index];
24333ac2
JDW
344 if (nr == 3) { /* crit is msb only */
345 i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
346 } else {
347 /* Hardware expects big endian data --> use _swapped */
348 i2c_smbus_write_word_swapped(client, regaddr, reg);
14f2a665
GR
349 }
350 data->temp[nr][index] = reg;
ab2b79d5
HG
351
352 mutex_unlock(&data->update_lock);
353
354 return count;
355}
356
e36917f4
GR
357static ssize_t temp_crit_hyst_store(struct device *dev,
358 struct device_attribute *devattr,
359 const char *buf, size_t count)
ab2b79d5
HG
360{
361 int temp, index = to_sensor_dev_attr(devattr)->index;
362 struct tmp401_data *data = tmp401_update_device(dev);
363 long val;
364 u8 reg;
365
14f2a665
GR
366 if (IS_ERR(data))
367 return PTR_ERR(data);
368
179c4fdb 369 if (kstrtol(buf, 10, &val))
ab2b79d5
HG
370 return -EINVAL;
371
372 if (data->config & TMP401_CONFIG_RANGE)
2a844c14 373 val = clamp_val(val, -64000, 191000);
ab2b79d5 374 else
2a844c14 375 val = clamp_val(val, 0, 127000);
ab2b79d5
HG
376
377 mutex_lock(&data->update_lock);
14f2a665 378 temp = tmp401_register_to_temp(data->temp[3][index], data->config);
2a844c14 379 val = clamp_val(val, temp - 255000, temp);
ab2b79d5
HG
380 reg = ((temp - val) + 500) / 1000;
381
f3643ac7 382 i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
14f2a665 383 reg);
ab2b79d5
HG
384
385 data->temp_crit_hyst = reg;
386
387 mutex_unlock(&data->update_lock);
388
389 return count;
390}
391
fce0758f
AP
392/*
393 * Resets the historical measurements of minimum and maximum temperatures.
394 * This is done by writing any value to any of the minimum/maximum registers
395 * (0x30-0x37).
396 */
e36917f4
GR
397static ssize_t reset_temp_history_store(struct device *dev,
398 struct device_attribute *devattr,
399 const char *buf, size_t count)
fce0758f 400{
f3643ac7
GR
401 struct tmp401_data *data = dev_get_drvdata(dev);
402 struct i2c_client *client = data->client;
fce0758f
AP
403 long val;
404
179c4fdb 405 if (kstrtol(buf, 10, &val))
fce0758f
AP
406 return -EINVAL;
407
408 if (val != 1) {
b55f3757
GR
409 dev_err(dev,
410 "temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
411 val);
fce0758f
AP
412 return -EINVAL;
413 }
8eb6d90f
GR
414 mutex_lock(&data->update_lock);
415 i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
416 data->valid = 0;
417 mutex_unlock(&data->update_lock);
fce0758f
AP
418
419 return count;
420}
421
5343aed1 422static ssize_t update_interval_show(struct device *dev,
0846e30d
GR
423 struct device_attribute *attr, char *buf)
424{
f3643ac7 425 struct tmp401_data *data = dev_get_drvdata(dev);
0846e30d
GR
426
427 return sprintf(buf, "%u\n", data->update_interval);
428}
429
5343aed1
JL
430static ssize_t update_interval_store(struct device *dev,
431 struct device_attribute *attr,
432 const char *buf, size_t count)
0846e30d 433{
f3643ac7
GR
434 struct tmp401_data *data = dev_get_drvdata(dev);
435 struct i2c_client *client = data->client;
0846e30d
GR
436 unsigned long val;
437 int err, rate;
438
439 err = kstrtoul(buf, 10, &val);
440 if (err)
441 return err;
442
443 /*
444 * For valid rates, interval can be calculated as
445 * interval = (1 << (7 - rate)) * 125;
446 * Rounded rate is therefore
447 * rate = 7 - __fls(interval * 4 / (125 * 3));
448 * Use clamp_val() to avoid overflows, and to ensure valid input
449 * for __fls.
450 */
451 val = clamp_val(val, 125, 16000);
452 rate = 7 - __fls(val * 4 / (125 * 3));
453 mutex_lock(&data->update_lock);
454 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
455 data->update_interval = (1 << (7 - rate)) * 125;
456 mutex_unlock(&data->update_lock);
457
458 return count;
459}
460
e36917f4
GR
461static SENSOR_DEVICE_ATTR_2_RO(temp1_input, temp, 0, 0);
462static SENSOR_DEVICE_ATTR_2_RW(temp1_min, temp, 1, 0);
463static SENSOR_DEVICE_ATTR_2_RW(temp1_max, temp, 2, 0);
464static SENSOR_DEVICE_ATTR_2_RW(temp1_crit, temp, 3, 0);
465static SENSOR_DEVICE_ATTR_RW(temp1_crit_hyst, temp_crit_hyst, 0);
466static SENSOR_DEVICE_ATTR_2_RO(temp1_min_alarm, status, 1,
467 TMP432_STATUS_LOCAL);
468static SENSOR_DEVICE_ATTR_2_RO(temp1_max_alarm, status, 2,
469 TMP432_STATUS_LOCAL);
470static SENSOR_DEVICE_ATTR_2_RO(temp1_crit_alarm, status, 3,
471 TMP432_STATUS_LOCAL);
472static SENSOR_DEVICE_ATTR_2_RO(temp2_input, temp, 0, 1);
473static SENSOR_DEVICE_ATTR_2_RW(temp2_min, temp, 1, 1);
474static SENSOR_DEVICE_ATTR_2_RW(temp2_max, temp, 2, 1);
475static SENSOR_DEVICE_ATTR_2_RW(temp2_crit, temp, 3, 1);
476static SENSOR_DEVICE_ATTR_RO(temp2_crit_hyst, temp_crit_hyst, 1);
477static SENSOR_DEVICE_ATTR_2_RO(temp2_fault, status, 0, TMP432_STATUS_REMOTE1);
478static SENSOR_DEVICE_ATTR_2_RO(temp2_min_alarm, status, 1,
479 TMP432_STATUS_REMOTE1);
480static SENSOR_DEVICE_ATTR_2_RO(temp2_max_alarm, status, 2,
481 TMP432_STATUS_REMOTE1);
482static SENSOR_DEVICE_ATTR_2_RO(temp2_crit_alarm, status, 3,
483 TMP432_STATUS_REMOTE1);
b4e665c7 484
5343aed1 485static DEVICE_ATTR_RW(update_interval);
0846e30d 486
b4e665c7
GR
487static struct attribute *tmp401_attributes[] = {
488 &sensor_dev_attr_temp1_input.dev_attr.attr,
489 &sensor_dev_attr_temp1_min.dev_attr.attr,
490 &sensor_dev_attr_temp1_max.dev_attr.attr,
491 &sensor_dev_attr_temp1_crit.dev_attr.attr,
492 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
493 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
494 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
495 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
496
497 &sensor_dev_attr_temp2_input.dev_attr.attr,
498 &sensor_dev_attr_temp2_min.dev_attr.attr,
499 &sensor_dev_attr_temp2_max.dev_attr.attr,
500 &sensor_dev_attr_temp2_crit.dev_attr.attr,
501 &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
502 &sensor_dev_attr_temp2_fault.dev_attr.attr,
503 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
504 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
505 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
506
0846e30d
GR
507 &dev_attr_update_interval.attr,
508
b4e665c7
GR
509 NULL
510};
511
512static const struct attribute_group tmp401_group = {
513 .attrs = tmp401_attributes,
ab2b79d5
HG
514};
515
fce0758f
AP
516/*
517 * Additional features of the TMP411 chip.
518 * The TMP411 stores the minimum and maximum
519 * temperature measured since power-on, chip-reset, or
520 * minimum and maximum register reset for both the local
521 * and remote channels.
522 */
e36917f4
GR
523static SENSOR_DEVICE_ATTR_2_RO(temp1_lowest, temp, 4, 0);
524static SENSOR_DEVICE_ATTR_2_RO(temp1_highest, temp, 5, 0);
525static SENSOR_DEVICE_ATTR_2_RO(temp2_lowest, temp, 4, 1);
526static SENSOR_DEVICE_ATTR_2_RO(temp2_highest, temp, 5, 1);
527static SENSOR_DEVICE_ATTR_WO(temp_reset_history, reset_temp_history, 0);
b4e665c7
GR
528
529static struct attribute *tmp411_attributes[] = {
530 &sensor_dev_attr_temp1_highest.dev_attr.attr,
531 &sensor_dev_attr_temp1_lowest.dev_attr.attr,
532 &sensor_dev_attr_temp2_highest.dev_attr.attr,
533 &sensor_dev_attr_temp2_lowest.dev_attr.attr,
534 &sensor_dev_attr_temp_reset_history.dev_attr.attr,
535 NULL
536};
537
538static const struct attribute_group tmp411_group = {
539 .attrs = tmp411_attributes,
fce0758f
AP
540};
541
e36917f4
GR
542static SENSOR_DEVICE_ATTR_2_RO(temp3_input, temp, 0, 2);
543static SENSOR_DEVICE_ATTR_2_RW(temp3_min, temp, 1, 2);
544static SENSOR_DEVICE_ATTR_2_RW(temp3_max, temp, 2, 2);
545static SENSOR_DEVICE_ATTR_2_RW(temp3_crit, temp, 3, 2);
546static SENSOR_DEVICE_ATTR_RO(temp3_crit_hyst, temp_crit_hyst, 2);
547static SENSOR_DEVICE_ATTR_2_RO(temp3_fault, status, 0, TMP432_STATUS_REMOTE2);
548static SENSOR_DEVICE_ATTR_2_RO(temp3_min_alarm, status, 1,
549 TMP432_STATUS_REMOTE2);
550static SENSOR_DEVICE_ATTR_2_RO(temp3_max_alarm, status, 2,
551 TMP432_STATUS_REMOTE2);
552static SENSOR_DEVICE_ATTR_2_RO(temp3_crit_alarm, status, 3,
553 TMP432_STATUS_REMOTE2);
29dd3b64
GR
554
555static struct attribute *tmp432_attributes[] = {
556 &sensor_dev_attr_temp3_input.dev_attr.attr,
557 &sensor_dev_attr_temp3_min.dev_attr.attr,
558 &sensor_dev_attr_temp3_max.dev_attr.attr,
559 &sensor_dev_attr_temp3_crit.dev_attr.attr,
560 &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
561 &sensor_dev_attr_temp3_fault.dev_attr.attr,
562 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
563 &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
564 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
565
566 NULL
567};
568
569static const struct attribute_group tmp432_group = {
570 .attrs = tmp432_attributes,
571};
572
c0a68601
AD
573/*
574 * Additional features of the TMP461 chip.
575 * The TMP461 temperature offset for the remote channel.
576 */
e36917f4 577static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, 6, 1);
c0a68601
AD
578
579static struct attribute *tmp461_attributes[] = {
580 &sensor_dev_attr_temp2_offset.dev_attr.attr,
581 NULL
582};
583
584static const struct attribute_group tmp461_group = {
585 .attrs = tmp461_attributes,
586};
587
ab2b79d5
HG
588/*
589 * Begin non sysfs callback code (aka Real code)
590 */
591
90652efe
BG
592static int tmp401_init_client(struct tmp401_data *data,
593 struct i2c_client *client)
ab2b79d5 594{
90652efe 595 int config, config_orig, status = 0;
ab2b79d5
HG
596
597 /* Set the conversion rate to 2 Hz */
598 i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
0846e30d 599 data->update_interval = 500;
ab2b79d5
HG
600
601 /* Start conversions (disable shutdown if necessary) */
602 config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
90652efe
BG
603 if (config < 0)
604 return config;
ab2b79d5
HG
605
606 config_orig = config;
607 config &= ~TMP401_CONFIG_SHUTDOWN;
608
609 if (config != config_orig)
90652efe
BG
610 status = i2c_smbus_write_byte_data(client,
611 TMP401_CONFIG_WRITE,
612 config);
613
614 return status;
ab2b79d5
HG
615}
616
310ec792 617static int tmp401_detect(struct i2c_client *client,
ab2b79d5
HG
618 struct i2c_board_info *info)
619{
dbe73c8f 620 enum chips kind;
ab2b79d5 621 struct i2c_adapter *adapter = client->adapter;
dbe73c8f 622 u8 reg;
ab2b79d5
HG
623
624 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
625 return -ENODEV;
626
627 /* Detect and identify the chip */
dbe73c8f
JD
628 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
629 if (reg != TMP401_MANUFACTURER_ID)
630 return -ENODEV;
ab2b79d5 631
dbe73c8f 632 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
ab2b79d5 633
dbe73c8f
JD
634 switch (reg) {
635 case TMP401_DEVICE_ID:
a1fac92b
GR
636 if (client->addr != 0x4c)
637 return -ENODEV;
dbe73c8f
JD
638 kind = tmp401;
639 break;
4ce5b1fe
GR
640 case TMP411A_DEVICE_ID:
641 if (client->addr != 0x4c)
642 return -ENODEV;
643 kind = tmp411;
644 break;
645 case TMP411B_DEVICE_ID:
646 if (client->addr != 0x4d)
647 return -ENODEV;
648 kind = tmp411;
649 break;
650 case TMP411C_DEVICE_ID:
651 if (client->addr != 0x4e)
652 return -ENODEV;
dbe73c8f
JD
653 kind = tmp411;
654 break;
a1fac92b 655 case TMP431_DEVICE_ID:
907a6d58 656 if (client->addr != 0x4c && client->addr != 0x4d)
a1fac92b
GR
657 return -ENODEV;
658 kind = tmp431;
659 break;
29dd3b64 660 case TMP432_DEVICE_ID:
907a6d58 661 if (client->addr != 0x4c && client->addr != 0x4d)
29dd3b64
GR
662 return -ENODEV;
663 kind = tmp432;
664 break;
06adbaec 665 case TMP435_DEVICE_ID:
06adbaec
PT
666 kind = tmp435;
667 break;
dbe73c8f
JD
668 default:
669 return -ENODEV;
ab2b79d5 670 }
dbe73c8f
JD
671
672 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
673 if (reg & 0x1b)
674 return -ENODEV;
675
676 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
677 /* Datasheet says: 0x1-0x6 */
678 if (reg > 15)
679 return -ENODEV;
680
dc71afe5 681 strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
ab2b79d5
HG
682
683 return 0;
684}
685
686static int tmp401_probe(struct i2c_client *client,
687 const struct i2c_device_id *id)
688{
06adbaec 689 static const char * const names[] = {
c0a68601 690 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
06adbaec 691 };
b4e665c7 692 struct device *dev = &client->dev;
f3643ac7 693 struct device *hwmon_dev;
ab2b79d5 694 struct tmp401_data *data;
90652efe 695 int groups = 0, status;
ab2b79d5 696
b4e665c7 697 data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
ab2b79d5
HG
698 if (!data)
699 return -ENOMEM;
700
f3643ac7 701 data->client = client;
ab2b79d5 702 mutex_init(&data->update_lock);
fce0758f 703 data->kind = id->driver_data;
ab2b79d5
HG
704
705 /* Initialize the TMP401 chip */
90652efe
BG
706 status = tmp401_init_client(data, client);
707 if (status < 0)
708 return status;
ab2b79d5
HG
709
710 /* Register sysfs hooks */
f3643ac7 711 data->groups[groups++] = &tmp401_group;
ab2b79d5 712
a80581d0 713 /* Register additional tmp411 sysfs hooks */
f3643ac7
GR
714 if (data->kind == tmp411)
715 data->groups[groups++] = &tmp411_group;
fce0758f 716
29dd3b64 717 /* Register additional tmp432 sysfs hooks */
f3643ac7
GR
718 if (data->kind == tmp432)
719 data->groups[groups++] = &tmp432_group;
29dd3b64 720
c0a68601
AD
721 if (data->kind == tmp461)
722 data->groups[groups++] = &tmp461_group;
723
f3643ac7
GR
724 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
725 data, data->groups);
726 if (IS_ERR(hwmon_dev))
727 return PTR_ERR(hwmon_dev);
ab2b79d5 728
b4e665c7 729 dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
ab2b79d5
HG
730
731 return 0;
ab2b79d5
HG
732}
733
ea63c2b9
AP
734static struct i2c_driver tmp401_driver = {
735 .class = I2C_CLASS_HWMON,
736 .driver = {
737 .name = "tmp401",
738 },
739 .probe = tmp401_probe,
ea63c2b9
AP
740 .id_table = tmp401_id,
741 .detect = tmp401_detect,
742 .address_list = normal_i2c,
743};
ab2b79d5 744
f0967eea 745module_i2c_driver(tmp401_driver);
ab2b79d5
HG
746
747MODULE_AUTHOR("Hans de Goede <[email protected]>");
748MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
749MODULE_LICENSE("GPL");
This page took 0.929468 seconds and 4 git commands to generate.