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[ALSA] Fix section mismatch errors in ALSA PCI drivers
[linux.git] / sound / pci / ice1712 / ice1724.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <[email protected]>
6 * 2002 James Stafford <[email protected]>
7 * 2003 Takashi Iwai <[email protected]>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <sound/driver.h>
26#include <asm/io.h>
27#include <linux/delay.h>
28#include <linux/interrupt.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/moduleparam.h>
62932df8 33#include <linux/mutex.h>
1da177e4
LT		 34#include <sound/core.h>
35#include <sound/info.h>
36#include <sound/mpu401.h>
37#include <sound/initval.h>
38
39#include <sound/asoundef.h>
40
41#include "ice1712.h"
42#include "envy24ht.h"
43
44/* lowlevel routines */
45#include "amp.h"
46#include "revo.h"
47#include "aureon.h"
48#include "vt1720_mobo.h"
49#include "pontis.h"
50#include "prodigy192.h"
51#include "juli.h"
52#include "phase.h"
53
54
55MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
56MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
57MODULE_LICENSE("GPL");
58MODULE_SUPPORTED_DEVICE("{"
59 REVO_DEVICE_DESC
60 AMP_AUDIO2000_DEVICE_DESC
61 AUREON_DEVICE_DESC
62 VT1720_MOBO_DEVICE_DESC
63 PONTIS_DEVICE_DESC
64 PRODIGY192_DEVICE_DESC
65 JULI_DEVICE_DESC
66 PHASE_DEVICE_DESC
67 "{VIA,VT1720},"
68 "{VIA,VT1724},"
69 "{ICEnsemble,Generic ICE1724},"
70 "{ICEnsemble,Generic Envy24HT}"
71 "{ICEnsemble,Generic Envy24PT}}");
72
73static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
74static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
75static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
76static char *model[SNDRV_CARDS];
77
78module_param_array(index, int, NULL, 0444);
79MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
80module_param_array(id, charp, NULL, 0444);
81MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
82module_param_array(enable, bool, NULL, 0444);
83MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
84module_param_array(model, charp, NULL, 0444);
85MODULE_PARM_DESC(model, "Use the given board model.");
86
1da177e4
LT		 87
88/* Both VT1720 and VT1724 have the same PCI IDs */
f40b6890 89static struct pci_device_id snd_vt1724_ids[] = {
1da177e4
LT		 90 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
91 { 0, }
92};
93
94MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
95
96
97static int PRO_RATE_LOCKED;
98static int PRO_RATE_RESET = 1;
99static unsigned int PRO_RATE_DEFAULT = 44100;
100
101/*
102 * Basic I/O
103 */
104
105/* check whether the clock mode is spdif-in */
ab0c7d72 106static inline int is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 107{
108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
109}
110
ab0c7d72 111static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4
LT		 112{
113 return is_spdif_master(ice) || PRO_RATE_LOCKED;
114}
115
116/*
117 * ac97 section
118 */
119
ab0c7d72 120static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT		 121{
122 unsigned char old_cmd;
123 int tm;
124 for (tm = 0; tm < 0x10000; tm++) {
125 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
126 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
127 continue;
128 if (!(old_cmd & VT1724_AC97_READY))
129 continue;
130 return old_cmd;
131 }
132 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
133 return old_cmd;
134}
135
ab0c7d72 136static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT		 137{
138 int tm;
139 for (tm = 0; tm < 0x10000; tm++)
140 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
141 return 0;
142 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
143 return -EIO;
144}
145
ab0c7d72 146static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 147 unsigned short reg,
148 unsigned short val)
149{
ab0c7d72 150 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 151 unsigned char old_cmd;
152
153 old_cmd = snd_vt1724_ac97_ready(ice);
154 old_cmd &= ~VT1724_AC97_ID_MASK;
155 old_cmd |= ac97->num;
156 outb(reg, ICEMT1724(ice, AC97_INDEX));
157 outw(val, ICEMT1724(ice, AC97_DATA));
158 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
159 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
160}
161
ab0c7d72 162static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 163{
ab0c7d72 164 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 165 unsigned char old_cmd;
166
167 old_cmd = snd_vt1724_ac97_ready(ice);
168 old_cmd &= ~VT1724_AC97_ID_MASK;
169 old_cmd |= ac97->num;
170 outb(reg, ICEMT1724(ice, AC97_INDEX));
171 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
172 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
173 return ~0;
174 return inw(ICEMT1724(ice, AC97_DATA));
175}
176
177
178/*
179 * GPIO operations
180 */
181
182/* set gpio direction 0 = read, 1 = write */
ab0c7d72 183static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 184{
185 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
186 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
187}
188
189/* set the gpio mask (0 = writable) */
ab0c7d72 190static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 191{
192 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
193 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
194 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
195 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
196}
197
ab0c7d72 198static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 199{
200 outw(data, ICEREG1724(ice, GPIO_DATA));
201 if (! ice->vt1720)
202 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
203 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
204}
205
ab0c7d72 206static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 207{
208 unsigned int data;
209 if (! ice->vt1720)
210 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
211 else
212 data = 0;
213 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
214 return data;
215}
216
217/*
218 * Interrupt handler
219 */
220
221static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
222{
ab0c7d72 223 struct snd_ice1712 *ice = dev_id;
1da177e4
LT		 224 unsigned char status;
225 int handled = 0;
226
227 while (1) {
228 status = inb(ICEREG1724(ice, IRQSTAT));
229 if (status == 0)
230 break;
231
232 handled = 1;
ab0c7d72
TI		 233 /* these should probably be separated at some point,
234 * but as we don't currently have MPU support on the board
235 * I will leave it
236 */
1da177e4
LT		 237 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
238 if (ice->rmidi[0])
239 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
240 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
241 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
242 }
243 if (status & VT1724_IRQ_MTPCM) {
244 /*
245 * Multi-track PCM
246 * PCM assignment are:
247 * Playback DMA0 (M/C) = playback_pro_substream
248 * Playback DMA1 = playback_con_substream_ds[0]
249 * Playback DMA2 = playback_con_substream_ds[1]
250 * Playback DMA3 = playback_con_substream_ds[2]
251 * Playback DMA4 (SPDIF) = playback_con_substream
252 * Record DMA0 = capture_pro_substream
253 * Record DMA1 = capture_con_substream
254 */
255 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
256 if (mtstat & VT1724_MULTI_PDMA0) {
257 if (ice->playback_pro_substream)
258 snd_pcm_period_elapsed(ice->playback_pro_substream);
259 }
260 if (mtstat & VT1724_MULTI_RDMA0) {
261 if (ice->capture_pro_substream)
262 snd_pcm_period_elapsed(ice->capture_pro_substream);
263 }
264 if (mtstat & VT1724_MULTI_PDMA1) {
265 if (ice->playback_con_substream_ds[0])
266 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
267 }
268 if (mtstat & VT1724_MULTI_PDMA2) {
269 if (ice->playback_con_substream_ds[1])
270 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
271 }
272 if (mtstat & VT1724_MULTI_PDMA3) {
273 if (ice->playback_con_substream_ds[2])
274 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
275 }
276 if (mtstat & VT1724_MULTI_PDMA4) {
277 if (ice->playback_con_substream)
278 snd_pcm_period_elapsed(ice->playback_con_substream);
279 }
280 if (mtstat & VT1724_MULTI_RDMA1) {
281 if (ice->capture_con_substream)
282 snd_pcm_period_elapsed(ice->capture_con_substream);
283 }
284 /* ack anyway to avoid freeze */
285 outb(mtstat, ICEMT1724(ice, IRQ));
286 /* ought to really handle this properly */
287 if (mtstat & VT1724_MULTI_FIFO_ERR) {
288 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
289 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
290 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
291 /* If I don't do this, I get machine lockup due to continual interrupts */
292 }
293
294 }
295 }
296 return IRQ_RETVAL(handled);
297}
298
299/*
300 * PCM code - professional part (multitrack)
301 */
302
303static unsigned int rates[] = {
304 8000, 9600, 11025, 12000, 16000, 22050, 24000,
305 32000, 44100, 48000, 64000, 88200, 96000,
306 176400, 192000,
307};
308
ab0c7d72 309static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT		 310 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
311 .list = rates,
312 .mask = 0,
313};
314
ab0c7d72 315static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT		 316 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
317 .list = rates,
318 .mask = 0,
319};
320
ab0c7d72 321static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT		 322 .count = ARRAY_SIZE(rates),
323 .list = rates,
324 .mask = 0,
325};
326
327struct vt1724_pcm_reg {
328 unsigned int addr; /* ADDR register offset */
329 unsigned int size; /* SIZE register offset */
330 unsigned int count; /* COUNT register offset */
331 unsigned int start; /* start & pause bit */
332};
333
ab0c7d72 334static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 335{
ab0c7d72 336 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 337 unsigned char what;
338 unsigned char old;
339 struct list_head *pos;
ab0c7d72 340 struct snd_pcm_substream *s;
1da177e4
LT		 341
342 what = 0;
343 snd_pcm_group_for_each(pos, substream) {
344 struct vt1724_pcm_reg *reg;
345 s = snd_pcm_group_substream_entry(pos);
346 reg = s->runtime->private_data;
347 what |= reg->start;
348 snd_pcm_trigger_done(s, substream);
349 }
350
351 switch (cmd) {
352 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
353 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
354 spin_lock(&ice->reg_lock);
355 old = inb(ICEMT1724(ice, DMA_PAUSE));
356 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
357 old |= what;
358 else
359 old &= ~what;
360 outb(old, ICEMT1724(ice, DMA_PAUSE));
361 spin_unlock(&ice->reg_lock);
362 break;
363
364 case SNDRV_PCM_TRIGGER_START:
365 case SNDRV_PCM_TRIGGER_STOP:
366 spin_lock(&ice->reg_lock);
367 old = inb(ICEMT1724(ice, DMA_CONTROL));
368 if (cmd == SNDRV_PCM_TRIGGER_START)
369 old |= what;
370 else
371 old &= ~what;
372 outb(old, ICEMT1724(ice, DMA_CONTROL));
373 spin_unlock(&ice->reg_lock);
374 break;
375
376 default:
377 return -EINVAL;
378 }
379 return 0;
380}
381
382/*
383 */
384
385#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
386 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
387#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
388 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
389
ab0c7d72 390static int get_max_rate(struct snd_ice1712 *ice)
1da177e4
LT		 391{
392 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
393 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
394 return 192000;
395 else
396 return 96000;
397 } else
398 return 48000;
399}
400
ab0c7d72
TI		 401static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
402 int force)
1da177e4
LT		 403{
404 unsigned long flags;
405 unsigned char val, old;
406 unsigned int i, mclk_change;
407
408 if (rate > get_max_rate(ice))
409 return;
410
411 switch (rate) {
412 case 8000: val = 6; break;
413 case 9600: val = 3; break;
414 case 11025: val = 10; break;
415 case 12000: val = 2; break;
416 case 16000: val = 5; break;
417 case 22050: val = 9; break;
418 case 24000: val = 1; break;
419 case 32000: val = 4; break;
420 case 44100: val = 8; break;
421 case 48000: val = 0; break;
422 case 64000: val = 15; break;
423 case 88200: val = 11; break;
424 case 96000: val = 7; break;
425 case 176400: val = 12; break;
426 case 192000: val = 14; break;
427 default:
428 snd_BUG();
429 val = 0;
430 break;
431 }
432
433 spin_lock_irqsave(&ice->reg_lock, flags);
434 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
435 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
436 /* running? we cannot change the rate now... */
437 spin_unlock_irqrestore(&ice->reg_lock, flags);
438 return;
439 }
440 if (!force && is_pro_rate_locked(ice)) {
441 spin_unlock_irqrestore(&ice->reg_lock, flags);
442 return;
443 }
444
445 old = inb(ICEMT1724(ice, RATE));
446 if (force || old != val)
447 outb(val, ICEMT1724(ice, RATE));
448 else if (rate == ice->cur_rate) {
449 spin_unlock_irqrestore(&ice->reg_lock, flags);
450 return;
451 }
452
453 ice->cur_rate = rate;
454
455 /* check MT02 */
456 mclk_change = 0;
457 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
458 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
459 if (rate > 96000)
460 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
461 else
462 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
463 if (val != old) {
464 outb(val, ICEMT1724(ice, I2S_FORMAT));
465 mclk_change = 1;
466 }
467 }
468 spin_unlock_irqrestore(&ice->reg_lock, flags);
469
470 if (mclk_change && ice->gpio.i2s_mclk_changed)
471 ice->gpio.i2s_mclk_changed(ice);
472 if (ice->gpio.set_pro_rate)
473 ice->gpio.set_pro_rate(ice, rate);
474
475 /* set up codecs */
476 for (i = 0; i < ice->akm_codecs; i++) {
477 if (ice->akm[i].ops.set_rate_val)
478 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
479 }
480 if (ice->spdif.ops.setup_rate)
481 ice->spdif.ops.setup_rate(ice, rate);
482}
483
ab0c7d72
TI		 484static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
485 struct snd_pcm_hw_params *hw_params)
1da177e4 486{
ab0c7d72 487 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 488 int i, chs;
489
490 chs = params_channels(hw_params);
62932df8 491 mutex_lock(&ice->open_mutex);
1da177e4
LT		 492 /* mark surround channels */
493 if (substream == ice->playback_pro_substream) {
494 /* PDMA0 can be multi-channel up to 8 */
495 chs = chs / 2 - 1;
496 for (i = 0; i < chs; i++) {
ab0c7d72
TI		 497 if (ice->pcm_reserved[i] &&
498 ice->pcm_reserved[i] != substream) {
62932df8 499 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 500 return -EBUSY;
501 }
502 ice->pcm_reserved[i] = substream;
503 }
504 for (; i < 3; i++) {
505 if (ice->pcm_reserved[i] == substream)
506 ice->pcm_reserved[i] = NULL;
507 }
508 } else {
509 for (i = 0; i < 3; i++) {
510 /* check individual playback stream */
511 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI		 512 if (ice->pcm_reserved[i] &&
513 ice->pcm_reserved[i] != substream) {
62932df8 514 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 515 return -EBUSY;
516 }
517 ice->pcm_reserved[i] = substream;
518 break;
519 }
520 }
521 }
62932df8 522 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 523 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
524 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
525}
526
ab0c7d72 527static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 528{
ab0c7d72 529 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 530 int i;
531
62932df8 532 mutex_lock(&ice->open_mutex);
1da177e4
LT		 533 /* unmark surround channels */
534 for (i = 0; i < 3; i++)
535 if (ice->pcm_reserved[i] == substream)
536 ice->pcm_reserved[i] = NULL;
62932df8 537 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 538 return snd_pcm_lib_free_pages(substream);
539}
540
ab0c7d72 541static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 542{
ab0c7d72 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 544 unsigned char val;
545 unsigned int size;
546
547 spin_lock_irq(&ice->reg_lock);
548 val = (8 - substream->runtime->channels) >> 1;
549 outb(val, ICEMT1724(ice, BURST));
550
551 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
552
553 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
554 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
555 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
556 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
557 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
558 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
559 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
560 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
561
562 spin_unlock_irq(&ice->reg_lock);
563
564 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
565 return 0;
566}
567
ab0c7d72 568static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 569{
ab0c7d72 570 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 571 size_t ptr;
572
573 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
574 return 0;
575#if 0 /* read PLAYBACK_ADDR */
576 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
577 if (ptr < substream->runtime->dma_addr) {
578 snd_printd("ice1724: invalid negative ptr\n");
579 return 0;
580 }
581 ptr -= substream->runtime->dma_addr;
582 ptr = bytes_to_frames(substream->runtime, ptr);
583 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI		 584 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
585 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT		 586 return 0;
587 }
588#else /* read PLAYBACK_SIZE */
589 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
590 ptr = (ptr + 1) << 2;
591 ptr = bytes_to_frames(substream->runtime, ptr);
592 if (! ptr)
593 ;
594 else if (ptr <= substream->runtime->buffer_size)
595 ptr = substream->runtime->buffer_size - ptr;
596 else {
ab0c7d72
TI		 597 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
598 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 599 ptr = 0;
600 }
601#endif
602 return ptr;
603}
604
ab0c7d72 605static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 606{
ab0c7d72 607 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 608 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
609
610 spin_lock_irq(&ice->reg_lock);
611 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI		 612 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
613 ice->profi_port + reg->size);
614 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
615 ice->profi_port + reg->count);
1da177e4
LT		 616 spin_unlock_irq(&ice->reg_lock);
617 return 0;
618}
619
ab0c7d72 620static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 621{
ab0c7d72 622 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 623 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
624 size_t ptr;
625
626 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
627 return 0;
628#if 0 /* use ADDR register */
629 ptr = inl(ice->profi_port + reg->addr);
630 ptr -= substream->runtime->dma_addr;
631 return bytes_to_frames(substream->runtime, ptr);
632#else /* use SIZE register */
633 ptr = inw(ice->profi_port + reg->size);
634 ptr = (ptr + 1) << 2;
635 ptr = bytes_to_frames(substream->runtime, ptr);
636 if (! ptr)
637 ;
638 else if (ptr <= substream->runtime->buffer_size)
639 ptr = substream->runtime->buffer_size - ptr;
640 else {
ab0c7d72
TI		 641 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
642 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 643 ptr = 0;
644 }
645 return ptr;
646#endif
647}
648
649static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
650 .addr = VT1724_MT_PLAYBACK_ADDR,
651 .size = VT1724_MT_PLAYBACK_SIZE,
652 .count = VT1724_MT_PLAYBACK_COUNT,
653 .start = VT1724_PDMA0_START,
654};
655
656static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
657 .addr = VT1724_MT_CAPTURE_ADDR,
658 .size = VT1724_MT_CAPTURE_SIZE,
659 .count = VT1724_MT_CAPTURE_COUNT,
660 .start = VT1724_RDMA0_START,
661};
662
ab0c7d72 663static struct snd_pcm_hardware snd_vt1724_playback_pro =
1da177e4
LT		 664{
665 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
666 SNDRV_PCM_INFO_BLOCK_TRANSFER |
667 SNDRV_PCM_INFO_MMAP_VALID |
668 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
669 .formats = SNDRV_PCM_FMTBIT_S32_LE,
670 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
671 .rate_min = 8000,
672 .rate_max = 192000,
673 .channels_min = 2,
674 .channels_max = 8,
675 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
676 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
677 .period_bytes_max = (1UL << 21),
678 .periods_min = 2,
679 .periods_max = 1024,
680};
681
ab0c7d72 682static struct snd_pcm_hardware snd_vt1724_spdif =
1da177e4
LT		 683{
684 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
685 SNDRV_PCM_INFO_BLOCK_TRANSFER |
686 SNDRV_PCM_INFO_MMAP_VALID |
687 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
688 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI		 689 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
690 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
691 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
692 SNDRV_PCM_RATE_192000),
1da177e4 693 .rate_min = 32000,
2dfbeca9 694 .rate_max = 192000,
1da177e4
LT		 695 .channels_min = 2,
696 .channels_max = 2,
697 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
698 .period_bytes_min = 2 * 4 * 2,
699 .period_bytes_max = (1UL << 18),
700 .periods_min = 2,
701 .periods_max = 1024,
702};
703
ab0c7d72 704static struct snd_pcm_hardware snd_vt1724_2ch_stereo =
1da177e4
LT		 705{
706 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
707 SNDRV_PCM_INFO_BLOCK_TRANSFER |
708 SNDRV_PCM_INFO_MMAP_VALID |
709 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
710 .formats = SNDRV_PCM_FMTBIT_S32_LE,
711 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
712 .rate_min = 8000,
713 .rate_max = 192000,
714 .channels_min = 2,
715 .channels_max = 2,
716 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
717 .period_bytes_min = 2 * 4 * 2,
718 .period_bytes_max = (1UL << 18),
719 .periods_min = 2,
720 .periods_max = 1024,
721};
722
723/*
724 * set rate constraints
725 */
ab0c7d72
TI		 726static int set_rate_constraints(struct snd_ice1712 *ice,
727 struct snd_pcm_substream *substream)
1da177e4 728{
ab0c7d72 729 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 730 if (ice->hw_rates) {
731 /* hardware specific */
732 runtime->hw.rate_min = ice->hw_rates->list[0];
733 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
734 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
ab0c7d72
TI		 735 return snd_pcm_hw_constraint_list(runtime, 0,
736 SNDRV_PCM_HW_PARAM_RATE,
737 ice->hw_rates);
1da177e4
LT		 738 }
739 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
740 /* I2S */
741 /* VT1720 doesn't support more than 96kHz */
742 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
ab0c7d72
TI		 743 return snd_pcm_hw_constraint_list(runtime, 0,
744 SNDRV_PCM_HW_PARAM_RATE,
745 &hw_constraints_rates_192);
1da177e4 746 else {
ab0c7d72
TI		 747 runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
748 SNDRV_PCM_RATE_8000_96000;
1da177e4 749 runtime->hw.rate_max = 96000;
ab0c7d72
TI		 750 return snd_pcm_hw_constraint_list(runtime, 0,
751 SNDRV_PCM_HW_PARAM_RATE,
752 &hw_constraints_rates_96);
1da177e4
LT		 753 }
754 } else if (ice->ac97) {
755 /* ACLINK */
756 runtime->hw.rate_max = 48000;
757 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
ab0c7d72
TI		 758 return snd_pcm_hw_constraint_list(runtime, 0,
759 SNDRV_PCM_HW_PARAM_RATE,
760 &hw_constraints_rates_48);
1da177e4
LT		 761 }
762 return 0;
763}
764
765/* multi-channel playback needs alignment 8x32bit regardless of the channels
766 * actually used
767 */
768#define VT1724_BUFFER_ALIGN 0x20
769
ab0c7d72 770static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 771{
ab0c7d72
TI		 772 struct snd_pcm_runtime *runtime = substream->runtime;
773 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 774 int chs;
775
776 runtime->private_data = &vt1724_playback_pro_reg;
777 ice->playback_pro_substream = substream;
778 runtime->hw = snd_vt1724_playback_pro;
779 snd_pcm_set_sync(substream);
780 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
781 set_rate_constraints(ice, substream);
62932df8 782 mutex_lock(&ice->open_mutex);
1da177e4
LT		 783 /* calculate the currently available channels */
784 for (chs = 0; chs < 3; chs++) {
785 if (ice->pcm_reserved[chs])
786 break;
787 }
788 chs = (chs + 1) * 2;
789 runtime->hw.channels_max = chs;
790 if (chs > 2) /* channels must be even */
791 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 792 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 793 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
794 VT1724_BUFFER_ALIGN);
795 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
796 VT1724_BUFFER_ALIGN);
797 return 0;
798}
799
ab0c7d72 800static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 801{
ab0c7d72
TI		 802 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
803 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 804
805 runtime->private_data = &vt1724_capture_pro_reg;
806 ice->capture_pro_substream = substream;
807 runtime->hw = snd_vt1724_2ch_stereo;
808 snd_pcm_set_sync(substream);
809 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
810 set_rate_constraints(ice, substream);
811 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
812 VT1724_BUFFER_ALIGN);
813 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
814 VT1724_BUFFER_ALIGN);
815 return 0;
816}
817
ab0c7d72 818static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 819{
ab0c7d72 820 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 821
822 if (PRO_RATE_RESET)
823 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
824 ice->playback_pro_substream = NULL;
825
826 return 0;
827}
828
ab0c7d72 829static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 830{
ab0c7d72 831 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 832
833 if (PRO_RATE_RESET)
834 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
835 ice->capture_pro_substream = NULL;
836 return 0;
837}
838
ab0c7d72 839static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT		 840 .open = snd_vt1724_playback_pro_open,
841 .close = snd_vt1724_playback_pro_close,
842 .ioctl = snd_pcm_lib_ioctl,
843 .hw_params = snd_vt1724_pcm_hw_params,
844 .hw_free = snd_vt1724_pcm_hw_free,
845 .prepare = snd_vt1724_playback_pro_prepare,
846 .trigger = snd_vt1724_pcm_trigger,
847 .pointer = snd_vt1724_playback_pro_pointer,
848};
849
ab0c7d72 850static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT		 851 .open = snd_vt1724_capture_pro_open,
852 .close = snd_vt1724_capture_pro_close,
853 .ioctl = snd_pcm_lib_ioctl,
854 .hw_params = snd_vt1724_pcm_hw_params,
855 .hw_free = snd_vt1724_pcm_hw_free,
856 .prepare = snd_vt1724_pcm_prepare,
857 .trigger = snd_vt1724_pcm_trigger,
858 .pointer = snd_vt1724_pcm_pointer,
859};
860
ab0c7d72 861static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
1da177e4 862{
ab0c7d72 863 struct snd_pcm *pcm;
1da177e4
LT		 864 int err;
865
866 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
867 if (err < 0)
868 return err;
869
870 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
871 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
872
873 pcm->private_data = ice;
874 pcm->info_flags = 0;
875 strcpy(pcm->name, "ICE1724");
876
877 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 878 snd_dma_pci_data(ice->pci),
879 256*1024, 256*1024);
1da177e4
LT		 880
881 ice->pcm_pro = pcm;
882
883 return 0;
884}
885
886
887/*
888 * SPDIF PCM
889 */
890
891static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
892 .addr = VT1724_MT_PDMA4_ADDR,
893 .size = VT1724_MT_PDMA4_SIZE,
894 .count = VT1724_MT_PDMA4_COUNT,
895 .start = VT1724_PDMA4_START,
896};
897
898static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
899 .addr = VT1724_MT_RDMA1_ADDR,
900 .size = VT1724_MT_RDMA1_SIZE,
901 .count = VT1724_MT_RDMA1_COUNT,
902 .start = VT1724_RDMA1_START,
903};
904
905/* update spdif control bits; call with reg_lock */
ab0c7d72 906static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 907{
908 unsigned char cbit, disabled;
909
910 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
911 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
912 if (cbit != disabled)
913 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
914 outw(val, ICEMT1724(ice, SPDIF_CTRL));
915 if (cbit != disabled)
916 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
917 outw(val, ICEMT1724(ice, SPDIF_CTRL));
918}
919
920/* update SPDIF control bits according to the given rate */
ab0c7d72 921static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT		 922{
923 unsigned int val, nval;
924 unsigned long flags;
925
926 spin_lock_irqsave(&ice->reg_lock, flags);
927 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
928 nval &= ~(7 << 12);
929 switch (rate) {
930 case 44100: break;
931 case 48000: nval |= 2 << 12; break;
932 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI		 933 case 88200: nval |= 4 << 12; break;
934 case 96000: nval |= 5 << 12; break;
935 case 192000: nval |= 6 << 12; break;
936 case 176400: nval |= 7 << 12; break;
1da177e4
LT		 937 }
938 if (val != nval)
939 update_spdif_bits(ice, nval);
940 spin_unlock_irqrestore(&ice->reg_lock, flags);
941}
942
ab0c7d72 943static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 944{
ab0c7d72 945 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 946 if (! ice->force_pdma4)
947 update_spdif_rate(ice, substream->runtime->rate);
948 return snd_vt1724_pcm_prepare(substream);
949}
950
ab0c7d72 951static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 952{
ab0c7d72
TI		 953 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
954 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 955
956 runtime->private_data = &vt1724_playback_spdif_reg;
957 ice->playback_con_substream = substream;
958 if (ice->force_pdma4) {
959 runtime->hw = snd_vt1724_2ch_stereo;
960 set_rate_constraints(ice, substream);
961 } else
962 runtime->hw = snd_vt1724_spdif;
963 snd_pcm_set_sync(substream);
964 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
965 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
966 VT1724_BUFFER_ALIGN);
967 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
968 VT1724_BUFFER_ALIGN);
969 return 0;
970}
971
ab0c7d72 972static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 973{
ab0c7d72 974 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 975
976 if (PRO_RATE_RESET)
977 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
978 ice->playback_con_substream = NULL;
979
980 return 0;
981}
982
ab0c7d72 983static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 984{
ab0c7d72
TI		 985 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
986 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 987
988 runtime->private_data = &vt1724_capture_spdif_reg;
989 ice->capture_con_substream = substream;
990 if (ice->force_rdma1) {
991 runtime->hw = snd_vt1724_2ch_stereo;
992 set_rate_constraints(ice, substream);
993 } else
994 runtime->hw = snd_vt1724_spdif;
995 snd_pcm_set_sync(substream);
996 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
997 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
998 VT1724_BUFFER_ALIGN);
999 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1000 VT1724_BUFFER_ALIGN);
1001 return 0;
1002}
1003
ab0c7d72 1004static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1005{
ab0c7d72 1006 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1007
1008 if (PRO_RATE_RESET)
1009 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1010 ice->capture_con_substream = NULL;
1011
1012 return 0;
1013}
1014
ab0c7d72 1015static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT		 1016 .open = snd_vt1724_playback_spdif_open,
1017 .close = snd_vt1724_playback_spdif_close,
1018 .ioctl = snd_pcm_lib_ioctl,
1019 .hw_params = snd_vt1724_pcm_hw_params,
1020 .hw_free = snd_vt1724_pcm_hw_free,
1021 .prepare = snd_vt1724_playback_spdif_prepare,
1022 .trigger = snd_vt1724_pcm_trigger,
1023 .pointer = snd_vt1724_pcm_pointer,
1024};
1025
ab0c7d72 1026static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT		 1027 .open = snd_vt1724_capture_spdif_open,
1028 .close = snd_vt1724_capture_spdif_close,
1029 .ioctl = snd_pcm_lib_ioctl,
1030 .hw_params = snd_vt1724_pcm_hw_params,
1031 .hw_free = snd_vt1724_pcm_hw_free,
1032 .prepare = snd_vt1724_pcm_prepare,
1033 .trigger = snd_vt1724_pcm_trigger,
1034 .pointer = snd_vt1724_pcm_pointer,
1035};
1036
1037
ab0c7d72 1038static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
1da177e4
LT		 1039{
1040 char *name;
ab0c7d72 1041 struct snd_pcm *pcm;
1da177e4
LT		 1042 int play, capt;
1043 int err;
1044
1045 if (ice->force_pdma4 ||
1046 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1047 play = 1;
1048 ice->has_spdif = 1;
1049 } else
1050 play = 0;
1051 if (ice->force_rdma1 ||
1052 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1053 capt = 1;
1054 ice->has_spdif = 1;
1055 } else
1056 capt = 0;
1057 if (! play && ! capt)
1058 return 0; /* no spdif device */
1059
1060 if (ice->force_pdma4 || ice->force_rdma1)
1061 name = "ICE1724 Secondary";
1062 else
1063 name = "IEC1724 IEC958";
1064 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1065 if (err < 0)
1066 return err;
1067
1068 if (play)
1069 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1070 &snd_vt1724_playback_spdif_ops);
1071 if (capt)
1072 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1073 &snd_vt1724_capture_spdif_ops);
1074
1075 pcm->private_data = ice;
1076 pcm->info_flags = 0;
1077 strcpy(pcm->name, name);
1078
1079 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1080 snd_dma_pci_data(ice->pci),
1081 64*1024, 64*1024);
1da177e4
LT		 1082
1083 ice->pcm = pcm;
1084
1085 return 0;
1086}
1087
1088
1089/*
1090 * independent surround PCMs
1091 */
1092
1093static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1094 {
1095 .addr = VT1724_MT_PDMA1_ADDR,
1096 .size = VT1724_MT_PDMA1_SIZE,
1097 .count = VT1724_MT_PDMA1_COUNT,
1098 .start = VT1724_PDMA1_START,
1099 },
1100 {
1101 .addr = VT1724_MT_PDMA2_ADDR,
1102 .size = VT1724_MT_PDMA2_SIZE,
1103 .count = VT1724_MT_PDMA2_COUNT,
1104 .start = VT1724_PDMA2_START,
1105 },
1106 {
1107 .addr = VT1724_MT_PDMA3_ADDR,
1108 .size = VT1724_MT_PDMA3_SIZE,
1109 .count = VT1724_MT_PDMA3_COUNT,
1110 .start = VT1724_PDMA3_START,
1111 },
1112};
1113
ab0c7d72 1114static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1115{
ab0c7d72 1116 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1117 unsigned char val;
1118
1119 spin_lock_irq(&ice->reg_lock);
1120 val = 3 - substream->number;
1121 if (inb(ICEMT1724(ice, BURST)) < val)
1122 outb(val, ICEMT1724(ice, BURST));
1123 spin_unlock_irq(&ice->reg_lock);
1124 return snd_vt1724_pcm_prepare(substream);
1125}
1126
ab0c7d72 1127static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1128{
ab0c7d72
TI		 1129 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1130 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1131
62932df8 1132 mutex_lock(&ice->open_mutex);
1da177e4
LT		 1133 /* already used by PDMA0? */
1134 if (ice->pcm_reserved[substream->number]) {
62932df8 1135 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1136 return -EBUSY; /* FIXME: should handle blocking mode properly */
1137 }
62932df8 1138 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1139 runtime->private_data = &vt1724_playback_dma_regs[substream->number];
1140 ice->playback_con_substream_ds[substream->number] = substream;
1141 runtime->hw = snd_vt1724_2ch_stereo;
1142 snd_pcm_set_sync(substream);
1143 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1144 set_rate_constraints(ice, substream);
1145 return 0;
1146}
1147
ab0c7d72 1148static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1149{
ab0c7d72 1150 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1151
1152 if (PRO_RATE_RESET)
1153 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1154 ice->playback_con_substream_ds[substream->number] = NULL;
1155 ice->pcm_reserved[substream->number] = NULL;
1156
1157 return 0;
1158}
1159
ab0c7d72 1160static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT		 1161 .open = snd_vt1724_playback_indep_open,
1162 .close = snd_vt1724_playback_indep_close,
1163 .ioctl = snd_pcm_lib_ioctl,
1164 .hw_params = snd_vt1724_pcm_hw_params,
1165 .hw_free = snd_vt1724_pcm_hw_free,
1166 .prepare = snd_vt1724_playback_indep_prepare,
1167 .trigger = snd_vt1724_pcm_trigger,
1168 .pointer = snd_vt1724_pcm_pointer,
1169};
1170
1171
ab0c7d72 1172static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
1da177e4 1173{
ab0c7d72 1174 struct snd_pcm *pcm;
1da177e4
LT		 1175 int play;
1176 int err;
1177
1178 play = ice->num_total_dacs / 2 - 1;
1179 if (play <= 0)
1180 return 0;
1181
1182 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1183 if (err < 0)
1184 return err;
1185
1186 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1187 &snd_vt1724_playback_indep_ops);
1188
1189 pcm->private_data = ice;
1190 pcm->info_flags = 0;
1191 strcpy(pcm->name, "ICE1724 Surround PCM");
1192
1193 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1194 snd_dma_pci_data(ice->pci),
1195 64*1024, 64*1024);
1da177e4
LT		 1196
1197 ice->pcm_ds = pcm;
1198
1199 return 0;
1200}
1201
1202
1203/*
1204 * Mixer section
1205 */
1206
ab0c7d72 1207static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
1da177e4
LT		 1208{
1209 int err;
1210
1211 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI		 1212 struct snd_ac97_bus *pbus;
1213 struct snd_ac97_template ac97;
1214 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1215 .write = snd_vt1724_ac97_write,
1216 .read = snd_vt1724_ac97_read,
1217 };
1218
1219 /* cold reset */
1220 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1221 mdelay(5); /* FIXME */
1222 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1223
1224 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1225 return err;
1226 memset(&ac97, 0, sizeof(ac97));
1227 ac97.private_data = ice;
1228 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1229 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1230 else
1231 return 0;
1232 }
1233 /* I2S mixer only */
1234 strcat(ice->card->mixername, "ICE1724 - multitrack");
1235 return 0;
1236}
1237
1238/*
1239 *
1240 */
1241
ab0c7d72 1242static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1243{
1244 return (unsigned int)ice->eeprom.data[idx] | \
1245 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1246 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1247}
1248
ab0c7d72
TI		 1249static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1250 struct snd_info_buffer *buffer)
1da177e4 1251{
ab0c7d72 1252 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1253 unsigned int idx;
1254
1255 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1256 snd_iprintf(buffer, "EEPROM:\n");
1257
1258 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1259 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1260 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI		 1261 snd_iprintf(buffer, " System Config : 0x%x\n",
1262 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1263 snd_iprintf(buffer, " ACLink : 0x%x\n",
1264 ice->eeprom.data[ICE_EEP2_ACLINK]);
1265 snd_iprintf(buffer, " I2S : 0x%x\n",
1266 ice->eeprom.data[ICE_EEP2_I2S]);
1267 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1268 ice->eeprom.data[ICE_EEP2_SPDIF]);
1269 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1270 ice->eeprom.gpiodir);
1271 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1272 ice->eeprom.gpiomask);
1273 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1274 ice->eeprom.gpiostate);
1da177e4 1275 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI		 1276 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1277 idx, ice->eeprom.data[idx]);
1da177e4
LT		 1278
1279 snd_iprintf(buffer, "\nRegisters:\n");
1280
ab0c7d72
TI		 1281 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1282 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1283 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI		 1284 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1285 idx, inb(ice->port+idx));
1da177e4 1286 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI		 1287 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1288 idx, inb(ice->profi_port+idx));
1da177e4
LT		 1289}
1290
ab0c7d72 1291static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
1da177e4 1292{
ab0c7d72 1293 struct snd_info_entry *entry;
1da177e4
LT		 1294
1295 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1296 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT		 1297}
1298
1299/*
1300 *
1301 */
1302
ab0c7d72
TI		 1303static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1304 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1305{
1306 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1307 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1308 return 0;
1309}
1310
ab0c7d72
TI		 1311static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1da177e4 1313{
ab0c7d72 1314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1315
1316 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1317 return 0;
1318}
1319
ab0c7d72 1320static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT		 1321 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1322 .name = "ICE1724 EEPROM",
1323 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1324 .info = snd_vt1724_eeprom_info,
1325 .get = snd_vt1724_eeprom_get
1326};
1327
1328/*
1329 */
ab0c7d72
TI		 1330static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1331 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1332{
1333 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1334 uinfo->count = 1;
1335 return 0;
1336}
1337
ab0c7d72 1338static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1339{
2dfbeca9 1340 unsigned int val, rbits;
1da177e4
LT		 1341
1342 val = diga->status[0] & 0x03; /* professional, non-audio */
1343 if (val & 0x01) {
1344 /* professional */
ab0c7d72
TI		 1345 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1346 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1347 val |= 1U << 3;
2dfbeca9
TI		 1348 rbits = (diga->status[4] >> 3) & 0x0f;
1349 if (rbits) {
1350 switch (rbits) {
1351 case 2: val |= 5 << 12; break; /* 96k */
1352 case 3: val |= 6 << 12; break; /* 192k */
1353 case 10: val |= 4 << 12; break; /* 88.2k */
1354 case 11: val |= 7 << 12; break; /* 176.4k */
1355 }
1356 } else {
1357 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1358 case IEC958_AES0_PRO_FS_44100:
1359 break;
1360 case IEC958_AES0_PRO_FS_32000:
1361 val |= 3U << 12;
1362 break;
1363 default:
1364 val |= 2U << 12;
1365 break;
1366 }
1da177e4
LT		 1367 }
1368 } else {
1369 /* consumer */
1370 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI		 1371 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1372 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT		 1373 val |= 1U << 3;
1374 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1375 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1376 }
1377 return val;
1378}
1379
ab0c7d72 1380static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT		 1381{
1382 memset(diga->status, 0, sizeof(diga->status));
1383 diga->status[0] = val & 0x03; /* professional, non-audio */
1384 if (val & 0x01) {
1385 /* professional */
1386 if (val & (1U << 3))
1387 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1388 switch ((val >> 12) & 0x7) {
1389 case 0:
1390 break;
1391 case 2:
1392 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1393 break;
1394 default:
1395 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1396 break;
1397 }
1398 } else {
1399 /* consumer */
1400 diga->status[0] |= val & (1U << 2); /* copyright */
1401 if (val & (1U << 3))
1402 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1403 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1404 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1405 }
1406}
1407
ab0c7d72
TI		 1408static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1409 struct snd_ctl_elem_value *ucontrol)
1da177e4 1410{
ab0c7d72 1411 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1412 unsigned int val;
1413 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1414 decode_spdif_bits(&ucontrol->value.iec958, val);
1415 return 0;
1416}
1417
ab0c7d72
TI		 1418static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1419 struct snd_ctl_elem_value *ucontrol)
1da177e4 1420{
ab0c7d72 1421 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1422 unsigned int val, old;
1423
1424 val = encode_spdif_bits(&ucontrol->value.iec958);
1425 spin_lock_irq(&ice->reg_lock);
1426 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1427 if (val != old)
1428 update_spdif_bits(ice, val);
1429 spin_unlock_irq(&ice->reg_lock);
1430 return (val != old);
1431}
1432
ab0c7d72 1433static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT		 1434{
1435 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1436 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1437 .info = snd_vt1724_spdif_info,
1438 .get = snd_vt1724_spdif_default_get,
1439 .put = snd_vt1724_spdif_default_put
1440};
1441
ab0c7d72
TI		 1442static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1443 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1444{
1445 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1446 IEC958_AES0_PROFESSIONAL |
1447 IEC958_AES0_CON_NOT_COPYRIGHT |
1448 IEC958_AES0_CON_EMPHASIS;
1449 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1450 IEC958_AES1_CON_CATEGORY;
1451 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1452 return 0;
1453}
1454
ab0c7d72
TI		 1455static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1456 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1457{
1458 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1459 IEC958_AES0_PROFESSIONAL |
1460 IEC958_AES0_PRO_FS |
1461 IEC958_AES0_PRO_EMPHASIS;
1462 return 0;
1463}
1464
ab0c7d72 1465static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT		 1466{
1467 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1468 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1469 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1470 .info = snd_vt1724_spdif_info,
1471 .get = snd_vt1724_spdif_maskc_get,
1472};
1473
ab0c7d72 1474static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT		 1475{
1476 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1477 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1478 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1479 .info = snd_vt1724_spdif_info,
1480 .get = snd_vt1724_spdif_maskp_get,
1481};
1482
ab0c7d72
TI		 1483static int snd_vt1724_spdif_sw_info(struct snd_kcontrol *kcontrol,
1484 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1485{
1486 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1487 uinfo->count = 1;
1488 uinfo->value.integer.min = 0;
1489 uinfo->value.integer.max = 1;
1490 return 0;
1491}
1492
ab0c7d72
TI		 1493static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1494 struct snd_ctl_elem_value *ucontrol)
1da177e4 1495{
ab0c7d72
TI		 1496 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1497 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1498 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT		 1499 return 0;
1500}
1501
ab0c7d72
TI		 1502static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1503 struct snd_ctl_elem_value *ucontrol)
1da177e4 1504{
ab0c7d72 1505 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1506 unsigned char old, val;
1507
1508 spin_lock_irq(&ice->reg_lock);
1509 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1510 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1511 if (ucontrol->value.integer.value[0])
1512 val |= VT1724_CFG_SPDIF_OUT_EN;
1513 if (old != val)
1514 outb(val, ICEREG1724(ice, SPDIF_CFG));
1515 spin_unlock_irq(&ice->reg_lock);
1516 return old != val;
1517}
1518
ab0c7d72 1519static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT		 1520{
1521 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1522 /* FIXME: the following conflict with IEC958 Playback Route */
1523 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
10e8d78a 1524 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1525 .info = snd_vt1724_spdif_sw_info,
1526 .get = snd_vt1724_spdif_sw_get,
1527 .put = snd_vt1724_spdif_sw_put
1528};
1529
1530
1531#if 0 /* NOT USED YET */
1532/*
1533 * GPIO access from extern
1534 */
1535
ab0c7d72
TI		 1536int snd_vt1724_gpio_info(struct snd_kcontrol *kcontrol,
1537 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1538{
1539 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1540 uinfo->count = 1;
1541 uinfo->value.integer.min = 0;
1542 uinfo->value.integer.max = 1;
1543 return 0;
1544}
1545
ab0c7d72
TI		 1546int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1547 struct snd_ctl_elem_value *ucontrol)
1da177e4 1548{
ab0c7d72 1549 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1550 int shift = kcontrol->private_value & 0xff;
1551 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1552
1553 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI		 1554 ucontrol->value.integer.value[0] =
1555 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT		 1556 snd_ice1712_restore_gpio_status(ice);
1557 return 0;
1558}
1559
ab0c7d72
TI		 1560int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1561 struct snd_ctl_elem_value *ucontrol)
1da177e4 1562{
ab0c7d72 1563 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1564 int shift = kcontrol->private_value & 0xff;
1565 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1566 unsigned int val, nval;
1567
1568 if (kcontrol->private_value & (1 << 31))
1569 return -EPERM;
1570 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1571 snd_ice1712_save_gpio_status(ice);
1572 val = snd_ice1712_gpio_read(ice);
1573 nval |= val & ~(1 << shift);
1574 if (val != nval)
1575 snd_ice1712_gpio_write(ice, nval);
1576 snd_ice1712_restore_gpio_status(ice);
1577 return val != nval;
1578}
1579#endif /* NOT USED YET */
1580
1581/*
1582 * rate
1583 */
ab0c7d72
TI		 1584static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1585 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1586{
1587 static char *texts_1724[] = {
1588 "8000", /* 0: 6 */
1589 "9600", /* 1: 3 */
1590 "11025", /* 2: 10 */
1591 "12000", /* 3: 2 */
1592 "16000", /* 4: 5 */
1593 "22050", /* 5: 9 */
1594 "24000", /* 6: 1 */
1595 "32000", /* 7: 4 */
1596 "44100", /* 8: 8 */
1597 "48000", /* 9: 0 */
1598 "64000", /* 10: 15 */
1599 "88200", /* 11: 11 */
1600 "96000", /* 12: 7 */
1601 "176400", /* 13: 12 */
1602 "192000", /* 14: 14 */
1603 "IEC958 Input", /* 15: -- */
1604 };
1605 static char *texts_1720[] = {
1606 "8000", /* 0: 6 */
1607 "9600", /* 1: 3 */
1608 "11025", /* 2: 10 */
1609 "12000", /* 3: 2 */
1610 "16000", /* 4: 5 */
1611 "22050", /* 5: 9 */
1612 "24000", /* 6: 1 */
1613 "32000", /* 7: 4 */
1614 "44100", /* 8: 8 */
1615 "48000", /* 9: 0 */
1616 "64000", /* 10: 15 */
1617 "88200", /* 11: 11 */
1618 "96000", /* 12: 7 */
1619 "IEC958 Input", /* 13: -- */
1620 };
ab0c7d72 1621 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1622
1623 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1624 uinfo->count = 1;
1625 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
1626 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1627 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1628 strcpy(uinfo->value.enumerated.name,
1629 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
1630 texts_1724[uinfo->value.enumerated.item]);
1631 return 0;
1632}
1633
ab0c7d72
TI		 1634static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1635 struct snd_ctl_elem_value *ucontrol)
1da177e4 1636{
ab0c7d72 1637 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1638 static unsigned char xlate[16] = {
1639 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1640 };
1641 unsigned char val;
1642
1643 spin_lock_irq(&ice->reg_lock);
1644 if (is_spdif_master(ice)) {
1645 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
1646 } else {
1647 val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
1648 if (val == 255) {
1649 snd_BUG();
1650 val = 0;
1651 }
1652 ucontrol->value.enumerated.item[0] = val;
1653 }
1654 spin_unlock_irq(&ice->reg_lock);
1655 return 0;
1656}
1657
ab0c7d72
TI		 1658static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1da177e4 1660{
ab0c7d72 1661 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1662 unsigned char oval;
1663 int rate;
1664 int change = 0;
1665 int spdif = ice->vt1720 ? 13 : 15;
1666
1667 spin_lock_irq(&ice->reg_lock);
1668 oval = inb(ICEMT1724(ice, RATE));
1669 if (ucontrol->value.enumerated.item[0] == spdif) {
1670 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1671 } else {
1672 rate = rates[ucontrol->value.integer.value[0] % 15];
1673 if (rate <= get_max_rate(ice)) {
1674 PRO_RATE_DEFAULT = rate;
1675 spin_unlock_irq(&ice->reg_lock);
1676 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1677 spin_lock_irq(&ice->reg_lock);
1678 }
1679 }
1680 change = inb(ICEMT1724(ice, RATE)) != oval;
1681 spin_unlock_irq(&ice->reg_lock);
1682
ab0c7d72
TI		 1683 if ((oval & VT1724_SPDIF_MASTER) !=
1684 (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
1da177e4
LT		 1685 /* notify akm chips as well */
1686 if (is_spdif_master(ice)) {
1687 unsigned int i;
1688 for (i = 0; i < ice->akm_codecs; i++) {
1689 if (ice->akm[i].ops.set_rate_val)
1690 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1691 }
1692 }
1693 }
1694 return change;
1695}
1696
ab0c7d72 1697static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT		 1698 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1699 .name = "Multi Track Internal Clock",
1700 .info = snd_vt1724_pro_internal_clock_info,
1701 .get = snd_vt1724_pro_internal_clock_get,
1702 .put = snd_vt1724_pro_internal_clock_put
1703};
1704
ab0c7d72
TI		 1705static int snd_vt1724_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1706 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1707{
1708 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1709 uinfo->count = 1;
1710 uinfo->value.integer.min = 0;
1711 uinfo->value.integer.max = 1;
1712 return 0;
1713}
1714
ab0c7d72
TI		 1715static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1716 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1717{
1718 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1719 return 0;
1720}
1721
ab0c7d72
TI		 1722static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1da177e4 1724{
ab0c7d72 1725 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1726 int change = 0, nval;
1727
1728 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1729 spin_lock_irq(&ice->reg_lock);
1730 change = PRO_RATE_LOCKED != nval;
1731 PRO_RATE_LOCKED = nval;
1732 spin_unlock_irq(&ice->reg_lock);
1733 return change;
1734}
1735
ab0c7d72 1736static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT		 1737 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1738 .name = "Multi Track Rate Locking",
1739 .info = snd_vt1724_pro_rate_locking_info,
1740 .get = snd_vt1724_pro_rate_locking_get,
1741 .put = snd_vt1724_pro_rate_locking_put
1742};
1743
ab0c7d72
TI		 1744static int snd_vt1724_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
1745 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1746{
1747 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1748 uinfo->count = 1;
1749 uinfo->value.integer.min = 0;
1750 uinfo->value.integer.max = 1;
1751 return 0;
1752}
1753
ab0c7d72
TI		 1754static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1755 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1756{
1757 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1758 return 0;
1759}
1760
ab0c7d72
TI		 1761static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1762 struct snd_ctl_elem_value *ucontrol)
1da177e4 1763{
ab0c7d72 1764 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1765 int change = 0, nval;
1766
1767 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1768 spin_lock_irq(&ice->reg_lock);
1769 change = PRO_RATE_RESET != nval;
1770 PRO_RATE_RESET = nval;
1771 spin_unlock_irq(&ice->reg_lock);
1772 return change;
1773}
1774
ab0c7d72 1775static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT		 1776 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1777 .name = "Multi Track Rate Reset",
1778 .info = snd_vt1724_pro_rate_reset_info,
1779 .get = snd_vt1724_pro_rate_reset_get,
1780 .put = snd_vt1724_pro_rate_reset_put
1781};
1782
1783
1784/*
1785 * routing
1786 */
ab0c7d72
TI		 1787static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1788 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1789{
1790 static char *texts[] = {
1791 "PCM Out", /* 0 */
1792 "H/W In 0", "H/W In 1", /* 1-2 */
1793 "IEC958 In L", "IEC958 In R", /* 3-4 */
1794 };
1795
1796 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1797 uinfo->count = 1;
1798 uinfo->value.enumerated.items = 5;
1799 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1800 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1801 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1802 return 0;
1803}
1804
1805static inline int analog_route_shift(int idx)
1806{
1807 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1808}
1809
1810static inline int digital_route_shift(int idx)
1811{
1812 return idx * 3;
1813}
1814
ab0c7d72 1815static int get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT		 1816{
1817 unsigned long val;
1818 unsigned char eitem;
1819 static unsigned char xlate[8] = {
1820 0, 255, 1, 2, 255, 255, 3, 4,
1821 };
1822
1823 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1824 val >>= shift;
1825 val &= 7; //we now have 3 bits per output
1826 eitem = xlate[val];
1827 if (eitem == 255) {
1828 snd_BUG();
1829 return 0;
1830 }
1831 return eitem;
1832}
1833
ab0c7d72 1834static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
1da177e4
LT		 1835{
1836 unsigned int old_val, nval;
1837 int change;
1838 static unsigned char xroute[8] = {
1839 0, /* PCM */
1840 2, /* PSDIN0 Left */
1841 3, /* PSDIN0 Right */
1842 6, /* SPDIN Left */
1843 7, /* SPDIN Right */
1844 };
1845
1846 nval = xroute[val % 5];
1847 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1848 val &= ~(0x07 << shift);
1849 val |= nval << shift;
1850 change = val != old_val;
1851 if (change)
1852 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1853 return change;
1854}
1855
ab0c7d72
TI		 1856static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1da177e4 1858{
ab0c7d72 1859 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1860 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 1861 ucontrol->value.enumerated.item[0] =
1862 get_route_val(ice, analog_route_shift(idx));
1da177e4
LT		 1863 return 0;
1864}
1865
ab0c7d72
TI		 1866static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
1867 struct snd_ctl_elem_value *ucontrol)
1da177e4 1868{
ab0c7d72 1869 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1870 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1871 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1872 analog_route_shift(idx));
1873}
1874
ab0c7d72
TI		 1875static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
1876 struct snd_ctl_elem_value *ucontrol)
1da177e4 1877{
ab0c7d72 1878 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1879 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 1880 ucontrol->value.enumerated.item[0] =
1881 get_route_val(ice, digital_route_shift(idx));
1da177e4
LT		 1882 return 0;
1883}
1884
ab0c7d72
TI		 1885static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
1886 struct snd_ctl_elem_value *ucontrol)
1da177e4 1887{
ab0c7d72 1888 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1889 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1890 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1891 digital_route_shift(idx));
1892}
1893
ab0c7d72 1894static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
1da177e4
LT		 1895 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1896 .name = "H/W Playback Route",
1897 .info = snd_vt1724_pro_route_info,
1898 .get = snd_vt1724_pro_route_analog_get,
1899 .put = snd_vt1724_pro_route_analog_put,
1900};
1901
ab0c7d72 1902static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4
LT		 1903 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1904 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1905 .info = snd_vt1724_pro_route_info,
1906 .get = snd_vt1724_pro_route_spdif_get,
1907 .put = snd_vt1724_pro_route_spdif_put,
1908 .count = 2,
1909};
1910
1911
ab0c7d72
TI		 1912static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
1913 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1914{
1915 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1916 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1917 uinfo->value.integer.min = 0;
1918 uinfo->value.integer.max = 255;
1919 return 0;
1920}
1921
ab0c7d72
TI		 1922static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
1923 struct snd_ctl_elem_value *ucontrol)
1da177e4 1924{
ab0c7d72 1925 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1926 int idx;
1927
1928 spin_lock_irq(&ice->reg_lock);
1929 for (idx = 0; idx < 22; idx++) {
1930 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI		 1931 ucontrol->value.integer.value[idx] =
1932 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT		 1933 }
1934 spin_unlock_irq(&ice->reg_lock);
1935 return 0;
1936}
1937
ab0c7d72 1938static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
1da177e4
LT		 1939 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1940 .name = "Multi Track Peak",
1941 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1942 .info = snd_vt1724_pro_peak_info,
1943 .get = snd_vt1724_pro_peak_get
1944};
1945
1946/*
1947 *
1948 */
1949
1950static struct snd_ice1712_card_info no_matched __devinitdata;
1951
1952static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1953 snd_vt1724_revo_cards,
1954 snd_vt1724_amp_cards,
1955 snd_vt1724_aureon_cards,
1956 snd_vt1720_mobo_cards,
1957 snd_vt1720_pontis_cards,
1958 snd_vt1724_prodigy192_cards,
1959 snd_vt1724_juli_cards,
1960 snd_vt1724_phase_cards,
1961 NULL,
1962};
1963
1964
1965/*
1966 */
1967
ab0c7d72 1968static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT		 1969{
1970 int t = 0x10000;
1971 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1972 ;
1973 if (t == -1)
1974 printk(KERN_ERR "ice1724: i2c busy timeout\n");
1975}
1976
ab0c7d72
TI		 1977unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
1978 unsigned char dev, unsigned char addr)
1da177e4
LT		 1979{
1980 unsigned char val;
1981
62932df8 1982 mutex_lock(&ice->i2c_mutex);
1da177e4
LT		 1983 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1984 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1985 wait_i2c_busy(ice);
1986 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 1987 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT		 1988 //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
1989 return val;
1990}
1991
ab0c7d72
TI		 1992void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
1993 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 1994{
62932df8 1995 mutex_lock(&ice->i2c_mutex);
1da177e4
LT		 1996 wait_i2c_busy(ice);
1997 //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
1998 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1999 outb(data, ICEREG1724(ice, I2C_DATA));
2000 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2001 wait_i2c_busy(ice);
62932df8 2002 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT		 2003}
2004
ab0c7d72
TI		 2005static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2006 const char *modelname)
1da177e4
LT		 2007{
2008 const int dev = 0xa0; /* EEPROM device address */
2009 unsigned int i, size;
2010 struct snd_ice1712_card_info **tbl, *c;
2011
2012 if (! modelname || ! *modelname) {
2013 ice->eeprom.subvendor = 0;
2014 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2015 ice->eeprom.subvendor =
2016 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2017 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2018 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2019 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI		 2020 if (ice->eeprom.subvendor == 0 ||
2021 ice->eeprom.subvendor == (unsigned int)-1) {
2022 /* invalid subvendor from EEPROM, try the PCI
2023 * subststem ID instead
2024 */
1da177e4 2025 u16 vendor, device;
ab0c7d72
TI		 2026 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2027 &vendor);
1da177e4 2028 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI		 2029 ice->eeprom.subvendor =
2030 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2031 if (ice->eeprom.subvendor == 0 ||
2032 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2033 printk(KERN_ERR "ice1724: No valid ID is found\n");
2034 return -ENXIO;
2035 }
2036 }
2037 }
2038 for (tbl = card_tables; *tbl; tbl++) {
2039 for (c = *tbl; c->subvendor; c++) {
ab0c7d72
TI		 2040 if (modelname && c->model &&
2041 ! strcmp(modelname, c->model)) {
2042 printk(KERN_INFO "ice1724: Using board model %s\n",
2043 c->name);
1da177e4
LT		 2044 ice->eeprom.subvendor = c->subvendor;
2045 } else if (c->subvendor != ice->eeprom.subvendor)
2046 continue;
2047 if (! c->eeprom_size || ! c->eeprom_data)
2048 goto found;
2049 /* if the EEPROM is given by the driver, use it */
2050 snd_printdd("using the defined eeprom..\n");
2051 ice->eeprom.version = 2;
2052 ice->eeprom.size = c->eeprom_size + 6;
2053 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2054 goto read_skipped;
2055 }
2056 }
ab0c7d72
TI		 2057 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2058 ice->eeprom.subvendor);
1da177e4
LT		 2059
2060 found:
2061 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2062 if (ice->eeprom.size < 6)
2063 ice->eeprom.size = 32;
2064 else if (ice->eeprom.size > 32) {
ab0c7d72
TI		 2065 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2066 ice->eeprom.size);
1da177e4
LT		 2067 return -EIO;
2068 }
2069 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2070 if (ice->eeprom.version != 2)
ab0c7d72
TI		 2071 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2072 ice->eeprom.version);
1da177e4
LT		 2073 size = ice->eeprom.size - 6;
2074 for (i = 0; i < size; i++)
2075 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2076
2077 read_skipped:
2078 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2079 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2080 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2081
2082 return 0;
2083}
2084
2085
2086
ab0c7d72 2087static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
1da177e4
LT		 2088{
2089 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2090 udelay(200);
2091 outb(0, ICEREG1724(ice, CONTROL));
2092 udelay(200);
2093 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2094 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2095 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2096 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2097
2098 ice->gpio.write_mask = ice->eeprom.gpiomask;
2099 ice->gpio.direction = ice->eeprom.gpiodir;
2100 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2101 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2102 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2103
2104 outb(0, ICEREG1724(ice, POWERDOWN));
2105
2106 return 0;
2107}
2108
ab0c7d72 2109static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2110{
2111 int err;
ab0c7d72 2112 struct snd_kcontrol *kctl;
1da177e4
LT		 2113
2114 snd_assert(ice->pcm != NULL, return -EIO);
2115
2116 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2117 if (err < 0)
2118 return err;
2119
2120 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2121 if (err < 0)
2122 return err;
2123
2124 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2125 if (err < 0)
2126 return err;
2127 kctl->id.device = ice->pcm->device;
2128 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2129 if (err < 0)
2130 return err;
2131 kctl->id.device = ice->pcm->device;
2132 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2133 if (err < 0)
2134 return err;
2135 kctl->id.device = ice->pcm->device;
2136#if 0 /* use default only */
2137 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2138 if (err < 0)
2139 return err;
2140 kctl->id.device = ice->pcm->device;
2141 ice->spdif.stream_ctl = kctl;
2142#endif
2143 return 0;
2144}
2145
2146
ab0c7d72 2147static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2148{
2149 int err;
2150
2151 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2152 if (err < 0)
2153 return err;
2154 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2155 if (err < 0)
2156 return err;
2157
2158 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2159 if (err < 0)
2160 return err;
2161 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2162 if (err < 0)
2163 return err;
2164
2165 if (ice->num_total_dacs > 0) {
ab0c7d72 2166 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT		 2167 tmp.count = ice->num_total_dacs;
2168 if (ice->vt1720 && tmp.count > 2)
2169 tmp.count = 2;
2170 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2171 if (err < 0)
2172 return err;
2173 }
2174
2175 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2176 if (err < 0)
2177 return err;
2178
2179 return 0;
2180}
2181
ab0c7d72 2182static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4
LT		 2183{
2184 if (! ice->port)
2185 goto __hw_end;
2186 /* mask all interrupts */
2187 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2188 outb(0xff, ICEREG1724(ice, IRQMASK));
2189 /* --- */
2190 __hw_end:
2191 if (ice->irq >= 0) {
2192 synchronize_irq(ice->irq);
ab0c7d72 2193 free_irq(ice->irq, ice);
1da177e4
LT		 2194 }
2195 pci_release_regions(ice->pci);
2196 snd_ice1712_akm4xxx_free(ice);
2197 pci_disable_device(ice->pci);
2198 kfree(ice);
2199 return 0;
2200}
2201
ab0c7d72 2202static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2203{
ab0c7d72 2204 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2205 return snd_vt1724_free(ice);
2206}
2207
ab0c7d72 2208static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT		 2209 struct pci_dev *pci,
2210 const char *modelname,
ab0c7d72 2211 struct snd_ice1712 ** r_ice1712)
1da177e4 2212{
ab0c7d72 2213 struct snd_ice1712 *ice;
1da177e4
LT		 2214 int err;
2215 unsigned char mask;
ab0c7d72 2216 static struct snd_device_ops ops = {
1da177e4
LT		 2217 .dev_free = snd_vt1724_dev_free,
2218 };
2219
2220 *r_ice1712 = NULL;
2221
2222 /* enable PCI device */
2223 if ((err = pci_enable_device(pci)) < 0)
2224 return err;
2225
e560d8d8 2226 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2227 if (ice == NULL) {
2228 pci_disable_device(pci);
2229 return -ENOMEM;
2230 }
2231 ice->vt1724 = 1;
2232 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2233 mutex_init(&ice->gpio_mutex);
2234 mutex_init(&ice->open_mutex);
2235 mutex_init(&ice->i2c_mutex);
1da177e4
LT		 2236 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2237 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2238 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2239 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2240 ice->card = card;
2241 ice->pci = pci;
2242 ice->irq = -1;
2243 pci_set_master(pci);
2244 snd_vt1724_proc_init(ice);
2245 synchronize_irq(pci->irq);
2246
2247 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2248 kfree(ice);
2249 pci_disable_device(pci);
2250 return err;
2251 }
2252 ice->port = pci_resource_start(pci, 0);
2253 ice->profi_port = pci_resource_start(pci, 1);
2254
ab0c7d72 2255 if (request_irq(pci->irq, snd_vt1724_interrupt,
65ca68b3 2256 IRQF_DISABLED|IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2257 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2258 snd_vt1724_free(ice);
2259 return -EIO;
2260 }
2261
2262 ice->irq = pci->irq;
2263
2264 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2265 snd_vt1724_free(ice);
2266 return -EIO;
2267 }
2268 if (snd_vt1724_chip_init(ice) < 0) {
2269 snd_vt1724_free(ice);
2270 return -EIO;
2271 }
2272
2273 /* unmask used interrupts */
2274 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2275 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2276 else
2277 mask = 0;
2278 outb(mask, ICEREG1724(ice, IRQMASK));
ab0c7d72
TI		 2279 /* don't handle FIFO overrun/underruns (just yet),
2280 * since they cause machine lockups
2281 */
1da177e4
LT		 2282 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2283
2284 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2285 snd_vt1724_free(ice);
2286 return err;
2287 }
2288
2289 snd_card_set_dev(card, &pci->dev);
2290
2291 *r_ice1712 = ice;
2292 return 0;
2293}
2294
2295
2296/*
2297 *
2298 * Registration
2299 *
2300 */
2301
2302static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2303 const struct pci_device_id *pci_id)
2304{
2305 static int dev;
ab0c7d72
TI		 2306 struct snd_card *card;
2307 struct snd_ice1712 *ice;
1da177e4
LT		 2308 int pcm_dev = 0, err;
2309 struct snd_ice1712_card_info **tbl, *c;
2310
2311 if (dev >= SNDRV_CARDS)
2312 return -ENODEV;
2313 if (!enable[dev]) {
2314 dev++;
2315 return -ENOENT;
2316 }
2317
2318 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2319 if (card == NULL)
2320 return -ENOMEM;
2321
2322 strcpy(card->driver, "ICE1724");
2323 strcpy(card->shortname, "ICEnsemble ICE1724");
2324
2325 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2326 snd_card_free(card);
2327 return err;
2328 }
2329
2330 for (tbl = card_tables; *tbl; tbl++) {
2331 for (c = *tbl; c->subvendor; c++) {
2332 if (c->subvendor == ice->eeprom.subvendor) {
2333 strcpy(card->shortname, c->name);
2334 if (c->driver) /* specific driver? */
2335 strcpy(card->driver, c->driver);
2336 if (c->chip_init) {
2337 if ((err = c->chip_init(ice)) < 0) {
2338 snd_card_free(card);
2339 return err;
2340 }
2341 }
2342 goto __found;
2343 }
2344 }
2345 }
2346 c = &no_matched;
2347 __found:
2348
2349 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2350 snd_card_free(card);
2351 return err;
2352 }
2353
2354 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2355 snd_card_free(card);
2356 return err;
2357 }
2358
2359 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2360 snd_card_free(card);
2361 return err;
2362 }
2363
2364 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2365 snd_card_free(card);
2366 return err;
2367 }
2368
2369 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2370 snd_card_free(card);
2371 return err;
2372 }
2373
2374 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2375 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2376 snd_card_free(card);
2377 return err;
2378 }
2379 }
2380
2381 if (c->build_controls) {
2382 if ((err = c->build_controls(ice)) < 0) {
2383 snd_card_free(card);
2384 return err;
2385 }
2386 }
2387
2388 if (! c->no_mpu401) {
2389 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2390 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
302e4c2f
TI		 2391 ICEREG1724(ice, MPU_CTRL),
2392 MPU401_INFO_INTEGRATED,
1da177e4
LT		 2393 ice->irq, 0,
2394 &ice->rmidi[0])) < 0) {
2395 snd_card_free(card);
2396 return err;
2397 }
2398 }
2399 }
2400
2401 sprintf(card->longname, "%s at 0x%lx, irq %i",
2402 card->shortname, ice->port, ice->irq);
2403
2404 if ((err = snd_card_register(card)) < 0) {
2405 snd_card_free(card);
2406 return err;
2407 }
2408 pci_set_drvdata(pci, card);
2409 dev++;
2410 return 0;
2411}
2412
2413static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2414{
2415 snd_card_free(pci_get_drvdata(pci));
2416 pci_set_drvdata(pci, NULL);
2417}
2418
2419static struct pci_driver driver = {
2420 .name = "ICE1724",
2421 .id_table = snd_vt1724_ids,
2422 .probe = snd_vt1724_probe,
2423 .remove = __devexit_p(snd_vt1724_remove),
2424};
2425
2426static int __init alsa_card_ice1724_init(void)
2427{
01d25d46 2428 return pci_register_driver(&driver);
1da177e4
LT		 2429}
2430
2431static void __exit alsa_card_ice1724_exit(void)
2432{
2433 pci_unregister_driver(&driver);
2434}
2435
2436module_init(alsa_card_ice1724_init)
2437module_exit(alsa_card_ice1724_exit)
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