[linux.git] / drivers / kvm / kvm.h

#ifndef __KVM_H
#define __KVM_H

/*
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 */

#include <linux/types.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <asm/signal.h>

#include "vmx.h"
#include <linux/kvm.h>
#include <linux/kvm_para.h>

#define CR0_PE_MASK (1ULL << 0)
#define CR0_MP_MASK (1ULL << 1)
#define CR0_TS_MASK (1ULL << 3)
#define CR0_NE_MASK (1ULL << 5)
#define CR0_WP_MASK (1ULL << 16)
#define CR0_NW_MASK (1ULL << 29)
#define CR0_CD_MASK (1ULL << 30)
#define CR0_PG_MASK (1ULL << 31)

#define CR3_WPT_MASK (1ULL << 3)
#define CR3_PCD_MASK (1ULL << 4)

#define CR3_RESEVED_BITS 0x07ULL
#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
#define CR3_FLAGS_MASK ((1ULL << 5) - 1)

#define CR4_VME_MASK (1ULL << 0)
#define CR4_PSE_MASK (1ULL << 4)
#define CR4_PAE_MASK (1ULL << 5)
#define CR4_PGE_MASK (1ULL << 7)
#define CR4_VMXE_MASK (1ULL << 13)

#define KVM_GUEST_CR0_MASK \
	(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
	 | CR0_NW_MASK | CR0_CD_MASK)
#define KVM_VM_CR0_ALWAYS_ON \
	(CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK | CR0_TS_MASK \
	 | CR0_MP_MASK)
#define KVM_GUEST_CR4_MASK \
	(CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)

#define INVALID_PAGE (~(hpa_t)0)
#define UNMAPPED_GVA (~(gpa_t)0)

#define KVM_MAX_VCPUS 1
#define KVM_ALIAS_SLOTS 4
#define KVM_MEMORY_SLOTS 4
#define KVM_NUM_MMU_PAGES 1024
#define KVM_MIN_FREE_MMU_PAGES 5
#define KVM_REFILL_PAGES 25
#define KVM_MAX_CPUID_ENTRIES 40

#define FX_IMAGE_SIZE 512
#define FX_IMAGE_ALIGN 16
#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)

#define DE_VECTOR 0
#define NM_VECTOR 7
#define DF_VECTOR 8
#define TS_VECTOR 10
#define NP_VECTOR 11
#define SS_VECTOR 12
#define GP_VECTOR 13
#define PF_VECTOR 14

#define SELECTOR_TI_MASK (1 << 2)
#define SELECTOR_RPL_MASK 0x03

#define IOPL_SHIFT 12

#define KVM_PIO_PAGE_OFFSET 1

/*
 * Address types:
 *
 *  gva - guest virtual address
 *  gpa - guest physical address
 *  gfn - guest frame number
 *  hva - host virtual address
 *  hpa - host physical address
 *  hfn - host frame number
 */

typedef unsigned long  gva_t;
typedef u64            gpa_t;
typedef unsigned long  gfn_t;

typedef unsigned long  hva_t;
typedef u64            hpa_t;
typedef unsigned long  hfn_t;

#define NR_PTE_CHAIN_ENTRIES 5

struct kvm_pte_chain {
	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	struct hlist_node link;
};

/*
 * kvm_mmu_page_role, below, is defined as:
 *
 *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 *   bits 4:7 - page table level for this shadow (1-4)
 *   bits 8:9 - page table quadrant for 2-level guests
 *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
 *   bits 17:18 - "access" - the user and writable bits of a huge page pde
 */
union kvm_mmu_page_role {
	unsigned word;
	struct {
		unsigned glevels : 4;
		unsigned level : 4;
		unsigned quadrant : 2;
		unsigned pad_for_nice_hex_output : 6;
		unsigned metaphysical : 1;
		unsigned hugepage_access : 2;
	};
};

struct kvm_mmu_page {
	struct list_head link;
	struct hlist_node hash_link;

	/*
	 * The following two entries are used to key the shadow page in the
	 * hash table.
	 */
	gfn_t gfn;
	union kvm_mmu_page_role role;

	u64 *spt;
	unsigned long slot_bitmap; /* One bit set per slot which has memory
				    * in this shadow page.
				    */
	int multimapped;         /* More than one parent_pte? */
	int root_count;          /* Currently serving as active root */
	union {
		u64 *parent_pte;               /* !multimapped */
		struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	};
};

struct vmcs {
	u32 revision_id;
	u32 abort;
	char data[0];
};

#define vmx_msr_entry kvm_msr_entry

struct kvm_vcpu;

/*
 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 * mode.
 */
struct kvm_mmu {
	void (*new_cr3)(struct kvm_vcpu *vcpu);
	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
	void (*free)(struct kvm_vcpu *vcpu);
	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
	hpa_t root_hpa;
	int root_level;
	int shadow_root_level;

	u64 *pae_root;
};

#define KVM_NR_MEM_OBJS 20

struct kvm_mmu_memory_cache {
	int nobjs;
	void *objects[KVM_NR_MEM_OBJS];
};

/*
 * We don't want allocation failures within the mmu code, so we preallocate
 * enough memory for a single page fault in a cache.
 */
struct kvm_guest_debug {
	int enabled;
	unsigned long bp[4];
	int singlestep;
};

enum {
	VCPU_REGS_RAX = 0,
	VCPU_REGS_RCX = 1,
	VCPU_REGS_RDX = 2,
	VCPU_REGS_RBX = 3,
	VCPU_REGS_RSP = 4,
	VCPU_REGS_RBP = 5,
	VCPU_REGS_RSI = 6,
	VCPU_REGS_RDI = 7,
#ifdef CONFIG_X86_64
	VCPU_REGS_R8 = 8,
	VCPU_REGS_R9 = 9,
	VCPU_REGS_R10 = 10,
	VCPU_REGS_R11 = 11,
	VCPU_REGS_R12 = 12,
	VCPU_REGS_R13 = 13,
	VCPU_REGS_R14 = 14,
	VCPU_REGS_R15 = 15,
#endif
	NR_VCPU_REGS
};

enum {
	VCPU_SREG_CS,
	VCPU_SREG_DS,
	VCPU_SREG_ES,
	VCPU_SREG_FS,
	VCPU_SREG_GS,
	VCPU_SREG_SS,
	VCPU_SREG_TR,
	VCPU_SREG_LDTR,
};

struct kvm_pio_request {
	unsigned long count;
	int cur_count;
	struct page *guest_pages[2];
	unsigned guest_page_offset;
	int in;
	int size;
	int string;
	int down;
	int rep;
};

struct kvm_stat {
	u32 pf_fixed;
	u32 pf_guest;
	u32 tlb_flush;
	u32 invlpg;

	u32 exits;
	u32 io_exits;
	u32 mmio_exits;
	u32 signal_exits;
	u32 irq_window_exits;
	u32 halt_exits;
	u32 request_irq_exits;
	u32 irq_exits;
	u32 light_exits;
};

struct kvm_vcpu {
	struct kvm *kvm;
	union {
		struct vmcs *vmcs;
		struct vcpu_svm *svm;
	};
	struct mutex mutex;
	int   cpu;
	int   launched;
	u64 host_tsc;
	struct kvm_run *run;
	int interrupt_window_open;
	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
	unsigned long irq_pending[NR_IRQ_WORDS];
	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	unsigned long rip;      /* needs vcpu_load_rsp_rip() */

	unsigned long cr0;
	unsigned long cr2;
	unsigned long cr3;
	gpa_t para_state_gpa;
	struct page *para_state_page;
	gpa_t hypercall_gpa;
	unsigned long cr4;
	unsigned long cr8;
	u64 pdptrs[4]; /* pae */
	u64 shadow_efer;
	u64 apic_base;
	u64 ia32_misc_enable_msr;
	int nmsrs;
	int save_nmsrs;
#ifdef CONFIG_X86_64
	int msr_offset_kernel_gs_base;
#endif
	struct vmx_msr_entry *guest_msrs;
	struct vmx_msr_entry *host_msrs;

	struct list_head free_pages;
	struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
	struct kvm_mmu mmu;

	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;

	gfn_t last_pt_write_gfn;
	int   last_pt_write_count;

	struct kvm_guest_debug guest_debug;

	char fx_buf[FX_BUF_SIZE];
	char *host_fx_image;
	char *guest_fx_image;
	int fpu_active;
	int guest_fpu_loaded;
	struct vmx_host_state {
		int loaded;
		u16 fs_sel, gs_sel, ldt_sel;
		int fs_gs_ldt_reload_needed;
	} vmx_host_state;

	int mmio_needed;
	int mmio_read_completed;
	int mmio_is_write;
	int mmio_size;
	unsigned char mmio_data[8];
	gpa_t mmio_phys_addr;
	gva_t mmio_fault_cr2;
	struct kvm_pio_request pio;
	void *pio_data;

	int sigset_active;
	sigset_t sigset;

	struct kvm_stat stat;

	struct {
		int active;
		u8 save_iopl;
		struct kvm_save_segment {
			u16 selector;
			unsigned long base;
			u32 limit;
			u32 ar;
		} tr, es, ds, fs, gs;
	} rmode;

	int cpuid_nent;
	struct kvm_cpuid_entry cpuid_entries[KVM_MAX_CPUID_ENTRIES];
};

struct kvm_mem_alias {
	gfn_t base_gfn;
	unsigned long npages;
	gfn_t target_gfn;
};

struct kvm_memory_slot {
	gfn_t base_gfn;
	unsigned long npages;
	unsigned long flags;
	struct page **phys_mem;
	unsigned long *dirty_bitmap;
};

struct kvm {
	spinlock_t lock; /* protects everything except vcpus */
	int naliases;
	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
	int nmemslots;
	struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
	/*
	 * Hash table of struct kvm_mmu_page.
	 */
	struct list_head active_mmu_pages;
	int n_free_mmu_pages;
	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
	int memory_config_version;
	int busy;
	unsigned long rmap_overflow;
	struct list_head vm_list;
	struct file *filp;
};

struct descriptor_table {
	u16 limit;
	unsigned long base;
} __attribute__((packed));

struct kvm_arch_ops {
	int (*cpu_has_kvm_support)(void);          /* __init */
	int (*disabled_by_bios)(void);             /* __init */
	void (*hardware_enable)(void *dummy);      /* __init */
	void (*hardware_disable)(void *dummy);
	int (*hardware_setup)(void);               /* __init */
	void (*hardware_unsetup)(void);            /* __exit */

	int (*vcpu_create)(struct kvm_vcpu *vcpu);
	void (*vcpu_free)(struct kvm_vcpu *vcpu);

	void (*vcpu_load)(struct kvm_vcpu *vcpu);
	void (*vcpu_put)(struct kvm_vcpu *vcpu);
	void (*vcpu_decache)(struct kvm_vcpu *vcpu);

	int (*set_guest_debug)(struct kvm_vcpu *vcpu,
			       struct kvm_debug_guest *dbg);
	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
	int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
	void (*get_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*set_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
	void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
	void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
	void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
		       int *exception);
	void (*cache_regs)(struct kvm_vcpu *vcpu);
	void (*decache_regs)(struct kvm_vcpu *vcpu);
	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);

	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
	void (*tlb_flush)(struct kvm_vcpu *vcpu);
	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
				  unsigned long addr, u32 err_code);

	void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);

	int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
	int (*vcpu_setup)(struct kvm_vcpu *vcpu);
	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
				unsigned char *hypercall_addr);
};

extern struct kvm_arch_ops *kvm_arch_ops;

#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)

int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
void kvm_exit_arch(void);

int kvm_mmu_module_init(void);
void kvm_mmu_module_exit(void);

void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
int kvm_mmu_create(struct kvm_vcpu *vcpu);
int kvm_mmu_setup(struct kvm_vcpu *vcpu);

int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
void kvm_mmu_zap_all(struct kvm_vcpu *vcpu);

hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva);

void kvm_emulator_want_group7_invlpg(void);

extern hpa_t bad_page_address;

struct page *gfn_to_page(struct kvm *kvm, gfn_t gfn);
struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
void mark_page_dirty(struct kvm *kvm, gfn_t gfn);

enum emulation_result {
	EMULATE_DONE,       /* no further processing */
	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
	EMULATE_FAIL,         /* can't emulate this instruction */
};

int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
			unsigned long cr2, u16 error_code);
void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
		   unsigned long *rflags);

unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
		     unsigned long *rflags);

struct x86_emulate_ctxt;

int kvm_setup_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
		  int size, unsigned long count, int string, int down,
		  gva_t address, int rep, unsigned port);
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
int emulate_clts(struct kvm_vcpu *vcpu);
int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
		    unsigned long *dest);
int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long value);

void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);

int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);

void fx_init(struct kvm_vcpu *vcpu);

void load_msrs(struct vmx_msr_entry *e, int n);
void save_msrs(struct vmx_msr_entry *e, int n);
void kvm_resched(struct kvm_vcpu *vcpu);
void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);

int kvm_read_guest(struct kvm_vcpu *vcpu,
	       gva_t addr,
	       unsigned long size,
	       void *dest);

int kvm_write_guest(struct kvm_vcpu *vcpu,
		gva_t addr,
		unsigned long size,
		void *data);

unsigned long segment_base(u16 selector);

void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
		       const u8 *old, const u8 *new, int bytes);
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);

int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run);

static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
				     u32 error_code)
{
	if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
		kvm_mmu_free_some_pages(vcpu);
	return vcpu->mmu.page_fault(vcpu, gva, error_code);
}

static inline int is_long_mode(struct kvm_vcpu *vcpu)
{
#ifdef CONFIG_X86_64
	return vcpu->shadow_efer & EFER_LME;
#else
	return 0;
#endif
}

static inline int is_pae(struct kvm_vcpu *vcpu)
{
	return vcpu->cr4 & CR4_PAE_MASK;
}

static inline int is_pse(struct kvm_vcpu *vcpu)
{
	return vcpu->cr4 & CR4_PSE_MASK;
}

static inline int is_paging(struct kvm_vcpu *vcpu)
{
	return vcpu->cr0 & CR0_PG_MASK;
}

static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
{
	return slot - kvm->memslots;
}

static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
{
	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);

	return (struct kvm_mmu_page *)page_private(page);
}

static inline u16 read_fs(void)
{
	u16 seg;
	asm ("mov %%fs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_gs(void)
{
	u16 seg;
	asm ("mov %%gs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_ldt(void)
{
	u16 ldt;
	asm ("sldt %0" : "=g"(ldt));
	return ldt;
}

static inline void load_fs(u16 sel)
{
	asm ("mov %0, %%fs" : : "rm"(sel));
}

static inline void load_gs(u16 sel)
{
	asm ("mov %0, %%gs" : : "rm"(sel));
}

#ifndef load_ldt
static inline void load_ldt(u16 sel)
{
	asm ("lldt %0" : : "rm"(sel));
}
#endif

static inline void get_idt(struct descriptor_table *table)
{
	asm ("sidt %0" : "=m"(*table));
}

static inline void get_gdt(struct descriptor_table *table)
{
	asm ("sgdt %0" : "=m"(*table));
}

static inline unsigned long read_tr_base(void)
{
	u16 tr;
	asm ("str %0" : "=g"(tr));
	return segment_base(tr);
}

#ifdef CONFIG_X86_64
static inline unsigned long read_msr(unsigned long msr)
{
	u64 value;

	rdmsrl(msr, value);
	return value;
}
#endif

static inline void fx_save(void *image)
{
	asm ("fxsave (%0)":: "r" (image));
}

static inline void fx_restore(void *image)
{
	asm ("fxrstor (%0)":: "r" (image));
}

static inline void fpu_init(void)
{
	asm ("finit");
}

static inline u32 get_rdx_init_val(void)
{
	return 0x600; /* P6 family */
}

#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"

#define MSR_IA32_TIME_STAMP_COUNTER		0x010

#define TSS_IOPB_BASE_OFFSET 0x66
#define TSS_BASE_SIZE 0x68
#define TSS_IOPB_SIZE (65536 / 8)
#define TSS_REDIRECTION_SIZE (256 / 8)
#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)

#endif
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6aa8b732 AK	1	#ifndef __KVM_H
	2	#define __KVM_H
	3
	4	/*
	5	* This work is licensed under the terms of the GNU GPL, version 2. See
	6	* the COPYING file in the top-level directory.
	7	*/
	8
	9	#include <linux/types.h>
	10	#include <linux/list.h>
	11	#include <linux/mutex.h>
	12	#include <linux/spinlock.h>
	13	#include <linux/mm.h>
e8edc6e0	14	#include <asm/signal.h>
6aa8b732 AK	15
	16	#include "vmx.h"
	17	#include <linux/kvm.h>
102d8325	18	#include <linux/kvm_para.h>
6aa8b732 AK	19
6aa8b732 AK	20	#define CR0_PE_MASK (1ULL << 0)
a3a06367	21	#define CR0_MP_MASK (1ULL << 1)
6aa8b732 AK	22	#define CR0_TS_MASK (1ULL << 3)
	23	#define CR0_NE_MASK (1ULL << 5)
	24	#define CR0_WP_MASK (1ULL << 16)
	25	#define CR0_NW_MASK (1ULL << 29)
	26	#define CR0_CD_MASK (1ULL << 30)
	27	#define CR0_PG_MASK (1ULL << 31)
	28
	29	#define CR3_WPT_MASK (1ULL << 3)
	30	#define CR3_PCD_MASK (1ULL << 4)
	31
	32	#define CR3_RESEVED_BITS 0x07ULL
	33	#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) \| 0x0fe7ULL)
	34	#define CR3_FLAGS_MASK ((1ULL << 5) - 1)
	35
	36	#define CR4_VME_MASK (1ULL << 0)
	37	#define CR4_PSE_MASK (1ULL << 4)
	38	#define CR4_PAE_MASK (1ULL << 5)
	39	#define CR4_PGE_MASK (1ULL << 7)
	40	#define CR4_VMXE_MASK (1ULL << 13)
	41
	42	#define KVM_GUEST_CR0_MASK \
	43	(CR0_PG_MASK \| CR0_PE_MASK \| CR0_WP_MASK \| CR0_NE_MASK \
	44	\| CR0_NW_MASK \| CR0_CD_MASK)
	45	#define KVM_VM_CR0_ALWAYS_ON \
a3a06367 AK	46	(CR0_PG_MASK \| CR0_PE_MASK \| CR0_WP_MASK \| CR0_NE_MASK \| CR0_TS_MASK \
a3a06367 AK	47	\| CR0_MP_MASK)
6aa8b732 AK	48	#define KVM_GUEST_CR4_MASK \
	49	(CR4_PSE_MASK \| CR4_PAE_MASK \| CR4_PGE_MASK \| CR4_VMXE_MASK \| CR4_VME_MASK)
	50	#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK \| CR4_PAE_MASK)
	51	#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK \| CR4_PAE_MASK \| CR4_VME_MASK)
	52
	53	#define INVALID_PAGE (~(hpa_t)0)
	54	#define UNMAPPED_GVA (~(gpa_t)0)
	55
	56	#define KVM_MAX_VCPUS 1
e8207547	57	#define KVM_ALIAS_SLOTS 4
6aa8b732	58	#define KVM_MEMORY_SLOTS 4
7494c0cc	59	#define KVM_NUM_MMU_PAGES 1024
ebeace86 AK	60	#define KVM_MIN_FREE_MMU_PAGES 5
ebeace86 AK	61	#define KVM_REFILL_PAGES 25
06465c5a	62	#define KVM_MAX_CPUID_ENTRIES 40
6aa8b732 AK	63
	64	#define FX_IMAGE_SIZE 512
	65	#define FX_IMAGE_ALIGN 16
	66	#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
	67
	68	#define DE_VECTOR 0
7807fa6c	69	#define NM_VECTOR 7
6aa8b732 AK	70	#define DF_VECTOR 8
	71	#define TS_VECTOR 10
	72	#define NP_VECTOR 11
	73	#define SS_VECTOR 12
	74	#define GP_VECTOR 13
	75	#define PF_VECTOR 14
	76
	77	#define SELECTOR_TI_MASK (1 << 2)
	78	#define SELECTOR_RPL_MASK 0x03
	79
	80	#define IOPL_SHIFT 12
	81
039576c0 AK	82	#define KVM_PIO_PAGE_OFFSET 1
039576c0 AK	83
6aa8b732 AK	84	/*
	85	* Address types:
	86	*
	87	* gva - guest virtual address
	88	* gpa - guest physical address
	89	* gfn - guest frame number
	90	* hva - host virtual address
	91	* hpa - host physical address
	92	* hfn - host frame number
	93	*/
	94
	95	typedef unsigned long gva_t;
	96	typedef u64 gpa_t;
	97	typedef unsigned long gfn_t;
	98
	99	typedef unsigned long hva_t;
	100	typedef u64 hpa_t;
	101	typedef unsigned long hfn_t;
	102
cea0f0e7 AK	103	#define NR_PTE_CHAIN_ENTRIES 5
	104
	105	struct kvm_pte_chain {
	106	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	107	struct hlist_node link;
	108	};
	109
	110	/*
	111	* kvm_mmu_page_role, below, is defined as:
	112	*
	113	* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
	114	* bits 4:7 - page table level for this shadow (1-4)
	115	* bits 8:9 - page table quadrant for 2-level guests
	116	* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
d28c6cfb	117	* bits 17:18 - "access" - the user and writable bits of a huge page pde
cea0f0e7 AK	118	*/
	119	union kvm_mmu_page_role {
	120	unsigned word;
	121	struct {
	122	unsigned glevels : 4;
	123	unsigned level : 4;
	124	unsigned quadrant : 2;
	125	unsigned pad_for_nice_hex_output : 6;
	126	unsigned metaphysical : 1;
d28c6cfb	127	unsigned hugepage_access : 2;
cea0f0e7 AK	128	};
	129	};
	130
6aa8b732 AK	131	struct kvm_mmu_page {
6aa8b732 AK	132	struct list_head link;
cea0f0e7 AK	133	struct hlist_node hash_link;
	134
	135	/*
	136	* The following two entries are used to key the shadow page in the
	137	* hash table.
	138	*/
	139	gfn_t gfn;
	140	union kvm_mmu_page_role role;
	141
47ad8e68	142	u64 *spt;
6aa8b732 AK	143	unsigned long slot_bitmap; /* One bit set per slot which has memory
	144	* in this shadow page.
	145	*/
cea0f0e7	146	int multimapped; /* More than one parent_pte? */
3bb65a22	147	int root_count; /* Currently serving as active root */
cea0f0e7 AK	148	union {
	149	u64 parent_pte; / !multimapped */
	150	struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	151	};
6aa8b732 AK	152	};
	153
	154	struct vmcs {
	155	u32 revision_id;
	156	u32 abort;
	157	char data[0];
	158	};
	159
	160	#define vmx_msr_entry kvm_msr_entry
	161
	162	struct kvm_vcpu;
	163
	164	/*
	165	* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
	166	* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
	167	* mode.
	168	*/
	169	struct kvm_mmu {
	170	void (new_cr3)(struct kvm_vcpu vcpu);
	171	int (page_fault)(struct kvm_vcpu vcpu, gva_t gva, u32 err);
6aa8b732 AK	172	void (free)(struct kvm_vcpu vcpu);
	173	gpa_t (gva_to_gpa)(struct kvm_vcpu vcpu, gva_t gva);
	174	hpa_t root_hpa;
	175	int root_level;
	176	int shadow_root_level;
17ac10ad AK	177
17ac10ad AK	178	u64 *pae_root;
6aa8b732 AK	179	};
6aa8b732 AK	180
714b93da AK	181	#define KVM_NR_MEM_OBJS 20
	182
	183	struct kvm_mmu_memory_cache {
	184	int nobjs;
	185	void *objects[KVM_NR_MEM_OBJS];
	186	};
	187
	188	/*
	189	* We don't want allocation failures within the mmu code, so we preallocate
	190	* enough memory for a single page fault in a cache.
	191	*/
6aa8b732 AK	192	struct kvm_guest_debug {
	193	int enabled;
	194	unsigned long bp[4];
	195	int singlestep;
	196	};
	197
	198	enum {
	199	VCPU_REGS_RAX = 0,
	200	VCPU_REGS_RCX = 1,
	201	VCPU_REGS_RDX = 2,
	202	VCPU_REGS_RBX = 3,
	203	VCPU_REGS_RSP = 4,
	204	VCPU_REGS_RBP = 5,
	205	VCPU_REGS_RSI = 6,
	206	VCPU_REGS_RDI = 7,
05b3e0c2	207	#ifdef CONFIG_X86_64
6aa8b732 AK	208	VCPU_REGS_R8 = 8,
	209	VCPU_REGS_R9 = 9,
	210	VCPU_REGS_R10 = 10,
	211	VCPU_REGS_R11 = 11,
	212	VCPU_REGS_R12 = 12,
	213	VCPU_REGS_R13 = 13,
	214	VCPU_REGS_R14 = 14,
	215	VCPU_REGS_R15 = 15,
	216	#endif
	217	NR_VCPU_REGS
	218	};
	219
	220	enum {
	221	VCPU_SREG_CS,
	222	VCPU_SREG_DS,
	223	VCPU_SREG_ES,
	224	VCPU_SREG_FS,
	225	VCPU_SREG_GS,
	226	VCPU_SREG_SS,
	227	VCPU_SREG_TR,
	228	VCPU_SREG_LDTR,
	229	};
	230
039576c0 AK	231	struct kvm_pio_request {
	232	unsigned long count;
	233	int cur_count;
	234	struct page *guest_pages[2];
	235	unsigned guest_page_offset;
	236	int in;
	237	int size;
	238	int string;
	239	int down;
	240	int rep;
	241	};
	242
1165f5fe AK	243	struct kvm_stat {
	244	u32 pf_fixed;
	245	u32 pf_guest;
	246	u32 tlb_flush;
	247	u32 invlpg;
	248
	249	u32 exits;
	250	u32 io_exits;
	251	u32 mmio_exits;
	252	u32 signal_exits;
	253	u32 irq_window_exits;
	254	u32 halt_exits;
	255	u32 request_irq_exits;
	256	u32 irq_exits;
e6adf283	257	u32 light_exits;
1165f5fe AK	258	};
1165f5fe AK	259
6aa8b732 AK	260	struct kvm_vcpu {
	261	struct kvm *kvm;
	262	union {
	263	struct vmcs *vmcs;
	264	struct vcpu_svm *svm;
	265	};
	266	struct mutex mutex;
	267	int cpu;
	268	int launched;
0cc5064d	269	u64 host_tsc;
9a2bb7f4	270	struct kvm_run *run;
c1150d8c	271	int interrupt_window_open;
6aa8b732 AK	272	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	273	#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
	274	unsigned long irq_pending[NR_IRQ_WORDS];
	275	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	276	unsigned long rip; /* needs vcpu_load_rsp_rip() */
	277
	278	unsigned long cr0;
	279	unsigned long cr2;
	280	unsigned long cr3;
102d8325 IM	281	gpa_t para_state_gpa;
	282	struct page *para_state_page;
	283	gpa_t hypercall_gpa;
6aa8b732 AK	284	unsigned long cr4;
6aa8b732 AK	285	unsigned long cr8;
1342d353	286	u64 pdptrs[4]; /* pae */
6aa8b732 AK	287	u64 shadow_efer;
6aa8b732 AK	288	u64 apic_base;
6f00e68f	289	u64 ia32_misc_enable_msr;
6aa8b732	290	int nmsrs;
a75beee6 ED	291	int save_nmsrs;
	292	#ifdef CONFIG_X86_64
	293	int msr_offset_kernel_gs_base;
	294	#endif
6aa8b732 AK	295	struct vmx_msr_entry *guest_msrs;
	296	struct vmx_msr_entry *host_msrs;
	297
	298	struct list_head free_pages;
	299	struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
	300	struct kvm_mmu mmu;
	301
714b93da AK	302	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	303	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	304
86a5ba02 AK	305	gfn_t last_pt_write_gfn;
	306	int last_pt_write_count;
	307
6aa8b732 AK	308	struct kvm_guest_debug guest_debug;
	309
	310	char fx_buf[FX_BUF_SIZE];
	311	char *host_fx_image;
	312	char *guest_fx_image;
7807fa6c	313	int fpu_active;
7702fd1f	314	int guest_fpu_loaded;
33ed6329 AK	315	struct vmx_host_state {
	316	int loaded;
	317	u16 fs_sel, gs_sel, ldt_sel;
	318	int fs_gs_ldt_reload_needed;
	319	} vmx_host_state;
6aa8b732 AK	320
	321	int mmio_needed;
	322	int mmio_read_completed;
	323	int mmio_is_write;
	324	int mmio_size;
	325	unsigned char mmio_data[8];
	326	gpa_t mmio_phys_addr;
e7df56e4	327	gva_t mmio_fault_cr2;
039576c0 AK	328	struct kvm_pio_request pio;
039576c0 AK	329	void *pio_data;
6aa8b732	330
1961d276 AK	331	int sigset_active;
	332	sigset_t sigset;
	333
1165f5fe AK	334	struct kvm_stat stat;
1165f5fe AK	335
6aa8b732 AK	336	struct {
	337	int active;
	338	u8 save_iopl;
	339	struct kvm_save_segment {
	340	u16 selector;
	341	unsigned long base;
	342	u32 limit;
	343	u32 ar;
	344	} tr, es, ds, fs, gs;
	345	} rmode;
06465c5a AK	346
	347	int cpuid_nent;
	348	struct kvm_cpuid_entry cpuid_entries[KVM_MAX_CPUID_ENTRIES];
6aa8b732 AK	349	};
6aa8b732 AK	350
e8207547 AK	351	struct kvm_mem_alias {
	352	gfn_t base_gfn;
	353	unsigned long npages;
	354	gfn_t target_gfn;
	355	};
	356
6aa8b732 AK	357	struct kvm_memory_slot {
	358	gfn_t base_gfn;
	359	unsigned long npages;
	360	unsigned long flags;
	361	struct page **phys_mem;
	362	unsigned long *dirty_bitmap;
	363	};
	364
	365	struct kvm {
	366	spinlock_t lock; /* protects everything except vcpus */
e8207547 AK	367	int naliases;
e8207547 AK	368	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
6aa8b732 AK	369	int nmemslots;
6aa8b732 AK	370	struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
cea0f0e7 AK	371	/*
	372	* Hash table of struct kvm_mmu_page.
	373	*/
6aa8b732	374	struct list_head active_mmu_pages;
ebeace86	375	int n_free_mmu_pages;
cea0f0e7	376	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
6aa8b732 AK	377	struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
	378	int memory_config_version;
	379	int busy;
cd4a4e53	380	unsigned long rmap_overflow;
133de902	381	struct list_head vm_list;
bccf2150	382	struct file *filp;
6aa8b732 AK	383	};
6aa8b732 AK	384
6aa8b732 AK	385	struct descriptor_table {
	386	u16 limit;
	387	unsigned long base;
	388	} __attribute__((packed));
	389
	390	struct kvm_arch_ops {
	391	int (cpu_has_kvm_support)(void); / __init */
	392	int (disabled_by_bios)(void); / __init */
	393	void (hardware_enable)(void dummy); /* __init */
	394	void (hardware_disable)(void dummy);
	395	int (hardware_setup)(void); / __init */
	396	void (hardware_unsetup)(void); / __exit */
	397
	398	int (vcpu_create)(struct kvm_vcpu vcpu);
	399	void (vcpu_free)(struct kvm_vcpu vcpu);
	400
bccf2150	401	void (vcpu_load)(struct kvm_vcpu vcpu);
6aa8b732	402	void (vcpu_put)(struct kvm_vcpu vcpu);
774c47f1	403	void (vcpu_decache)(struct kvm_vcpu vcpu);
6aa8b732 AK	404
	405	int (set_guest_debug)(struct kvm_vcpu vcpu,
	406	struct kvm_debug_guest *dbg);
	407	int (get_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 *pdata);
	408	int (set_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	409	u64 (get_segment_base)(struct kvm_vcpu vcpu, int seg);
	410	void (get_segment)(struct kvm_vcpu vcpu,
	411	struct kvm_segment *var, int seg);
	412	void (set_segment)(struct kvm_vcpu vcpu,
	413	struct kvm_segment *var, int seg);
6aa8b732	414	void (get_cs_db_l_bits)(struct kvm_vcpu vcpu, int db, int l);
25c4c276	415	void (decache_cr4_guest_bits)(struct kvm_vcpu vcpu);
6aa8b732	416	void (set_cr0)(struct kvm_vcpu vcpu, unsigned long cr0);
6aa8b732 AK	417	void (set_cr3)(struct kvm_vcpu vcpu, unsigned long cr3);
	418	void (set_cr4)(struct kvm_vcpu vcpu, unsigned long cr4);
	419	void (set_efer)(struct kvm_vcpu vcpu, u64 efer);
	420	void (get_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	421	void (set_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	422	void (get_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	423	void (set_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	424	unsigned long (get_dr)(struct kvm_vcpu vcpu, int dr);
	425	void (set_dr)(struct kvm_vcpu vcpu, int dr, unsigned long value,
	426	int *exception);
	427	void (cache_regs)(struct kvm_vcpu vcpu);
	428	void (decache_regs)(struct kvm_vcpu vcpu);
	429	unsigned long (get_rflags)(struct kvm_vcpu vcpu);
	430	void (set_rflags)(struct kvm_vcpu vcpu, unsigned long rflags);
	431
	432	void (invlpg)(struct kvm_vcpu vcpu, gva_t addr);
	433	void (tlb_flush)(struct kvm_vcpu vcpu);
	434	void (inject_page_fault)(struct kvm_vcpu vcpu,
	435	unsigned long addr, u32 err_code);
	436
	437	void (inject_gp)(struct kvm_vcpu vcpu, unsigned err_code);
	438
	439	int (run)(struct kvm_vcpu vcpu, struct kvm_run *run);
	440	int (vcpu_setup)(struct kvm_vcpu vcpu);
	441	void (skip_emulated_instruction)(struct kvm_vcpu vcpu);
102d8325 IM	442	void (patch_hypercall)(struct kvm_vcpu vcpu,
102d8325 IM	443	unsigned char *hypercall_addr);
6aa8b732 AK	444	};
6aa8b732 AK	445
6aa8b732 AK	446	extern struct kvm_arch_ops *kvm_arch_ops;
	447
	448	#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
	449	#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
	450
	451	int kvm_init_arch(struct kvm_arch_ops ops, struct module module);
	452	void kvm_exit_arch(void);
	453
b5a33a75 AK	454	int kvm_mmu_module_init(void);
	455	void kvm_mmu_module_exit(void);
	456
6aa8b732	457	void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
8018c27b IM	458	int kvm_mmu_create(struct kvm_vcpu *vcpu);
8018c27b IM	459	int kvm_mmu_setup(struct kvm_vcpu *vcpu);
6aa8b732 AK	460
6aa8b732 AK	461	int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
714b93da	462	void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
e0fa826f	463	void kvm_mmu_zap_all(struct kvm_vcpu *vcpu);
6aa8b732 AK	464
	465	hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
	466	#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
	467	#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
	468	static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
	469	hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
039576c0	470	struct page gva_to_page(struct kvm_vcpu vcpu, gva_t gva);
6aa8b732 AK	471
	472	void kvm_emulator_want_group7_invlpg(void);
	473
	474	extern hpa_t bad_page_address;
	475
954bbbc2	476	struct page gfn_to_page(struct kvm kvm, gfn_t gfn);
6aa8b732 AK	477	struct kvm_memory_slot gfn_to_memslot(struct kvm kvm, gfn_t gfn);
	478	void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
	479
	480	enum emulation_result {
	481	EMULATE_DONE, /* no further processing */
	482	EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
	483	EMULATE_FAIL, /* can't emulate this instruction */
	484	};
	485
	486	int emulate_instruction(struct kvm_vcpu vcpu, struct kvm_run run,
	487	unsigned long cr2, u16 error_code);
	488	void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	489	void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	490	void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
	491	unsigned long *rflags);
	492
	493	unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
	494	void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
	495	unsigned long *rflags);
	496
	497	struct x86_emulate_ctxt;
	498
039576c0 AK	499	int kvm_setup_pio(struct kvm_vcpu vcpu, struct kvm_run run, int in,
	500	int size, unsigned long count, int string, int down,
	501	gva_t address, int rep, unsigned port);
06465c5a	502	void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
6aa8b732 AK	503	int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
	504	int emulate_clts(struct kvm_vcpu *vcpu);
	505	int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
	506	unsigned long *dest);
	507	int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
	508	unsigned long value);
	509
	510	void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
	511	void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
	512	void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
	513	void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
	514	void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
	515
3bab1f5d AK	516	int kvm_get_msr_common(struct kvm_vcpu vcpu, u32 msr, u64 pdata);
3bab1f5d AK	517	int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
6aa8b732 AK	518
	519	void fx_init(struct kvm_vcpu *vcpu);
	520
	521	void load_msrs(struct vmx_msr_entry *e, int n);
	522	void save_msrs(struct vmx_msr_entry *e, int n);
	523	void kvm_resched(struct kvm_vcpu *vcpu);
7702fd1f AK	524	void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
7702fd1f AK	525	void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
6aa8b732 AK	526
	527	int kvm_read_guest(struct kvm_vcpu *vcpu,
	528	gva_t addr,
	529	unsigned long size,
	530	void *dest);
	531
	532	int kvm_write_guest(struct kvm_vcpu *vcpu,
	533	gva_t addr,
	534	unsigned long size,
	535	void *data);
	536
	537	unsigned long segment_base(u16 selector);
	538
09072daf AK	539	void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
09072daf AK	540	const u8 old, const u8 new, int bytes);
a436036b	541	int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
ebeace86 AK	542	void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
ebeace86 AK	543
270fd9b9 AK	544	int kvm_hypercall(struct kvm_vcpu vcpu, struct kvm_run run);
270fd9b9 AK	545
ebeace86 AK	546	static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
	547	u32 error_code)
	548	{
	549	if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
	550	kvm_mmu_free_some_pages(vcpu);
	551	return vcpu->mmu.page_fault(vcpu, gva, error_code);
	552	}
da4a00f0	553
a9058ecd AK	554	static inline int is_long_mode(struct kvm_vcpu *vcpu)
	555	{
	556	#ifdef CONFIG_X86_64
	557	return vcpu->shadow_efer & EFER_LME;
	558	#else
	559	return 0;
	560	#endif
	561	}
	562
6aa8b732 AK	563	static inline int is_pae(struct kvm_vcpu *vcpu)
	564	{
	565	return vcpu->cr4 & CR4_PAE_MASK;
	566	}
	567
	568	static inline int is_pse(struct kvm_vcpu *vcpu)
	569	{
	570	return vcpu->cr4 & CR4_PSE_MASK;
	571	}
	572
	573	static inline int is_paging(struct kvm_vcpu *vcpu)
	574	{
	575	return vcpu->cr0 & CR0_PG_MASK;
	576	}
	577
	578	static inline int memslot_id(struct kvm kvm, struct kvm_memory_slot slot)
	579	{
	580	return slot - kvm->memslots;
	581	}
	582
	583	static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
	584	{
	585	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
	586
5972e953	587	return (struct kvm_mmu_page *)page_private(page);
6aa8b732 AK	588	}
	589
	590	static inline u16 read_fs(void)
	591	{
	592	u16 seg;
	593	asm ("mov %%fs, %0" : "=g"(seg));
	594	return seg;
	595	}
	596
	597	static inline u16 read_gs(void)
	598	{
	599	u16 seg;
	600	asm ("mov %%gs, %0" : "=g"(seg));
	601	return seg;
	602	}
	603
	604	static inline u16 read_ldt(void)
	605	{
	606	u16 ldt;
	607	asm ("sldt %0" : "=g"(ldt));
	608	return ldt;
	609	}
	610
	611	static inline void load_fs(u16 sel)
	612	{
	613	asm ("mov %0, %%fs" : : "rm"(sel));
	614	}
	615
	616	static inline void load_gs(u16 sel)
	617	{
	618	asm ("mov %0, %%gs" : : "rm"(sel));
	619	}
	620
	621	#ifndef load_ldt
	622	static inline void load_ldt(u16 sel)
	623	{
a0610ddf	624	asm ("lldt %0" : : "rm"(sel));
6aa8b732 AK	625	}
	626	#endif
	627
	628	static inline void get_idt(struct descriptor_table *table)
	629	{
	630	asm ("sidt %0" : "=m"(*table));
	631	}
	632
	633	static inline void get_gdt(struct descriptor_table *table)
	634	{
	635	asm ("sgdt %0" : "=m"(*table));
	636	}
	637
	638	static inline unsigned long read_tr_base(void)
	639	{
	640	u16 tr;
	641	asm ("str %0" : "=g"(tr));
	642	return segment_base(tr);
	643	}
	644
05b3e0c2	645	#ifdef CONFIG_X86_64
6aa8b732 AK	646	static inline unsigned long read_msr(unsigned long msr)
	647	{
	648	u64 value;
	649
	650	rdmsrl(msr, value);
	651	return value;
	652	}
	653	#endif
	654
	655	static inline void fx_save(void *image)
	656	{
	657	asm ("fxsave (%0)":: "r" (image));
	658	}
	659
	660	static inline void fx_restore(void *image)
	661	{
	662	asm ("fxrstor (%0)":: "r" (image));
	663	}
	664
	665	static inline void fpu_init(void)
	666	{
	667	asm ("finit");
	668	}
	669
	670	static inline u32 get_rdx_init_val(void)
	671	{
	672	return 0x600; /* P6 family */
	673	}
	674
	675	#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
	676	#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
	677	#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
	678	#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
	679	#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
	680	#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
	681	#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
	682	#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
	683	#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
	684
	685	#define MSR_IA32_TIME_STAMP_COUNTER 0x010
	686
	687	#define TSS_IOPB_BASE_OFFSET 0x66
	688	#define TSS_BASE_SIZE 0x68
	689	#define TSS_IOPB_SIZE (65536 / 8)
	690	#define TSS_REDIRECTION_SIZE (256 / 8)
	691	#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
	692
6aa8b732	693	#endif