[linux.git] / drivers / pwm / pwm-atmel-tcb.c

/*
 * Copyright (C) Overkiz SAS 2012
 *
 * Author: Boris BREZILLON <[email protected]>
 * License terms: GNU General Public License (GPL) version 2
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/irq.h>

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/atmel_tc.h>
#include <linux/pwm.h>
#include <linux/of_device.h>
#include <linux/slab.h>

#define NPWM	6

#define ATMEL_TC_ACMR_MASK	(ATMEL_TC_ACPA | ATMEL_TC_ACPC |	\
				 ATMEL_TC_AEEVT | ATMEL_TC_ASWTRG)

#define ATMEL_TC_BCMR_MASK	(ATMEL_TC_BCPB | ATMEL_TC_BCPC |	\
				 ATMEL_TC_BEEVT | ATMEL_TC_BSWTRG)

struct atmel_tcb_pwm_device {
	enum pwm_polarity polarity;	/* PWM polarity */
	unsigned div;			/* PWM clock divider */
	unsigned duty;			/* PWM duty expressed in clk cycles */
	unsigned period;		/* PWM period expressed in clk cycles */
};

struct atmel_tcb_pwm_chip {
	struct pwm_chip chip;
	spinlock_t lock;
	struct atmel_tc *tc;
	struct atmel_tcb_pwm_device *pwms[NPWM];
};

static inline struct atmel_tcb_pwm_chip *to_tcb_chip(struct pwm_chip *chip)
{
	return container_of(chip, struct atmel_tcb_pwm_chip, chip);
}

static int atmel_tcb_pwm_set_polarity(struct pwm_chip *chip,
				      struct pwm_device *pwm,
				      enum pwm_polarity polarity)
{
	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);

	tcbpwm->polarity = polarity;

	return 0;
}

static int atmel_tcb_pwm_request(struct pwm_chip *chip,
				 struct pwm_device *pwm)
{
	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	struct atmel_tcb_pwm_device *tcbpwm;
	struct atmel_tc *tc = tcbpwmc->tc;
	void __iomem *regs = tc->regs;
	unsigned group = pwm->hwpwm / 2;
	unsigned index = pwm->hwpwm % 2;
	unsigned cmr;
	int ret;

	tcbpwm = devm_kzalloc(chip->dev, sizeof(*tcbpwm), GFP_KERNEL);
	if (!tcbpwm)
		return -ENOMEM;

	ret = clk_prepare_enable(tc->clk[group]);
	if (ret) {
		devm_kfree(chip->dev, tcbpwm);
		return ret;
	}

	pwm_set_chip_data(pwm, tcbpwm);
	tcbpwm->polarity = PWM_POLARITY_NORMAL;
	tcbpwm->duty = 0;
	tcbpwm->period = 0;
	tcbpwm->div = 0;

	spin_lock(&tcbpwmc->lock);
	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
	/*
	 * Get init config from Timer Counter registers if
	 * Timer Counter is already configured as a PWM generator.
	 */
	if (cmr & ATMEL_TC_WAVE) {
		if (index == 0)
			tcbpwm->duty =
				__raw_readl(regs + ATMEL_TC_REG(group, RA));
		else
			tcbpwm->duty =
				__raw_readl(regs + ATMEL_TC_REG(group, RB));

		tcbpwm->div = cmr & ATMEL_TC_TCCLKS;
		tcbpwm->period = __raw_readl(regs + ATMEL_TC_REG(group, RC));
		cmr &= (ATMEL_TC_TCCLKS | ATMEL_TC_ACMR_MASK |
			ATMEL_TC_BCMR_MASK);
	} else
		cmr = 0;

	cmr |= ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO | ATMEL_TC_EEVT_XC0;
	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
	spin_unlock(&tcbpwmc->lock);

	tcbpwmc->pwms[pwm->hwpwm] = tcbpwm;

	return 0;
}

static void atmel_tcb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	struct atmel_tc *tc = tcbpwmc->tc;

	clk_disable_unprepare(tc->clk[pwm->hwpwm / 2]);
	tcbpwmc->pwms[pwm->hwpwm] = NULL;
	devm_kfree(chip->dev, tcbpwm);
}

static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	struct atmel_tc *tc = tcbpwmc->tc;
	void __iomem *regs = tc->regs;
	unsigned group = pwm->hwpwm / 2;
	unsigned index = pwm->hwpwm % 2;
	unsigned cmr;
	enum pwm_polarity polarity = tcbpwm->polarity;

	/*
	 * If duty is 0 the timer will be stopped and we have to
	 * configure the output correctly on software trigger:
	 *  - set output to high if PWM_POLARITY_INVERSED
	 *  - set output to low if PWM_POLARITY_NORMAL
	 *
	 * This is why we're reverting polarity in this case.
	 */
	if (tcbpwm->duty == 0)
		polarity = !polarity;

	spin_lock(&tcbpwmc->lock);
	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));

	/* flush old setting and set the new one */
	if (index == 0) {
		cmr &= ~ATMEL_TC_ACMR_MASK;
		if (polarity == PWM_POLARITY_INVERSED)
			cmr |= ATMEL_TC_ASWTRG_CLEAR;
		else
			cmr |= ATMEL_TC_ASWTRG_SET;
	} else {
		cmr &= ~ATMEL_TC_BCMR_MASK;
		if (polarity == PWM_POLARITY_INVERSED)
			cmr |= ATMEL_TC_BSWTRG_CLEAR;
		else
			cmr |= ATMEL_TC_BSWTRG_SET;
	}

	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));

	/*
	 * Use software trigger to apply the new setting.
	 * If both PWM devices in this group are disabled we stop the clock.
	 */
	if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC)))
		__raw_writel(ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS,
			     regs + ATMEL_TC_REG(group, CCR));
	else
		__raw_writel(ATMEL_TC_SWTRG, regs +
			     ATMEL_TC_REG(group, CCR));

	spin_unlock(&tcbpwmc->lock);
}

static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	struct atmel_tc *tc = tcbpwmc->tc;
	void __iomem *regs = tc->regs;
	unsigned group = pwm->hwpwm / 2;
	unsigned index = pwm->hwpwm % 2;
	u32 cmr;
	enum pwm_polarity polarity = tcbpwm->polarity;

	/*
	 * If duty is 0 the timer will be stopped and we have to
	 * configure the output correctly on software trigger:
	 *  - set output to high if PWM_POLARITY_INVERSED
	 *  - set output to low if PWM_POLARITY_NORMAL
	 *
	 * This is why we're reverting polarity in this case.
	 */
	if (tcbpwm->duty == 0)
		polarity = !polarity;

	spin_lock(&tcbpwmc->lock);
	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));

	/* flush old setting and set the new one */
	cmr &= ~ATMEL_TC_TCCLKS;

	if (index == 0) {
		cmr &= ~ATMEL_TC_ACMR_MASK;

		/* Set CMR flags according to given polarity */
		if (polarity == PWM_POLARITY_INVERSED)
			cmr |= ATMEL_TC_ASWTRG_CLEAR;
		else
			cmr |= ATMEL_TC_ASWTRG_SET;
	} else {
		cmr &= ~ATMEL_TC_BCMR_MASK;
		if (polarity == PWM_POLARITY_INVERSED)
			cmr |= ATMEL_TC_BSWTRG_CLEAR;
		else
			cmr |= ATMEL_TC_BSWTRG_SET;
	}

	/*
	 * If duty is 0 or equal to period there's no need to register
	 * a specific action on RA/RB and RC compare.
	 * The output will be configured on software trigger and keep
	 * this config till next config call.
	 */
	if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) {
		if (index == 0) {
			if (polarity == PWM_POLARITY_INVERSED)
				cmr |= ATMEL_TC_ACPA_SET | ATMEL_TC_ACPC_CLEAR;
			else
				cmr |= ATMEL_TC_ACPA_CLEAR | ATMEL_TC_ACPC_SET;
		} else {
			if (polarity == PWM_POLARITY_INVERSED)
				cmr |= ATMEL_TC_BCPB_SET | ATMEL_TC_BCPC_CLEAR;
			else
				cmr |= ATMEL_TC_BCPB_CLEAR | ATMEL_TC_BCPC_SET;
		}
	}

	cmr |= (tcbpwm->div & ATMEL_TC_TCCLKS);

	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));

	if (index == 0)
		__raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA));
	else
		__raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RB));

	__raw_writel(tcbpwm->period, regs + ATMEL_TC_REG(group, RC));

	/* Use software trigger to apply the new setting */
	__raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
		     regs + ATMEL_TC_REG(group, CCR));
	spin_unlock(&tcbpwmc->lock);
	return 0;
}

static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
				int duty_ns, int period_ns)
{
	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	unsigned group = pwm->hwpwm / 2;
	unsigned index = pwm->hwpwm % 2;
	struct atmel_tcb_pwm_device *atcbpwm = NULL;
	struct atmel_tc *tc = tcbpwmc->tc;
	int i;
	int slowclk = 0;
	unsigned period;
	unsigned duty;
	unsigned rate = clk_get_rate(tc->clk[group]);
	unsigned long long min;
	unsigned long long max;

	/*
	 * Find best clk divisor:
	 * the smallest divisor which can fulfill the period_ns requirements.
	 */
	for (i = 0; i < 5; ++i) {
		if (atmel_tc_divisors[i] == 0) {
			slowclk = i;
			continue;
		}
		min = div_u64((u64)NSEC_PER_SEC * atmel_tc_divisors[i], rate);
		max = min << tc->tcb_config->counter_width;
		if (max >= period_ns)
			break;
	}

	/*
	 * If none of the divisor are small enough to represent period_ns
	 * take slow clock (32KHz).
	 */
	if (i == 5) {
		i = slowclk;
		rate = clk_get_rate(tc->slow_clk);
		min = div_u64(NSEC_PER_SEC, rate);
		max = min << tc->tcb_config->counter_width;

		/* If period is too big return ERANGE error */
		if (max < period_ns)
			return -ERANGE;
	}

	duty = div_u64(duty_ns, min);
	period = div_u64(period_ns, min);

	if (index == 0)
		atcbpwm = tcbpwmc->pwms[pwm->hwpwm + 1];
	else
		atcbpwm = tcbpwmc->pwms[pwm->hwpwm - 1];

	/*
	 * PWM devices provided by TCB driver are grouped by 2:
	 * - group 0: PWM 0 & 1
	 * - group 1: PWM 2 & 3
	 * - group 2: PWM 4 & 5
	 *
	 * PWM devices in a given group must be configured with the
	 * same period_ns.
	 *
	 * We're checking the period value of the second PWM device
	 * in this group before applying the new config.
	 */
	if ((atcbpwm && atcbpwm->duty > 0 &&
			atcbpwm->duty != atcbpwm->period) &&
		(atcbpwm->div != i || atcbpwm->period != period)) {
		dev_err(chip->dev,
			"failed to configure period_ns: PWM group already configured with a different value\n");
		return -EINVAL;
	}

	tcbpwm->period = period;
	tcbpwm->div = i;
	tcbpwm->duty = duty;

	/* If the PWM is enabled, call enable to apply the new conf */
	if (pwm_is_enabled(pwm))
		atmel_tcb_pwm_enable(chip, pwm);

	return 0;
}

static const struct pwm_ops atmel_tcb_pwm_ops = {
	.request = atmel_tcb_pwm_request,
	.free = atmel_tcb_pwm_free,
	.config = atmel_tcb_pwm_config,
	.set_polarity = atmel_tcb_pwm_set_polarity,
	.enable = atmel_tcb_pwm_enable,
	.disable = atmel_tcb_pwm_disable,
	.owner = THIS_MODULE,
};

static int atmel_tcb_pwm_probe(struct platform_device *pdev)
{
	struct atmel_tcb_pwm_chip *tcbpwm;
	struct device_node *np = pdev->dev.of_node;
	struct atmel_tc *tc;
	int err;
	int tcblock;

	err = of_property_read_u32(np, "tc-block", &tcblock);
	if (err < 0) {
		dev_err(&pdev->dev,
			"failed to get Timer Counter Block number from device tree (error: %d)\n",
			err);
		return err;
	}

	tc = atmel_tc_alloc(tcblock);
	if (tc == NULL) {
		dev_err(&pdev->dev, "failed to allocate Timer Counter Block\n");
		return -ENOMEM;
	}

	tcbpwm = devm_kzalloc(&pdev->dev, sizeof(*tcbpwm), GFP_KERNEL);
	if (tcbpwm == NULL) {
		err = -ENOMEM;
		dev_err(&pdev->dev, "failed to allocate memory\n");
		goto err_free_tc;
	}

	tcbpwm->chip.dev = &pdev->dev;
	tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
	tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
	tcbpwm->chip.of_pwm_n_cells = 3;
	tcbpwm->chip.base = -1;
	tcbpwm->chip.npwm = NPWM;
	tcbpwm->tc = tc;

	err = clk_prepare_enable(tc->slow_clk);
	if (err)
		goto err_free_tc;

	spin_lock_init(&tcbpwm->lock);

	err = pwmchip_add(&tcbpwm->chip);
	if (err < 0)
		goto err_disable_clk;

	platform_set_drvdata(pdev, tcbpwm);

	return 0;

err_disable_clk:
	clk_disable_unprepare(tcbpwm->tc->slow_clk);

err_free_tc:
	atmel_tc_free(tc);

	return err;
}

static int atmel_tcb_pwm_remove(struct platform_device *pdev)
{
	struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
	int err;

	clk_disable_unprepare(tcbpwm->tc->slow_clk);

	err = pwmchip_remove(&tcbpwm->chip);
	if (err < 0)
		return err;

	atmel_tc_free(tcbpwm->tc);

	return 0;
}

static const struct of_device_id atmel_tcb_pwm_dt_ids[] = {
	{ .compatible = "atmel,tcb-pwm", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);

static struct platform_driver atmel_tcb_pwm_driver = {
	.driver = {
		.name = "atmel-tcb-pwm",
		.of_match_table = atmel_tcb_pwm_dt_ids,
	},
	.probe = atmel_tcb_pwm_probe,
	.remove = atmel_tcb_pwm_remove,
};
module_platform_driver(atmel_tcb_pwm_driver);

MODULE_AUTHOR("Boris BREZILLON <[email protected]>");
MODULE_DESCRIPTION("Atmel Timer Counter Pulse Width Modulation Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
9421bade BB	1	/*
	2	* Copyright (C) Overkiz SAS 2012
	3	*
	4	* Author: Boris BREZILLON <[email protected]>
	5	* License terms: GNU General Public License (GPL) version 2
	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/init.h>
	10	#include <linux/clocksource.h>
	11	#include <linux/clockchips.h>
	12	#include <linux/interrupt.h>
	13	#include <linux/irq.h>
	14
	15	#include <linux/clk.h>
	16	#include <linux/err.h>
	17	#include <linux/ioport.h>
	18	#include <linux/io.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/atmel_tc.h>
	21	#include <linux/pwm.h>
	22	#include <linux/of_device.h>
	23	#include <linux/slab.h>
	24
	25	#define NPWM 6
	26
	27	#define ATMEL_TC_ACMR_MASK (ATMEL_TC_ACPA \| ATMEL_TC_ACPC \| \
	28	ATMEL_TC_AEEVT \| ATMEL_TC_ASWTRG)
	29
	30	#define ATMEL_TC_BCMR_MASK (ATMEL_TC_BCPB \| ATMEL_TC_BCPC \| \
	31	ATMEL_TC_BEEVT \| ATMEL_TC_BSWTRG)
	32
	33	struct atmel_tcb_pwm_device {
	34	enum pwm_polarity polarity; /* PWM polarity */
	35	unsigned div; /* PWM clock divider */
	36	unsigned duty; /* PWM duty expressed in clk cycles */
	37	unsigned period; /* PWM period expressed in clk cycles */
	38	};
	39
	40	struct atmel_tcb_pwm_chip {
	41	struct pwm_chip chip;
	42	spinlock_t lock;
	43	struct atmel_tc *tc;
	44	struct atmel_tcb_pwm_device *pwms[NPWM];
	45	};
	46
	47	static inline struct atmel_tcb_pwm_chip to_tcb_chip(struct pwm_chip chip)
	48	{
	49	return container_of(chip, struct atmel_tcb_pwm_chip, chip);
	50	}
	51
	52	static int atmel_tcb_pwm_set_polarity(struct pwm_chip *chip,
	53	struct pwm_device *pwm,
	54	enum pwm_polarity polarity)
	55	{
	56	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	57
	58	tcbpwm->polarity = polarity;
	59
	60	return 0;
	61	}
	62
	63	static int atmel_tcb_pwm_request(struct pwm_chip *chip,
	64	struct pwm_device *pwm)
65	{
66	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
67	struct atmel_tcb_pwm_device *tcbpwm;
68	struct atmel_tc *tc = tcbpwmc->tc;
69	void __iomem *regs = tc->regs;
70	unsigned group = pwm->hwpwm / 2;
71	unsigned index = pwm->hwpwm % 2;
72	unsigned cmr;
73	int ret;
74
75	tcbpwm = devm_kzalloc(chip->dev, sizeof(*tcbpwm), GFP_KERNEL);
76	if (!tcbpwm)
77	return -ENOMEM;
78
8796f9c5	79	ret = clk_prepare_enable(tc->clk[group]);
9421bade BB	80	if (ret) {
	81	devm_kfree(chip->dev, tcbpwm);
	82	return ret;
	83	}
	84
	85	pwm_set_chip_data(pwm, tcbpwm);
	86	tcbpwm->polarity = PWM_POLARITY_NORMAL;
	87	tcbpwm->duty = 0;
	88	tcbpwm->period = 0;
	89	tcbpwm->div = 0;
	90
	91	spin_lock(&tcbpwmc->lock);
	92	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
	93	/*
	94	* Get init config from Timer Counter registers if
	95	* Timer Counter is already configured as a PWM generator.
	96	*/
	97	if (cmr & ATMEL_TC_WAVE) {
	98	if (index == 0)
	99	tcbpwm->duty =
	100	__raw_readl(regs + ATMEL_TC_REG(group, RA));
	101	else
	102	tcbpwm->duty =
	103	__raw_readl(regs + ATMEL_TC_REG(group, RB));
	104
	105	tcbpwm->div = cmr & ATMEL_TC_TCCLKS;
	106	tcbpwm->period = __raw_readl(regs + ATMEL_TC_REG(group, RC));
	107	cmr &= (ATMEL_TC_TCCLKS \| ATMEL_TC_ACMR_MASK \|
	108	ATMEL_TC_BCMR_MASK);
	109	} else
	110	cmr = 0;
	111
	112	cmr \|= ATMEL_TC_WAVE \| ATMEL_TC_WAVESEL_UP_AUTO \| ATMEL_TC_EEVT_XC0;
	113	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
	114	spin_unlock(&tcbpwmc->lock);
	115
	116	tcbpwmc->pwms[pwm->hwpwm] = tcbpwm;
	117
	118	return 0;
	119	}
	120
	121	static void atmel_tcb_pwm_free(struct pwm_chip chip, struct pwm_device pwm)
	122	{
	123	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	124	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	125	struct atmel_tc *tc = tcbpwmc->tc;
	126
8796f9c5	127	clk_disable_unprepare(tc->clk[pwm->hwpwm / 2]);
9421bade BB	128	tcbpwmc->pwms[pwm->hwpwm] = NULL;
	129	devm_kfree(chip->dev, tcbpwm);
	130	}
	131
	132	static void atmel_tcb_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	133	{
	134	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	135	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	136	struct atmel_tc *tc = tcbpwmc->tc;
	137	void __iomem *regs = tc->regs;
	138	unsigned group = pwm->hwpwm / 2;
	139	unsigned index = pwm->hwpwm % 2;
	140	unsigned cmr;
	141	enum pwm_polarity polarity = tcbpwm->polarity;
	142
	143	/*
	144	* If duty is 0 the timer will be stopped and we have to
	145	* configure the output correctly on software trigger:
	146	* - set output to high if PWM_POLARITY_INVERSED
	147	* - set output to low if PWM_POLARITY_NORMAL
	148	*
	149	* This is why we're reverting polarity in this case.
	150	*/
	151	if (tcbpwm->duty == 0)
	152	polarity = !polarity;
	153
	154	spin_lock(&tcbpwmc->lock);
	155	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
	156
	157	/* flush old setting and set the new one */
	158	if (index == 0) {
	159	cmr &= ~ATMEL_TC_ACMR_MASK;
	160	if (polarity == PWM_POLARITY_INVERSED)
	161	cmr \|= ATMEL_TC_ASWTRG_CLEAR;
	162	else
	163	cmr \|= ATMEL_TC_ASWTRG_SET;
	164	} else {
	165	cmr &= ~ATMEL_TC_BCMR_MASK;
	166	if (polarity == PWM_POLARITY_INVERSED)
	167	cmr \|= ATMEL_TC_BSWTRG_CLEAR;
	168	else
	169	cmr \|= ATMEL_TC_BSWTRG_SET;
	170	}
	171
	172	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
	173
	174	/*
	175	* Use software trigger to apply the new setting.
	176	* If both PWM devices in this group are disabled we stop the clock.
	177	*/
	178	if (!(cmr & (ATMEL_TC_ACPC \| ATMEL_TC_BCPC)))
	179	__raw_writel(ATMEL_TC_SWTRG \| ATMEL_TC_CLKDIS,
	180	regs + ATMEL_TC_REG(group, CCR));
	181	else
	182	__raw_writel(ATMEL_TC_SWTRG, regs +
	183	ATMEL_TC_REG(group, CCR));
	184
	185	spin_unlock(&tcbpwmc->lock);
	186	}
	187
	188	static int atmel_tcb_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	189	{
	190	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	191	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
192	struct atmel_tc *tc = tcbpwmc->tc;
193	void __iomem *regs = tc->regs;
194	unsigned group = pwm->hwpwm / 2;
195	unsigned index = pwm->hwpwm % 2;
196	u32 cmr;
197	enum pwm_polarity polarity = tcbpwm->polarity;
198
199	/*
200	* If duty is 0 the timer will be stopped and we have to
201	* configure the output correctly on software trigger:
202	* - set output to high if PWM_POLARITY_INVERSED
203	* - set output to low if PWM_POLARITY_NORMAL
204	*
205	* This is why we're reverting polarity in this case.
206	*/
207	if (tcbpwm->duty == 0)
208	polarity = !polarity;
209
210	spin_lock(&tcbpwmc->lock);
211	cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
212
213	/* flush old setting and set the new one */
214	cmr &= ~ATMEL_TC_TCCLKS;
215
216	if (index == 0) {
217	cmr &= ~ATMEL_TC_ACMR_MASK;
218
219	/* Set CMR flags according to given polarity */
220	if (polarity == PWM_POLARITY_INVERSED)
221	cmr \|= ATMEL_TC_ASWTRG_CLEAR;
222	else
223	cmr \|= ATMEL_TC_ASWTRG_SET;
224	} else {
225	cmr &= ~ATMEL_TC_BCMR_MASK;
226	if (polarity == PWM_POLARITY_INVERSED)
227	cmr \|= ATMEL_TC_BSWTRG_CLEAR;
228	else
229	cmr \|= ATMEL_TC_BSWTRG_SET;
230	}
231
232	/*
233	* If duty is 0 or equal to period there's no need to register
234	* a specific action on RA/RB and RC compare.
235	* The output will be configured on software trigger and keep
236	* this config till next config call.
237	*/
238	if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) {
239	if (index == 0) {
240	if (polarity == PWM_POLARITY_INVERSED)
241	cmr \|= ATMEL_TC_ACPA_SET \| ATMEL_TC_ACPC_CLEAR;
242	else
243	cmr \|= ATMEL_TC_ACPA_CLEAR \| ATMEL_TC_ACPC_SET;
244	} else {
245	if (polarity == PWM_POLARITY_INVERSED)
246	cmr \|= ATMEL_TC_BCPB_SET \| ATMEL_TC_BCPC_CLEAR;
247	else
248	cmr \|= ATMEL_TC_BCPB_CLEAR \| ATMEL_TC_BCPC_SET;
249	}
250	}
251
f3a82170 BB	252	cmr \|= (tcbpwm->div & ATMEL_TC_TCCLKS);
f3a82170 BB	253
9421bade BB	254	__raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
	255
	256	if (index == 0)
	257	__raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA));
	258	else
	259	__raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RB));
	260
	261	__raw_writel(tcbpwm->period, regs + ATMEL_TC_REG(group, RC));
	262
	263	/* Use software trigger to apply the new setting */
	264	__raw_writel(ATMEL_TC_CLKEN \| ATMEL_TC_SWTRG,
	265	regs + ATMEL_TC_REG(group, CCR));
	266	spin_unlock(&tcbpwmc->lock);
	267	return 0;
	268	}
	269
	270	static int atmel_tcb_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	271	int duty_ns, int period_ns)
	272	{
	273	struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
	274	struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
	275	unsigned group = pwm->hwpwm / 2;
	276	unsigned index = pwm->hwpwm % 2;
	277	struct atmel_tcb_pwm_device *atcbpwm = NULL;
	278	struct atmel_tc *tc = tcbpwmc->tc;
	279	int i;
	280	int slowclk = 0;
	281	unsigned period;
	282	unsigned duty;
	283	unsigned rate = clk_get_rate(tc->clk[group]);
	284	unsigned long long min;
	285	unsigned long long max;
	286
	287	/*
	288	* Find best clk divisor:
	289	* the smallest divisor which can fulfill the period_ns requirements.
	290	*/
	291	for (i = 0; i < 5; ++i) {
	292	if (atmel_tc_divisors[i] == 0) {
	293	slowclk = i;
	294	continue;
	295	}
	296	min = div_u64((u64)NSEC_PER_SEC * atmel_tc_divisors[i], rate);
	297	max = min << tc->tcb_config->counter_width;
	298	if (max >= period_ns)
	299	break;
	300	}
	301
	302	/*
	303	* If none of the divisor are small enough to represent period_ns
	304	* take slow clock (32KHz).
	305	*/
	306	if (i == 5) {
	307	i = slowclk;
7d8d05d1	308	rate = clk_get_rate(tc->slow_clk);
9421bade	309	min = div_u64(NSEC_PER_SEC, rate);
ceb12f93	310	max = min << tc->tcb_config->counter_width;
9421bade BB	311
	312	/* If period is too big return ERANGE error */
	313	if (max < period_ns)
	314	return -ERANGE;
	315	}
	316
	317	duty = div_u64(duty_ns, min);
	318	period = div_u64(period_ns, min);
	319
	320	if (index == 0)
	321	atcbpwm = tcbpwmc->pwms[pwm->hwpwm + 1];
	322	else
	323	atcbpwm = tcbpwmc->pwms[pwm->hwpwm - 1];
	324
	325	/*
	326	* PWM devices provided by TCB driver are grouped by 2:
	327	* - group 0: PWM 0 & 1
	328	* - group 1: PWM 2 & 3
	329	* - group 2: PWM 4 & 5
	330	*
	331	* PWM devices in a given group must be configured with the
	332	* same period_ns.
	333	*
	334	* We're checking the period value of the second PWM device
	335	* in this group before applying the new config.
	336	*/
	337	if ((atcbpwm && atcbpwm->duty > 0 &&
	338	atcbpwm->duty != atcbpwm->period) &&
	339	(atcbpwm->div != i \|\| atcbpwm->period != period)) {
	340	dev_err(chip->dev,
	341	"failed to configure period_ns: PWM group already configured with a different value\n");
	342	return -EINVAL;
	343	}
	344
	345	tcbpwm->period = period;
	346	tcbpwm->div = i;
	347	tcbpwm->duty = duty;
	348
	349	/* If the PWM is enabled, call enable to apply the new conf */
5c31252c	350	if (pwm_is_enabled(pwm))
9421bade BB	351	atmel_tcb_pwm_enable(chip, pwm);
	352
	353	return 0;
	354	}
	355
	356	static const struct pwm_ops atmel_tcb_pwm_ops = {
	357	.request = atmel_tcb_pwm_request,
	358	.free = atmel_tcb_pwm_free,
	359	.config = atmel_tcb_pwm_config,
	360	.set_polarity = atmel_tcb_pwm_set_polarity,
	361	.enable = atmel_tcb_pwm_enable,
	362	.disable = atmel_tcb_pwm_disable,
83c80dc5	363	.owner = THIS_MODULE,
9421bade BB	364	};
	365
	366	static int atmel_tcb_pwm_probe(struct platform_device *pdev)
	367	{
	368	struct atmel_tcb_pwm_chip *tcbpwm;
	369	struct device_node *np = pdev->dev.of_node;
	370	struct atmel_tc *tc;
	371	int err;
	372	int tcblock;
	373
	374	err = of_property_read_u32(np, "tc-block", &tcblock);
	375	if (err < 0) {
	376	dev_err(&pdev->dev,
	377	"failed to get Timer Counter Block number from device tree (error: %d)\n",
	378	err);
	379	return err;
	380	}
	381
4930d247	382	tc = atmel_tc_alloc(tcblock);
9421bade BB	383	if (tc == NULL) {
	384	dev_err(&pdev->dev, "failed to allocate Timer Counter Block\n");
	385	return -ENOMEM;
	386	}
	387
	388	tcbpwm = devm_kzalloc(&pdev->dev, sizeof(*tcbpwm), GFP_KERNEL);
	389	if (tcbpwm == NULL) {
7d8d05d1	390	err = -ENOMEM;
9421bade	391	dev_err(&pdev->dev, "failed to allocate memory\n");
7d8d05d1	392	goto err_free_tc;
9421bade BB	393	}
	394
	395	tcbpwm->chip.dev = &pdev->dev;
	396	tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
	397	tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
	398	tcbpwm->chip.of_pwm_n_cells = 3;
	399	tcbpwm->chip.base = -1;
	400	tcbpwm->chip.npwm = NPWM;
	401	tcbpwm->tc = tc;
	402
7d8d05d1 BB	403	err = clk_prepare_enable(tc->slow_clk);
	404	if (err)
	405	goto err_free_tc;
	406
9421bade BB	407	spin_lock_init(&tcbpwm->lock);
	408
	409	err = pwmchip_add(&tcbpwm->chip);
7d8d05d1 BB	410	if (err < 0)
7d8d05d1 BB	411	goto err_disable_clk;
9421bade BB	412
	413	platform_set_drvdata(pdev, tcbpwm);
	414
	415	return 0;
7d8d05d1 BB	416
	417	err_disable_clk:
	418	clk_disable_unprepare(tcbpwm->tc->slow_clk);
	419
	420	err_free_tc:
	421	atmel_tc_free(tc);
	422
	423	return err;
9421bade BB	424	}
	425
	426	static int atmel_tcb_pwm_remove(struct platform_device *pdev)
	427	{
	428	struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
	429	int err;
	430
7d8d05d1 BB	431	clk_disable_unprepare(tcbpwm->tc->slow_clk);
7d8d05d1 BB	432
9421bade BB	433	err = pwmchip_remove(&tcbpwm->chip);
	434	if (err < 0)
	435	return err;
	436
	437	atmel_tc_free(tcbpwm->tc);
	438
	439	return 0;
	440	}
	441
	442	static const struct of_device_id atmel_tcb_pwm_dt_ids[] = {
	443	{ .compatible = "atmel,tcb-pwm", },
	444	{ /* sentinel */ }
	445	};
	446	MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);
	447
	448	static struct platform_driver atmel_tcb_pwm_driver = {
	449	.driver = {
	450	.name = "atmel-tcb-pwm",
	451	.of_match_table = atmel_tcb_pwm_dt_ids,
	452	},
	453	.probe = atmel_tcb_pwm_probe,
	454	.remove = atmel_tcb_pwm_remove,
	455	};
	456	module_platform_driver(atmel_tcb_pwm_driver);
	457
	458	MODULE_AUTHOR("Boris BREZILLON <[email protected]>");
	459	MODULE_DESCRIPTION("Atmel Timer Counter Pulse Width Modulation Driver");
	460	MODULE_LICENSE("GPL v2");