[linux.git] / arch / powerpc / kernel / pmc.c

/*
 *  arch/powerpc/kernel/pmc.c
 *
 *  Copyright (C) 2004 David Gibson, IBM Corporation.
 *  Includes code formerly from arch/ppc/kernel/perfmon.c:
 *    Author: Andy Fleming
 *    Copyright (c) 2004 Freescale Semiconductor, Inc
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/errno.h>
#include <linux/bug.h>
#include <linux/spinlock.h>
#include <linux/export.h>

#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/pmc.h>

#ifndef MMCR0_PMAO
#define MMCR0_PMAO	0
#endif

static void dummy_perf(struct pt_regs *regs)
{
#if defined(CONFIG_FSL_EMB_PERFMON)
	mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
	if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
		mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
#else
	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
#endif
}


static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */
perf_irq_t perf_irq = dummy_perf;

int reserve_pmc_hardware(perf_irq_t new_perf_irq)
{
	int err = 0;

	raw_spin_lock(&pmc_owner_lock);

	if (pmc_owner_caller) {
		printk(KERN_WARNING "reserve_pmc_hardware: "
		       "PMC hardware busy (reserved by caller %p)\n",
		       pmc_owner_caller);
		err = -EBUSY;
		goto out;
	}

	pmc_owner_caller = __builtin_return_address(0);
	perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;

 out:
	raw_spin_unlock(&pmc_owner_lock);
	return err;
}
EXPORT_SYMBOL_GPL(reserve_pmc_hardware);

void release_pmc_hardware(void)
{
	raw_spin_lock(&pmc_owner_lock);

	WARN_ON(! pmc_owner_caller);

	pmc_owner_caller = NULL;
	perf_irq = dummy_perf;

	raw_spin_unlock(&pmc_owner_lock);
}
EXPORT_SYMBOL_GPL(release_pmc_hardware);

#ifdef CONFIG_PPC64
void power4_enable_pmcs(void)
{
	unsigned long hid0;

	hid0 = mfspr(SPRN_HID0);
	hid0 |= 1UL << (63 - 20);

	/* POWER4 requires the following sequence */
	asm volatile(
		"sync\n"
		"mtspr     %1, %0\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"mfspr     %0, %1\n"
		"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
		"memory");
}
#endif /* CONFIG_PPC64 */
Commit	Line	Data
1da177e4	1	/*
f7f6f4fe	2	* arch/powerpc/kernel/pmc.c
1da177e4 LT	3	*
1da177e4 LT	4	* Copyright (C) 2004 David Gibson, IBM Corporation.
f7f6f4fe DG	5	* Includes code formerly from arch/ppc/kernel/perfmon.c:
	6	* Author: Andy Fleming
	7	* Copyright (c) 2004 Freescale Semiconductor, Inc
1da177e4 LT	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
1da177e4	15	#include <linux/errno.h>
50af5ead	16	#include <linux/bug.h>
1da177e4	17	#include <linux/spinlock.h>
4b16f8e2	18	#include <linux/export.h>
1da177e4 LT	19
1da177e4 LT	20	#include <asm/processor.h>
6529c13d	21	#include <asm/cputable.h>
1da177e4 LT	22	#include <asm/pmc.h>
1da177e4 LT	23
177e9ea4 AB	24	#ifndef MMCR0_PMAO
177e9ea4 AB	25	#define MMCR0_PMAO 0
f7f6f4fe DG	26	#endif
f7f6f4fe DG	27
1da177e4 LT	28	static void dummy_perf(struct pt_regs *regs)
1da177e4 LT	29	{
39aef685	30	#if defined(CONFIG_FSL_EMB_PERFMON)
1bd2e5ae OJ	31	mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
1bd2e5ae OJ	32	#elif defined(CONFIG_PPC64) \|\| defined(CONFIG_6xx)
6529c13d	33	if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
177e9ea4	34	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE\|MMCR0_PMAO));
f7f6f4fe	35	#else
1bd2e5ae	36	mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
f7f6f4fe	37	#endif
1bd2e5ae OJ	38	}
1bd2e5ae OJ	39
1da177e4	40
071c06cb	41	static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
1da177e4 LT	42	static void pmc_owner_caller; / mostly for debugging */
	43	perf_irq_t perf_irq = dummy_perf;
	44
	45	int reserve_pmc_hardware(perf_irq_t new_perf_irq)
	46	{
	47	int err = 0;
	48
071c06cb	49	raw_spin_lock(&pmc_owner_lock);
1da177e4 LT	50
	51	if (pmc_owner_caller) {
	52	printk(KERN_WARNING "reserve_pmc_hardware: "
	53	"PMC hardware busy (reserved by caller %p)\n",
	54	pmc_owner_caller);
	55	err = -EBUSY;
	56	goto out;
	57	}
	58
	59	pmc_owner_caller = __builtin_return_address(0);
dd6c89f6	60	perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
1da177e4 LT	61
1da177e4 LT	62	out:
071c06cb	63	raw_spin_unlock(&pmc_owner_lock);
1da177e4 LT	64	return err;
	65	}
	66	EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
	67
	68	void release_pmc_hardware(void)
	69	{
071c06cb	70	raw_spin_lock(&pmc_owner_lock);
1da177e4 LT	71
	72	WARN_ON(! pmc_owner_caller);
	73
	74	pmc_owner_caller = NULL;
	75	perf_irq = dummy_perf;
	76
071c06cb	77	raw_spin_unlock(&pmc_owner_lock);
1da177e4 LT	78	}
1da177e4 LT	79	EXPORT_SYMBOL_GPL(release_pmc_hardware);
180a3362	80
f7f6f4fe	81	#ifdef CONFIG_PPC64
180a3362 ME	82	void power4_enable_pmcs(void)
	83	{
	84	unsigned long hid0;
	85
b5bbeb23	86	hid0 = mfspr(SPRN_HID0);
180a3362 ME	87	hid0 \|= 1UL << (63 - 20);
	88
	89	/* POWER4 requires the following sequence */
	90	asm volatile(
	91	"sync\n"
	92	"mtspr %1, %0\n"
	93	"mfspr %0, %1\n"
	94	"mfspr %0, %1\n"
	95	"mfspr %0, %1\n"
	96	"mfspr %0, %1\n"
	97	"mfspr %0, %1\n"
	98	"mfspr %0, %1\n"
b5bbeb23	99	"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
180a3362 ME	100	"memory");
180a3362 ME	101	}
f7f6f4fe	102	#endif /* CONFIG_PPC64 */