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Commit | Line | Data |
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7c1a70e9 | 1 | /* |
7c1a70e9 | 2 | * Copyright (C) STMicroelectronics 2009 |
0baf066f | 3 | * Copyright (C) ST-Ericsson SA 2010-2012 |
7c1a70e9 MP |
4 | * |
5 | * License Terms: GNU General Public License v2 | |
7c1a70e9 MP |
6 | * Author: Sundar Iyer <[email protected]> |
7 | * Author: Martin Persson <[email protected]> | |
8 | * Author: Jonas Aaberg <[email protected]> | |
7c1a70e9 | 9 | */ |
0baf066f | 10 | |
b4689444 | 11 | #include <linux/module.h> |
7c1a70e9 MP |
12 | #include <linux/kernel.h> |
13 | #include <linux/cpufreq.h> | |
14 | #include <linux/delay.h> | |
72b2fd5c | 15 | #include <linux/slab.h> |
b4689444 | 16 | #include <linux/platform_device.h> |
78e30d12 | 17 | #include <linux/clk.h> |
7c1a70e9 | 18 | |
fdb44464 | 19 | static struct cpufreq_frequency_table *freq_table; |
78e30d12 | 20 | static struct clk *armss_clk; |
72b2fd5c | 21 | |
edb10c11 | 22 | static int dbx500_cpufreq_target(struct cpufreq_policy *policy, |
9c0ebcf7 | 23 | unsigned int index) |
7c1a70e9 | 24 | { |
78e30d12 | 25 | /* update armss clk frequency */ |
d4019f0a | 26 | return clk_set_rate(armss_clk, freq_table[index].frequency * 1000); |
7c1a70e9 MP |
27 | } |
28 | ||
2760984f | 29 | static int dbx500_cpufreq_init(struct cpufreq_policy *policy) |
7c1a70e9 | 30 | { |
652ed95d | 31 | policy->clk = armss_clk; |
2b3dc761 | 32 | return cpufreq_generic_init(policy, freq_table, 20 * 1000); |
7c1a70e9 MP |
33 | } |
34 | ||
edb10c11 | 35 | static struct cpufreq_driver dbx500_cpufreq_driver = { |
ae6b4271 VK |
36 | .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS | |
37 | CPUFREQ_NEED_INITIAL_FREQ_CHECK, | |
47150e98 | 38 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 39 | .target_index = dbx500_cpufreq_target, |
652ed95d | 40 | .get = cpufreq_generic_get, |
edb10c11 LJ |
41 | .init = dbx500_cpufreq_init, |
42 | .name = "DBX500", | |
47150e98 | 43 | .attr = cpufreq_generic_attr, |
7c1a70e9 MP |
44 | }; |
45 | ||
edb10c11 | 46 | static int dbx500_cpufreq_probe(struct platform_device *pdev) |
b4689444 | 47 | { |
041526f9 | 48 | struct cpufreq_frequency_table *pos; |
fdb44464 | 49 | |
3e27996c | 50 | freq_table = dev_get_platdata(&pdev->dev); |
fdb44464 | 51 | if (!freq_table) { |
edb10c11 | 52 | pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n"); |
fdb44464 UH |
53 | return -ENODEV; |
54 | } | |
55 | ||
3e27996c UH |
56 | armss_clk = clk_get(&pdev->dev, "armss"); |
57 | if (IS_ERR(armss_clk)) { | |
9291cf9d | 58 | pr_err("dbx500-cpufreq: Failed to get armss clk\n"); |
3e27996c UH |
59 | return PTR_ERR(armss_clk); |
60 | } | |
61 | ||
9291cf9d | 62 | pr_info("dbx500-cpufreq: Available frequencies:\n"); |
041526f9 SK |
63 | cpufreq_for_each_entry(pos, freq_table) |
64 | pr_info(" %d Mhz\n", pos->frequency / 1000); | |
3e27996c | 65 | |
edb10c11 | 66 | return cpufreq_register_driver(&dbx500_cpufreq_driver); |
b4689444 UH |
67 | } |
68 | ||
edb10c11 | 69 | static struct platform_driver dbx500_cpufreq_plat_driver = { |
b4689444 | 70 | .driver = { |
edb10c11 | 71 | .name = "cpufreq-ux500", |
b4689444 | 72 | }, |
edb10c11 | 73 | .probe = dbx500_cpufreq_probe, |
b4689444 UH |
74 | }; |
75 | ||
edb10c11 | 76 | static int __init dbx500_cpufreq_register(void) |
7c1a70e9 | 77 | { |
edb10c11 | 78 | return platform_driver_register(&dbx500_cpufreq_plat_driver); |
7c1a70e9 | 79 | } |
edb10c11 | 80 | device_initcall(dbx500_cpufreq_register); |
b4689444 UH |
81 | |
82 | MODULE_LICENSE("GPL v2"); | |
edb10c11 | 83 | MODULE_DESCRIPTION("cpufreq driver for DBX500"); |