projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9aeba629 KH |
1 | #ifndef _ACI_H_ |
| 2 | #define _ACI_H_ | |
| 1841f613 ML |
3 | |
| 4 | #define ACI_REG_COMMAND 0 /* write register offset */ | |
| 5 | #define ACI_REG_STATUS 1 /* read register offset */ | |
| 6 | #define ACI_REG_BUSY 2 /* busy register offset */ | |
| 7 | #define ACI_REG_RDS 2 /* PCM20: RDS register offset */ | |
| 8 | #define ACI_MINTIME 500 /* ACI time out limit */ | |
| 9 | ||
| 10 | #define ACI_SET_MUTE 0x0d | |
| 11 | #define ACI_SET_POWERAMP 0x0f | |
| 12 | #define ACI_SET_TUNERMUTE 0xa3 | |
| 13 | #define ACI_SET_TUNERMONO 0xa4 | |
| 14 | #define ACI_SET_IDE 0xd0 | |
| 15 | #define ACI_SET_WSS 0xd1 | |
| 16 | #define ACI_SET_SOLOMODE 0xd2 | |
| 17 | #define ACI_SET_PREAMP 0x03 | |
| 18 | #define ACI_GET_PREAMP 0x21 | |
| 19 | #define ACI_WRITE_TUNE 0xa7 | |
| 20 | #define ACI_READ_TUNERSTEREO 0xa8 | |
| 21 | #define ACI_READ_TUNERSTATION 0xa9 | |
| 22 | #define ACI_READ_VERSION 0xf1 | |
| 23 | #define ACI_READ_IDCODE 0xf2 | |
| 24 | #define ACI_INIT 0xff | |
| 25 | #define ACI_STATUS 0xf0 | |
| 26 | #define ACI_S_GENERAL 0x00 | |
| 27 | #define ACI_ERROR_OP 0xdf | |
| 28 | ||
| 29 | /* ACI Mixer */ | |
| 30 | ||
| 31 | /* These are the values for the right channel GET registers. | |
| 32 | Add an offset of 0x01 for the left channel register. | |
| 33 | (left=right+0x01) */ | |
| 34 | ||
| 35 | #define ACI_GET_MASTER 0x03 | |
| 36 | #define ACI_GET_MIC 0x05 | |
| 37 | #define ACI_GET_LINE 0x07 | |
| 38 | #define ACI_GET_CD 0x09 | |
| 39 | #define ACI_GET_SYNTH 0x0b | |
| 40 | #define ACI_GET_PCM 0x0d | |
| 41 | #define ACI_GET_LINE1 0x10 /* Radio on PCM20 */ | |
| 42 | #define ACI_GET_LINE2 0x12 | |
| 43 | ||
| 44 | #define ACI_GET_EQ1 0x22 /* from Bass ... */ | |
| 45 | #define ACI_GET_EQ2 0x24 | |
| 46 | #define ACI_GET_EQ3 0x26 | |
| 47 | #define ACI_GET_EQ4 0x28 | |
| 48 | #define ACI_GET_EQ5 0x2a | |
| 49 | #define ACI_GET_EQ6 0x2c | |
| 50 | #define ACI_GET_EQ7 0x2e /* ... to Treble */ | |
| 51 | ||
| 52 | /* And these are the values for the right channel SET registers. | |
| 53 | For left channel access you have to add an offset of 0x08. | |
| 54 | MASTER is an exception, which needs an offset of 0x01 */ | |
| 55 | ||
| 56 | #define ACI_SET_MASTER 0x00 | |
| 57 | #define ACI_SET_MIC 0x30 | |
| 58 | #define ACI_SET_LINE 0x31 | |
| 59 | #define ACI_SET_CD 0x34 | |
| 60 | #define ACI_SET_SYNTH 0x33 | |
| 61 | #define ACI_SET_PCM 0x32 | |
| 62 | #define ACI_SET_LINE1 0x35 /* Radio on PCM20 */ | |
| 63 | #define ACI_SET_LINE2 0x36 | |
| 64 | ||
| 65 | #define ACI_SET_EQ1 0x40 /* from Bass ... */ | |
| 66 | #define ACI_SET_EQ2 0x41 | |
| 67 | #define ACI_SET_EQ3 0x42 | |
| 68 | #define ACI_SET_EQ4 0x43 | |
| 69 | #define ACI_SET_EQ5 0x44 | |
| 70 | #define ACI_SET_EQ6 0x45 | |
| 71 | #define ACI_SET_EQ7 0x46 /* ... to Treble */ | |
| 72 | ||
| 9dc9120c KH |
73 | struct snd_miro_aci { |
| 74 | unsigned long aci_port; | |
| 75 | int aci_vendor; | |
| 76 | int aci_product; | |
| 77 | int aci_version; | |
| 78 | int aci_amp; | |
| 79 | int aci_preamp; | |
| 80 | int aci_solomode; | |
| 81 | ||
| 82 | struct mutex aci_mutex; | |
| 83 | }; | |
| 84 | ||
| 85 | int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3); | |
| 86 | ||
| 87 | struct snd_miro_aci *snd_aci_get_aci(void); | |
| 88 | ||
| 9aeba629 | 89 | #endif /* _ACI_H_ */ |
| 9dc9120c | 90 |