projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * linux/include/asm-arm/assembler.h | |
| 3 | * | |
| 4 | * Copyright (C) 1996-2000 Russell King | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This file contains arm architecture specific defines | |
| 11 | * for the different processors. | |
| 12 | * | |
| 13 | * Do not include any C declarations in this file - it is included by | |
| 14 | * assembler source. | |
| 15 | */ | |
| 16 | #ifndef __ASSEMBLY__ | |
| 17 | #error "Only include this from assembly code" | |
| 18 | #endif | |
| 19 | ||
| 20 | #include <asm/ptrace.h> | |
| 21 | ||
| 22 | /* | |
| 23 | * Endian independent macros for shifting bytes within registers. | |
| 24 | */ | |
| 25 | #ifndef __ARMEB__ | |
| 26 | #define pull lsr | |
| 27 | #define push lsl | |
| 28 | #define get_byte_0 lsl #0 | |
| 29 | #define get_byte_1 lsr #8 | |
| 30 | #define get_byte_2 lsr #16 | |
| 31 | #define get_byte_3 lsr #24 | |
| 32 | #define put_byte_0 lsl #0 | |
| 33 | #define put_byte_1 lsl #8 | |
| 34 | #define put_byte_2 lsl #16 | |
| 35 | #define put_byte_3 lsl #24 | |
| 36 | #else | |
| 37 | #define pull lsl | |
| 38 | #define push lsr | |
| 39 | #define get_byte_0 lsr #24 | |
| 40 | #define get_byte_1 lsr #16 | |
| 41 | #define get_byte_2 lsr #8 | |
| 42 | #define get_byte_3 lsl #0 | |
| 43 | #define put_byte_0 lsl #24 | |
| 44 | #define put_byte_1 lsl #16 | |
| 45 | #define put_byte_2 lsl #8 | |
| 46 | #define put_byte_3 lsl #0 | |
| 47 | #endif | |
| 48 | ||
| 49 | /* | |
| 50 | * Data preload for architectures that support it | |
| 51 | */ | |
| 52 | #if __LINUX_ARM_ARCH__ >= 5 | |
| 53 | #define PLD(code...) code | |
| 54 | #else | |
| 55 | #define PLD(code...) | |
| 56 | #endif | |
| 57 | ||
| 58 | #define MODE_USR USR_MODE | |
| 59 | #define MODE_FIQ FIQ_MODE | |
| 60 | #define MODE_IRQ IRQ_MODE | |
| 61 | #define MODE_SVC SVC_MODE | |
| 62 | ||
| 63 | #define DEFAULT_FIQ MODE_FIQ | |
| 64 | ||
| 65 | /* | |
| 66 | * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc}) | |
| 67 | */ | |
| 68 | #ifdef __STDC__ | |
| 69 | #define LOADREGS(cond, base, reglist...)\ | |
| 70 | ldm##cond base,reglist | |
| 71 | #else | |
| 72 | #define LOADREGS(cond, base, reglist...)\ | |
| 73 | ldm/**/cond base,reglist | |
| 74 | #endif | |
| 75 | ||
| 76 | /* | |
| 77 | * Build a return instruction for this processor type. | |
| 78 | */ | |
| 79 | #define RETINSTR(instr, regs...)\ | |
| 80 | instr regs | |
| 81 | ||
| 82 | /* | |
| 83 | * Save the current IRQ state and disable IRQs. Note that this macro | |
| 84 | * assumes FIQs are enabled, and that the processor is in SVC mode. | |
| 85 | */ | |
| 86 | .macro save_and_disable_irqs, oldcpsr, temp | |
| 87 | mrs \oldcpsr, cpsr | |
| 88 | mov \temp, #PSR_I_BIT | MODE_SVC | |
| 89 | msr cpsr_c, \temp | |
| 90 | .endm | |
| 91 | ||
| 92 | /* | |
| 93 | * Restore interrupt state previously stored in a register. We don't | |
| 94 | * guarantee that this will preserve the flags. | |
| 95 | */ | |
| 96 | .macro restore_irqs, oldcpsr | |
| 97 | msr cpsr_c, \oldcpsr | |
| 98 | .endm | |
| 99 | ||
| 100 | /* | |
| 101 | * These two are used to save LR/restore PC over a user-based access. | |
| 102 | * The old 26-bit architecture requires that we do. On 32-bit | |
| 103 | * architecture, we can safely ignore this requirement. | |
| 104 | */ | |
| 105 | .macro save_lr | |
| 106 | .endm | |
| 107 | ||
| 108 | .macro restore_pc | |
| 109 | mov pc, lr | |
| 110 | .endm | |
| 111 | ||
| 112 | #define USER(x...) \ | |
| 113 | 9999: x; \ | |
| 114 | .section __ex_table,"a"; \ | |
| 115 | .align 3; \ | |
| 116 | .long 9999b,9001f; \ | |
| 117 | .previous |