[linux.git] / drivers / edac / edac_pci.h

/*
 * Defines, structures, APIs for edac_pci and edac_pci_sysfs
 *
 * (C) 2007 Linux Networx (http://lnxi.com)
 * This file may be distributed under the terms of the
 * GNU General Public License.
 *
 * Written by Thayne Harbaugh
 * Based on work by Dan Hollis <goemon at anime dot net> and others.
 *	http://www.anime.net/~goemon/linux-ecc/
 *
 * NMI handling support added by
 *     Dave Peterson <[email protected]> <[email protected]>
 *
 * Refactored for multi-source files:
 *	Doug Thompson <[email protected]>
 *
 * Please look at Documentation/driver-api/edac.rst for more info about
 * EDAC core structs and functions.
 */

#ifndef _EDAC_PCI_H_
#define _EDAC_PCI_H_

#include <linux/device.h>
#include <linux/edac.h>
#include <linux/kobject.h>
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/workqueue.h>

#ifdef CONFIG_PCI

struct edac_pci_counter {
	atomic_t pe_count;
	atomic_t npe_count;
};

/*
 * Abstract edac_pci control info structure
 *
 */
struct edac_pci_ctl_info {
	/* for global list of edac_pci_ctl_info structs */
	struct list_head link;

	int pci_idx;

	/* the internal state of this controller instance */
	int op_state;
	/* work struct for this instance */
	struct delayed_work work;

	/* pointer to edac polling checking routine:
	 *      If NOT NULL: points to polling check routine
	 *      If NULL: Then assumes INTERRUPT operation, where
	 *              MC driver will receive events
	 */
	void (*edac_check) (struct edac_pci_ctl_info * edac_dev);

	struct device *dev;	/* pointer to device structure */

	const char *mod_name;	/* module name */
	const char *ctl_name;	/* edac controller  name */
	const char *dev_name;	/* pci/platform/etc... name */

	void *pvt_info;		/* pointer to 'private driver' info */

	unsigned long start_time;	/* edac_pci load start time (jiffies) */

	/* sysfs top name under 'edac' directory
	 * and instance name:
	 *      cpu/cpu0/...
	 *      cpu/cpu1/...
	 *      cpu/cpu2/...
	 *      ...
	 */
	char name[EDAC_DEVICE_NAME_LEN + 1];

	/* Event counters for the this whole EDAC Device */
	struct edac_pci_counter counters;

	/* edac sysfs device control for the 'name'
	 * device this structure controls
	 */
	struct kobject kobj;
};

#define to_edac_pci_ctl_work(w) \
		container_of(w, struct edac_pci_ctl_info,work)

/* write all or some bits in a byte-register*/
static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
				   u8 mask)
{
	if (mask != 0xff) {
		u8 buf;

		pci_read_config_byte(pdev, offset, &buf);
		value &= mask;
		buf &= ~mask;
		value |= buf;
	}

	pci_write_config_byte(pdev, offset, value);
}

/* write all or some bits in a word-register*/
static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
				    u16 value, u16 mask)
{
	if (mask != 0xffff) {
		u16 buf;

		pci_read_config_word(pdev, offset, &buf);
		value &= mask;
		buf &= ~mask;
		value |= buf;
	}

	pci_write_config_word(pdev, offset, value);
}

/*
 * pci_write_bits32
 *
 * edac local routine to do pci_write_config_dword, but adds
 * a mask parameter. If mask is all ones, ignore the mask.
 * Otherwise utilize the mask to isolate specified bits
 *
 * write all or some bits in a dword-register
 */
static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
				    u32 value, u32 mask)
{
	if (mask != 0xffffffff) {
		u32 buf;

		pci_read_config_dword(pdev, offset, &buf);
		value &= mask;
		buf &= ~mask;
		value |= buf;
	}

	pci_write_config_dword(pdev, offset, value);
}

#endif				/* CONFIG_PCI */

/*
 * edac_pci APIs
 */

/**
 * edac_pci_alloc_ctl_info:
 *	The alloc() function for the 'edac_pci' control info
 *	structure.
 *
 * @sz_pvt: size of the private info at struct &edac_pci_ctl_info
 * @edac_pci_name: name of the PCI device
 *
 * The chip driver will allocate one of these for each
 * edac_pci it is going to control/register with the EDAC CORE.
 *
 * Returns: a pointer to struct &edac_pci_ctl_info on success; %NULL otherwise.
 */
extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
				const char *edac_pci_name);

/**
 * edac_pci_free_ctl_info():
 *	Last action on the pci control structure.
 *
 * @pci: pointer to struct &edac_pci_ctl_info
 *
 * Calls the remove sysfs information, which will unregister
 * this control struct's kobj. When that kobj's ref count
 * goes to zero, its release function will be call and then
 * kfree() the memory.
 */
extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);

/**
 * edac_pci_alloc_index: Allocate a unique PCI index number
 *
 * Returns:
 *      allocated index number
 *
 */
extern int edac_pci_alloc_index(void);

/**
 * edac_pci_add_device(): Insert the 'edac_dev' structure into the
 *	edac_pci global list and create sysfs entries associated with
 *	edac_pci structure.
 *
 * @pci: pointer to the edac_device structure to be added to the list
 * @edac_idx: A unique numeric identifier to be assigned to the
 *	'edac_pci' structure.
 *
 * Returns:
 *	0 on Success, or an error code on failure
 */
extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);

/**
 * edac_pci_del_device()
 *	Remove sysfs entries for specified edac_pci structure and
 *	then remove edac_pci structure from global list
 *
 * @dev:
 *	Pointer to 'struct device' representing edac_pci structure
 *	to remove
 *
 * Returns:
 *	Pointer to removed edac_pci structure,
 *	or %NULL if device not found
 */
extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);

/**
 * edac_pci_create_generic_ctl()
 *	A generic constructor for a PCI parity polling device
 *	Some systems have more than one domain of PCI busses.
 *	For systems with one domain, then this API will
 *	provide for a generic poller.
 *
 * @dev: pointer to struct &device;
 * @mod_name: name of the PCI device
 *
 * This routine calls the edac_pci_alloc_ctl_info() for
 * the generic device, with default values
 *
 * Returns: Pointer to struct &edac_pci_ctl_info on success, %NULL on
 *	failure.
 */
extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
				struct device *dev,
				const char *mod_name);

/**
 * edac_pci_release_generic_ctl
 *	The release function of a generic EDAC PCI polling device
 *
 * @pci: pointer to struct &edac_pci_ctl_info
 */
extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);

/**
 * edac_pci_create_sysfs
 *	Create the controls/attributes for the specified EDAC PCI device
 *
 * @pci: pointer to struct &edac_pci_ctl_info
 */
extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);

/**
 * edac_pci_remove_sysfs()
 *	remove the controls and attributes for this EDAC PCI device
 *
 * @pci: pointer to struct &edac_pci_ctl_info
 */
extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);

#endif
Commit	Line	Data
0b892c71 MCC	1	/*
	2	* Defines, structures, APIs for edac_pci and edac_pci_sysfs
	3	*
	4	* (C) 2007 Linux Networx (http://lnxi.com)
	5	* This file may be distributed under the terms of the
	6	* GNU General Public License.
	7	*
	8	* Written by Thayne Harbaugh
	9	* Based on work by Dan Hollis <goemon at anime dot net> and others.
	10	* http://www.anime.net/~goemon/linux-ecc/
	11	*
	12	* NMI handling support added by
	13	* Dave Peterson <[email protected]> <[email protected]>
	14	*
	15	* Refactored for multi-source files:
	16	* Doug Thompson <[email protected]>
	17	*
	18	* Please look at Documentation/driver-api/edac.rst for more info about
	19	* EDAC core structs and functions.
	20	*/
	21
	22	#ifndef _EDAC_PCI_H_
	23	#define _EDAC_PCI_H_
	24
0b892c71 MCC	25	#include <linux/device.h>
	26	#include <linux/edac.h>
	27	#include <linux/kobject.h>
	28	#include <linux/list.h>
	29	#include <linux/pci.h>
	30	#include <linux/types.h>
	31	#include <linux/workqueue.h>
	32
	33	#ifdef CONFIG_PCI
	34
	35	struct edac_pci_counter {
	36	atomic_t pe_count;
	37	atomic_t npe_count;
	38	};
	39
	40	/*
	41	* Abstract edac_pci control info structure
	42	*
	43	*/
	44	struct edac_pci_ctl_info {
	45	/* for global list of edac_pci_ctl_info structs */
	46	struct list_head link;
	47
	48	int pci_idx;
	49
0b892c71 MCC	50	/* the internal state of this controller instance */
	51	int op_state;
	52	/* work struct for this instance */
	53	struct delayed_work work;
	54
	55	/* pointer to edac polling checking routine:
	56	* If NOT NULL: points to polling check routine
	57	* If NULL: Then assumes INTERRUPT operation, where
	58	* MC driver will receive events
	59	*/
	60	void (edac_check) (struct edac_pci_ctl_info edac_dev);
	61
	62	struct device dev; / pointer to device structure */
	63
	64	const char mod_name; / module name */
	65	const char ctl_name; / edac controller name */
	66	const char dev_name; / pci/platform/etc... name */
	67
	68	void pvt_info; / pointer to 'private driver' info */
	69
	70	unsigned long start_time; /* edac_pci load start time (jiffies) */
	71
0b892c71 MCC	72	/* sysfs top name under 'edac' directory
	73	* and instance name:
	74	* cpu/cpu0/...
	75	* cpu/cpu1/...
	76	* cpu/cpu2/...
	77	* ...
	78	*/
	79	char name[EDAC_DEVICE_NAME_LEN + 1];
	80
	81	/* Event counters for the this whole EDAC Device */
	82	struct edac_pci_counter counters;
	83
	84	/* edac sysfs device control for the 'name'
	85	* device this structure controls
	86	*/
	87	struct kobject kobj;
	88	};
	89
	90	#define to_edac_pci_ctl_work(w) \
	91	container_of(w, struct edac_pci_ctl_info,work)
	92
	93	/* write all or some bits in a byte-register*/
	94	static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
	95	u8 mask)
	96	{
	97	if (mask != 0xff) {
	98	u8 buf;
	99
	100	pci_read_config_byte(pdev, offset, &buf);
	101	value &= mask;
	102	buf &= ~mask;
	103	value \|= buf;
	104	}
	105
	106	pci_write_config_byte(pdev, offset, value);
	107	}
	108
	109	/* write all or some bits in a word-register*/
	110	static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
	111	u16 value, u16 mask)
	112	{
	113	if (mask != 0xffff) {
	114	u16 buf;
	115
	116	pci_read_config_word(pdev, offset, &buf);
	117	value &= mask;
	118	buf &= ~mask;
	119	value \|= buf;
	120	}
	121
	122	pci_write_config_word(pdev, offset, value);
	123	}
	124
	125	/*
	126	* pci_write_bits32
	127	*
	128	* edac local routine to do pci_write_config_dword, but adds
	129	* a mask parameter. If mask is all ones, ignore the mask.
	130	* Otherwise utilize the mask to isolate specified bits
	131	*
	132	* write all or some bits in a dword-register
	133	*/
	134	static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
	135	u32 value, u32 mask)
136	{
137	if (mask != 0xffffffff) {
138	u32 buf;
139
140	pci_read_config_dword(pdev, offset, &buf);
141	value &= mask;
142	buf &= ~mask;
143	value \|= buf;
144	}
145
146	pci_write_config_dword(pdev, offset, value);
147	}
148
149	#endif /* CONFIG_PCI */
150
fdaf0b35 MCC	151	/*
	152	* edac_pci APIs
	153	*/
	154
	155	/**
	156	* edac_pci_alloc_ctl_info:
	157	* The alloc() function for the 'edac_pci' control info
	158	* structure.
	159	*
	160	* @sz_pvt: size of the private info at struct &edac_pci_ctl_info
	161	* @edac_pci_name: name of the PCI device
	162	*
	163	* The chip driver will allocate one of these for each
	164	* edac_pci it is going to control/register with the EDAC CORE.
	165	*
	166	* Returns: a pointer to struct &edac_pci_ctl_info on success; %NULL otherwise.
	167	*/
0b892c71 MCC	168	extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
	169	const char *edac_pci_name);
	170
fdaf0b35 MCC	171	/**
	172	* edac_pci_free_ctl_info():
	173	* Last action on the pci control structure.
	174	*
	175	* @pci: pointer to struct &edac_pci_ctl_info
	176	*
	177	* Calls the remove sysfs information, which will unregister
	178	* this control struct's kobj. When that kobj's ref count
	179	* goes to zero, its release function will be call and then
	180	* kfree() the memory.
	181	*/
0b892c71 MCC	182	extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
0b892c71 MCC	183
fdaf0b35 MCC	184	/**
	185	* edac_pci_alloc_index: Allocate a unique PCI index number
	186	*
	187	* Returns:
	188	* allocated index number
	189	*
	190	*/
0b892c71	191	extern int edac_pci_alloc_index(void);
fdaf0b35 MCC	192
	193	/**
	194	* edac_pci_add_device(): Insert the 'edac_dev' structure into the
	195	* edac_pci global list and create sysfs entries associated with
	196	* edac_pci structure.
	197	*
	198	* @pci: pointer to the edac_device structure to be added to the list
	199	* @edac_idx: A unique numeric identifier to be assigned to the
	200	* 'edac_pci' structure.
	201	*
	202	* Returns:
	203	* 0 on Success, or an error code on failure
	204	*/
0b892c71	205	extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
fdaf0b35 MCC	206
	207	/**
	208	* edac_pci_del_device()
	209	* Remove sysfs entries for specified edac_pci structure and
	210	* then remove edac_pci structure from global list
	211	*
	212	* @dev:
	213	* Pointer to 'struct device' representing edac_pci structure
	214	* to remove
	215	*
	216	* Returns:
	217	* Pointer to removed edac_pci structure,
	218	* or %NULL if device not found
	219	*/
0b892c71 MCC	220	extern struct edac_pci_ctl_info edac_pci_del_device(struct device dev);
0b892c71 MCC	221
fdaf0b35 MCC	222	/**
	223	* edac_pci_create_generic_ctl()
	224	* A generic constructor for a PCI parity polling device
	225	* Some systems have more than one domain of PCI busses.
	226	* For systems with one domain, then this API will
	227	* provide for a generic poller.
	228	*
	229	* @dev: pointer to struct &device;
	230	* @mod_name: name of the PCI device
	231	*
	232	* This routine calls the edac_pci_alloc_ctl_info() for
	233	* the generic device, with default values
	234	*
	235	* Returns: Pointer to struct &edac_pci_ctl_info on success, %NULL on
	236	* failure.
	237	*/
0b892c71 MCC	238	extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
	239	struct device *dev,
	240	const char *mod_name);
	241
fdaf0b35 MCC	242	/**
	243	* edac_pci_release_generic_ctl
	244	* The release function of a generic EDAC PCI polling device
	245	*
	246	* @pci: pointer to struct &edac_pci_ctl_info
	247	*/
0b892c71	248	extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
fdaf0b35 MCC	249
	250	/**
	251	* edac_pci_create_sysfs
	252	* Create the controls/attributes for the specified EDAC PCI device
	253	*
	254	* @pci: pointer to struct &edac_pci_ctl_info
	255	*/
0b892c71	256	extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
fdaf0b35 MCC	257
	258	/**
	259	* edac_pci_remove_sysfs()
	260	* remove the controls and attributes for this EDAC PCI device
	261	*
	262	* @pci: pointer to struct &edac_pci_ctl_info
	263	*/
0b892c71 MCC	264	extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
	265
	266	#endif