projects / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| d4c41139 KG |
1 | #ifndef GRETH_H |
| 2 | #define GRETH_H | |
| 3 | ||
| 4 | #include <linux/phy.h> | |
| 5 | ||
| 6 | /* Register bits and masks */ | |
| 7 | #define GRETH_RESET 0x40 | |
| 8 | #define GRETH_MII_BUSY 0x8 | |
| 9 | #define GRETH_MII_NVALID 0x10 | |
| 10 | ||
| 11 | #define GRETH_CTRL_FD 0x10 | |
| 12 | #define GRETH_CTRL_PR 0x20 | |
| 13 | #define GRETH_CTRL_SP 0x80 | |
| 14 | #define GRETH_CTRL_GB 0x100 | |
| 15 | #define GRETH_CTRL_PSTATIEN 0x400 | |
| 16 | #define GRETH_CTRL_MCEN 0x800 | |
| 17 | #define GRETH_CTRL_DISDUPLEX 0x1000 | |
| 18 | #define GRETH_STATUS_PHYSTAT 0x100 | |
| 19 | ||
| 20 | #define GRETH_BD_EN 0x800 | |
| 21 | #define GRETH_BD_WR 0x1000 | |
| 22 | #define GRETH_BD_IE 0x2000 | |
| 23 | #define GRETH_BD_LEN 0x7FF | |
| 24 | ||
| 25 | #define GRETH_TXEN 0x1 | |
| 1ca23434 | 26 | #define GRETH_INT_TE 0x2 |
| d4c41139 KG |
27 | #define GRETH_INT_TX 0x8 |
| 28 | #define GRETH_TXI 0x4 | |
| 29 | #define GRETH_TXBD_STATUS 0x0001C000 | |
| 30 | #define GRETH_TXBD_MORE 0x20000 | |
| 31 | #define GRETH_TXBD_IPCS 0x40000 | |
| 32 | #define GRETH_TXBD_TCPCS 0x80000 | |
| 33 | #define GRETH_TXBD_UDPCS 0x100000 | |
| 34 | #define GRETH_TXBD_CSALL (GRETH_TXBD_IPCS | GRETH_TXBD_TCPCS | GRETH_TXBD_UDPCS) | |
| 35 | #define GRETH_TXBD_ERR_LC 0x10000 | |
| 36 | #define GRETH_TXBD_ERR_UE 0x4000 | |
| 37 | #define GRETH_TXBD_ERR_AL 0x8000 | |
| 38 | ||
| 1ca23434 | 39 | #define GRETH_INT_RE 0x1 |
| d4c41139 KG |
40 | #define GRETH_INT_RX 0x4 |
| 41 | #define GRETH_RXEN 0x2 | |
| 42 | #define GRETH_RXI 0x8 | |
| 43 | #define GRETH_RXBD_STATUS 0xFFFFC000 | |
| 44 | #define GRETH_RXBD_ERR_AE 0x4000 | |
| 45 | #define GRETH_RXBD_ERR_FT 0x8000 | |
| 46 | #define GRETH_RXBD_ERR_CRC 0x10000 | |
| 47 | #define GRETH_RXBD_ERR_OE 0x20000 | |
| 48 | #define GRETH_RXBD_ERR_LE 0x40000 | |
| 49 | #define GRETH_RXBD_IP 0x80000 | |
| 50 | #define GRETH_RXBD_IP_CSERR 0x100000 | |
| 51 | #define GRETH_RXBD_UDP 0x200000 | |
| 52 | #define GRETH_RXBD_UDP_CSERR 0x400000 | |
| 53 | #define GRETH_RXBD_TCP 0x800000 | |
| 54 | #define GRETH_RXBD_TCP_CSERR 0x1000000 | |
| 55 | #define GRETH_RXBD_IP_FRAG 0x2000000 | |
| 56 | #define GRETH_RXBD_MCAST 0x4000000 | |
| 57 | ||
| 58 | /* Descriptor parameters */ | |
| 59 | #define GRETH_TXBD_NUM 128 | |
| 60 | #define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) | |
| 61 | #define GRETH_TX_BUF_SIZE 2048 | |
| 62 | #define GRETH_RXBD_NUM 128 | |
| 63 | #define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) | |
| 64 | #define GRETH_RX_BUF_SIZE 2048 | |
| 65 | ||
| 66 | /* Buffers per page */ | |
| 67 | #define GRETH_RX_BUF_PPGAE (PAGE_SIZE/GRETH_RX_BUF_SIZE) | |
| 68 | #define GRETH_TX_BUF_PPGAE (PAGE_SIZE/GRETH_TX_BUF_SIZE) | |
| 69 | ||
| 70 | /* How many pages are needed for buffers */ | |
| 71 | #define GRETH_RX_BUF_PAGE_NUM (GRETH_RXBD_NUM/GRETH_RX_BUF_PPGAE) | |
| 72 | #define GRETH_TX_BUF_PAGE_NUM (GRETH_TXBD_NUM/GRETH_TX_BUF_PPGAE) | |
| 73 | ||
| 74 | /* Buffer size. | |
| 75 | * Gbit MAC uses tagged maximum frame size which is 1518 excluding CRC. | |
| 76 | * Set to 1520 to make all buffers word aligned for non-gbit MAC. | |
| 77 | */ | |
| 78 | #define MAX_FRAME_SIZE 1520 | |
| 79 | ||
| d4c41139 KG |
80 | /* GRETH APB registers */ |
| 81 | struct greth_regs { | |
| 82 | u32 control; | |
| 83 | u32 status; | |
| 84 | u32 esa_msb; | |
| 85 | u32 esa_lsb; | |
| 86 | u32 mdio; | |
| 87 | u32 tx_desc_p; | |
| 88 | u32 rx_desc_p; | |
| 89 | u32 edclip; | |
| 90 | u32 hash_msb; | |
| 91 | u32 hash_lsb; | |
| 92 | }; | |
| 93 | ||
| 94 | /* GRETH buffer descriptor */ | |
| 95 | struct greth_bd { | |
| 96 | u32 stat; | |
| 97 | u32 addr; | |
| 98 | }; | |
| 99 | ||
| 100 | struct greth_private { | |
| 101 | struct sk_buff *rx_skbuff[GRETH_RXBD_NUM]; | |
| 102 | struct sk_buff *tx_skbuff[GRETH_TXBD_NUM]; | |
| 103 | ||
| 104 | unsigned char *tx_bufs[GRETH_TXBD_NUM]; | |
| 105 | unsigned char *rx_bufs[GRETH_RXBD_NUM]; | |
| 106 | ||
| 107 | u16 tx_next; | |
| 108 | u16 tx_last; | |
| 109 | u16 tx_free; | |
| 110 | u16 rx_cur; | |
| 111 | ||
| 112 | struct greth_regs *regs; /* Address of controller registers. */ | |
| 113 | struct greth_bd *rx_bd_base; /* Address of Rx BDs. */ | |
| 114 | struct greth_bd *tx_bd_base; /* Address of Tx BDs. */ | |
| 115 | dma_addr_t rx_bd_base_phys; | |
| 116 | dma_addr_t tx_bd_base_phys; | |
| 117 | ||
| 118 | int irq; | |
| 119 | ||
| 2dc11581 | 120 | struct device *dev; /* Pointer to platform_device->dev */ |
| d4c41139 KG |
121 | struct net_device *netdev; |
| 122 | struct napi_struct napi; | |
| 123 | spinlock_t devlock; | |
| 124 | ||
| 125 | struct phy_device *phy; | |
| 126 | struct mii_bus *mdio; | |
| 127 | int mdio_irqs[PHY_MAX_ADDR]; | |
| 128 | unsigned int link; | |
| 129 | unsigned int speed; | |
| 130 | unsigned int duplex; | |
| 131 | ||
| 132 | u32 msg_enable; | |
| d4c41139 KG |
133 | |
| 134 | u8 phyaddr; | |
| 135 | u8 multicast; | |
| 136 | u8 gbit_mac; | |
| 137 | u8 mdio_int_en; | |
| 138 | u8 edcl; | |
| 139 | }; | |
| 140 | ||
| 141 | #endif |