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xen/mmu: use extend_args for more mmuext updates
[linux.git] / arch / x86 / xen / mmu.c
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3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <[email protected]>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
d2cb2145 45#include <linux/vmalloc.h>
44408ad7 46#include <linux/module.h>
5a0e3ad6 47#include <linux/gfp.h>
a9ce6bc1 48#include <linux/memblock.h>
2222e71b 49#include <linux/seq_file.h>
3b827c1b 50
84708807
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51#include <trace/events/xen.h>
52
3b827c1b
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53#include <asm/pgtable.h>
54#include <asm/tlbflush.h>
5deb30d1 55#include <asm/fixmap.h>
3b827c1b 56#include <asm/mmu_context.h>
319f3ba5 57#include <asm/setup.h>
f4f97b3e 58#include <asm/paravirt.h>
7347b408 59#include <asm/e820.h>
cbcd79c2 60#include <asm/linkage.h>
08bbc9da 61#include <asm/page.h>
fef5ba79 62#include <asm/init.h>
41f2e477 63#include <asm/pat.h>
900cba88 64#include <asm/smp.h>
3b827c1b
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65
66#include <asm/xen/hypercall.h>
f4f97b3e 67#include <asm/xen/hypervisor.h>
3b827c1b 68
c0011dbf 69#include <xen/xen.h>
3b827c1b
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70#include <xen/page.h>
71#include <xen/interface/xen.h>
59151001 72#include <xen/interface/hvm/hvm_op.h>
319f3ba5 73#include <xen/interface/version.h>
c0011dbf 74#include <xen/interface/memory.h>
319f3ba5 75#include <xen/hvc-console.h>
3b827c1b 76
f4f97b3e 77#include "multicalls.h"
3b827c1b 78#include "mmu.h"
994025ca
JF
79#include "debugfs.h"
80
19001c8c
AN
81/*
82 * Protects atomic reservation decrease/increase against concurrent increases.
06f521d5 83 * Also protects non-atomic updates of current_pages and balloon lists.
19001c8c
AN
84 */
85DEFINE_SPINLOCK(xen_reservation_lock);
86
319f3ba5
JF
87/*
88 * Identity map, in addition to plain kernel map. This needs to be
89 * large enough to allocate page table pages to allocate the rest.
90 * Each page can map 2MB.
91 */
764f0138
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92#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
93static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
319f3ba5
JF
94
95#ifdef CONFIG_X86_64
96/* l3 pud for userspace vsyscall mapping */
97static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
98#endif /* CONFIG_X86_64 */
99
100/*
101 * Note about cr3 (pagetable base) values:
102 *
103 * xen_cr3 contains the current logical cr3 value; it contains the
104 * last set cr3. This may not be the current effective cr3, because
105 * its update may be being lazily deferred. However, a vcpu looking
106 * at its own cr3 can use this value knowing that it everything will
107 * be self-consistent.
108 *
109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
110 * hypercall to set the vcpu cr3 is complete (so it may be a little
111 * out of date, but it will never be set early). If one vcpu is
112 * looking at another vcpu's cr3 value, it should use this variable.
113 */
114DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
115DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
116
117
d6182fbf
JF
118/*
119 * Just beyond the highest usermode address. STACK_TOP_MAX has a
120 * redzone above it, so round it up to a PGD boundary.
121 */
122#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
123
9976b39b
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124unsigned long arbitrary_virt_to_mfn(void *vaddr)
125{
126 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
127
128 return PFN_DOWN(maddr.maddr);
129}
130
ce803e70 131xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 132{
ce803e70 133 unsigned long address = (unsigned long)vaddr;
da7bfc50 134 unsigned int level;
9f32d21c
CL
135 pte_t *pte;
136 unsigned offset;
3b827c1b 137
9f32d21c
CL
138 /*
139 * if the PFN is in the linear mapped vaddr range, we can just use
140 * the (quick) virt_to_machine() p2m lookup
141 */
142 if (virt_addr_valid(vaddr))
143 return virt_to_machine(vaddr);
144
145 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 146
9f32d21c
CL
147 pte = lookup_address(address, &level);
148 BUG_ON(pte == NULL);
149 offset = address & ~PAGE_MASK;
ebd879e3 150 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b 151}
de23be5f 152EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
3b827c1b
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153
154void make_lowmem_page_readonly(void *vaddr)
155{
156 pte_t *pte, ptev;
157 unsigned long address = (unsigned long)vaddr;
da7bfc50 158 unsigned int level;
3b827c1b 159
f0646e43 160 pte = lookup_address(address, &level);
fef5ba79
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161 if (pte == NULL)
162 return; /* vaddr missing */
3b827c1b
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163
164 ptev = pte_wrprotect(*pte);
165
166 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
167 BUG();
168}
169
170void make_lowmem_page_readwrite(void *vaddr)
171{
172 pte_t *pte, ptev;
173 unsigned long address = (unsigned long)vaddr;
da7bfc50 174 unsigned int level;
3b827c1b 175
f0646e43 176 pte = lookup_address(address, &level);
fef5ba79
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177 if (pte == NULL)
178 return; /* vaddr missing */
3b827c1b
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179
180 ptev = pte_mkwrite(*pte);
181
182 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
183 BUG();
184}
185
186
7708ad64 187static bool xen_page_pinned(void *ptr)
e2426cf8
JF
188{
189 struct page *page = virt_to_page(ptr);
190
191 return PagePinned(page);
192}
193
eba3ff8b 194void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
c0011dbf
JF
195{
196 struct multicall_space mcs;
197 struct mmu_update *u;
198
84708807
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199 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
200
c0011dbf
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201 mcs = xen_mc_entry(sizeof(*u));
202 u = mcs.args;
203
204 /* ptep might be kmapped when using 32-bit HIGHPTE */
d5108316 205 u->ptr = virt_to_machine(ptep).maddr;
c0011dbf
JF
206 u->val = pte_val_ma(pteval);
207
eba3ff8b 208 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
c0011dbf
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209
210 xen_mc_issue(PARAVIRT_LAZY_MMU);
211}
eba3ff8b
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212EXPORT_SYMBOL_GPL(xen_set_domain_pte);
213
7708ad64 214static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 215{
d66bf8fc
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216 struct multicall_space mcs;
217 struct mmu_update *u;
3b827c1b 218
400d3494
JF
219 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
220
994025ca 221 if (mcs.mc != NULL) {
400d3494 222 mcs.mc->args[1]++;
994025ca 223 } else {
400d3494
JF
224 mcs = __xen_mc_entry(sizeof(*u));
225 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
226 }
d66bf8fc 227
d66bf8fc 228 u = mcs.args;
400d3494
JF
229 *u = *update;
230}
231
dcf7435c
JF
232static void xen_extend_mmuext_op(const struct mmuext_op *op)
233{
234 struct multicall_space mcs;
235 struct mmuext_op *u;
236
237 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
238
239 if (mcs.mc != NULL) {
240 mcs.mc->args[1]++;
241 } else {
242 mcs = __xen_mc_entry(sizeof(*u));
243 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
244 }
245
246 u = mcs.args;
247 *u = *op;
248}
249
4c13629f 250static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
400d3494
JF
251{
252 struct mmu_update u;
253
254 preempt_disable();
255
256 xen_mc_batch();
257
ce803e70
JF
258 /* ptr may be ioremapped for 64-bit pagetable setup */
259 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 260 u.val = pmd_val_ma(val);
7708ad64 261 xen_extend_mmu_update(&u);
d66bf8fc
JF
262
263 xen_mc_issue(PARAVIRT_LAZY_MMU);
264
265 preempt_enable();
3b827c1b
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266}
267
4c13629f 268static void xen_set_pmd(pmd_t *ptr, pmd_t val)
e2426cf8 269{
84708807
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270 trace_xen_mmu_set_pmd(ptr, val);
271
e2426cf8
JF
272 /* If page is not pinned, we can just update the entry
273 directly */
7708ad64 274 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
275 *ptr = val;
276 return;
277 }
278
279 xen_set_pmd_hyper(ptr, val);
280}
281
3b827c1b
JF
282/*
283 * Associate a virtual page frame with a given physical page frame
284 * and protection flags for that frame.
285 */
286void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
287{
836fe2f2 288 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
289}
290
4a35c13c 291static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
3b827c1b 292{
4a35c13c 293 struct mmu_update u;
c0011dbf 294
4a35c13c
JF
295 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
296 return false;
994025ca 297
4a35c13c 298 xen_mc_batch();
d66bf8fc 299
4a35c13c
JF
300 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
301 u.val = pte_val_ma(pteval);
302 xen_extend_mmu_update(&u);
a99ac5e8 303
4a35c13c 304 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 305
4a35c13c
JF
306 return true;
307}
308
84708807 309static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
4a35c13c 310{
4a35c13c 311 if (!xen_batched_set_pte(ptep, pteval))
a99ac5e8 312 native_set_pte(ptep, pteval);
3b827c1b
JF
313}
314
84708807
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315static void xen_set_pte(pte_t *ptep, pte_t pteval)
316{
317 trace_xen_mmu_set_pte(ptep, pteval);
318 __xen_set_pte(ptep, pteval);
319}
320
4c13629f 321static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
4a35c13c
JF
322 pte_t *ptep, pte_t pteval)
323{
84708807
JF
324 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
325 __xen_set_pte(ptep, pteval);
3b827c1b
JF
326}
327
f63c2f24
T
328pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
329 unsigned long addr, pte_t *ptep)
947a69c9 330{
e57778a1 331 /* Just return the pte as-is. We preserve the bits on commit */
84708807 332 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
e57778a1
JF
333 return *ptep;
334}
335
336void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
337 pte_t *ptep, pte_t pte)
338{
400d3494 339 struct mmu_update u;
e57778a1 340
84708807 341 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
400d3494 342 xen_mc_batch();
947a69c9 343
d5108316 344 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 345 u.val = pte_val_ma(pte);
7708ad64 346 xen_extend_mmu_update(&u);
947a69c9 347
e57778a1 348 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
349}
350
ebb9cfe2
JF
351/* Assume pteval_t is equivalent to all the other *val_t types. */
352static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 353{
ebb9cfe2 354 if (val & _PAGE_PRESENT) {
59438c9f 355 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 356 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 357 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 358 }
947a69c9 359
ebb9cfe2 360 return val;
947a69c9
JF
361}
362
ebb9cfe2 363static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 364{
ebb9cfe2 365 if (val & _PAGE_PRESENT) {
59438c9f 366 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 367 pteval_t flags = val & PTE_FLAGS_MASK;
fb38923e 368 unsigned long mfn;
cfd8951e 369
fb38923e
KRW
370 if (!xen_feature(XENFEAT_auto_translated_physmap))
371 mfn = get_phys_to_machine(pfn);
372 else
373 mfn = pfn;
cfd8951e
JF
374 /*
375 * If there's no mfn for the pfn, then just create an
376 * empty non-present pte. Unfortunately this loses
377 * information about the original pfn, so
378 * pte_mfn_to_pfn is asymmetric.
379 */
380 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
381 mfn = 0;
382 flags = 0;
fb38923e
KRW
383 } else {
384 /*
385 * Paramount to do this test _after_ the
386 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
387 * IDENTITY_FRAME_BIT resolves to true.
388 */
389 mfn &= ~FOREIGN_FRAME_BIT;
390 if (mfn & IDENTITY_FRAME_BIT) {
391 mfn &= ~IDENTITY_FRAME_BIT;
392 flags |= _PAGE_IOMAP;
393 }
cfd8951e 394 }
cfd8951e 395 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
947a69c9
JF
396 }
397
ebb9cfe2 398 return val;
947a69c9
JF
399}
400
c0011dbf
JF
401static pteval_t iomap_pte(pteval_t val)
402{
403 if (val & _PAGE_PRESENT) {
404 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
405 pteval_t flags = val & PTE_FLAGS_MASK;
406
407 /* We assume the pte frame number is a MFN, so
408 just use it as-is. */
409 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
410 }
411
412 return val;
413}
414
4c13629f 415static pteval_t xen_pte_val(pte_t pte)
947a69c9 416{
41f2e477 417 pteval_t pteval = pte.pte;
c0011dbf 418
41f2e477
JF
419 /* If this is a WC pte, convert back from Xen WC to Linux WC */
420 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
421 WARN_ON(!pat_enabled);
422 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
423 }
c0011dbf 424
41f2e477
JF
425 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
426 return pteval;
427
428 return pte_mfn_to_pfn(pteval);
947a69c9 429}
da5de7c2 430PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 431
4c13629f 432static pgdval_t xen_pgd_val(pgd_t pgd)
947a69c9 433{
ebb9cfe2 434 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 435}
da5de7c2 436PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9 437
41f2e477
JF
438/*
439 * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
440 * are reserved for now, to correspond to the Intel-reserved PAT
441 * types.
442 *
443 * We expect Linux's PAT set as follows:
444 *
445 * Idx PTE flags Linux Xen Default
446 * 0 WB WB WB
447 * 1 PWT WC WT WT
448 * 2 PCD UC- UC- UC-
449 * 3 PCD PWT UC UC UC
450 * 4 PAT WB WC WB
451 * 5 PAT PWT WC WP WT
452 * 6 PAT PCD UC- UC UC-
453 * 7 PAT PCD PWT UC UC UC
454 */
455
456void xen_set_pat(u64 pat)
457{
458 /* We expect Linux to use a PAT setting of
459 * UC UC- WC WB (ignoring the PAT flag) */
460 WARN_ON(pat != 0x0007010600070106ull);
461}
462
4c13629f 463static pte_t xen_make_pte(pteval_t pte)
947a69c9 464{
7347b408
AN
465 phys_addr_t addr = (pte & PTE_PFN_MASK);
466
41f2e477
JF
467 /* If Linux is trying to set a WC pte, then map to the Xen WC.
468 * If _PAGE_PAT is set, then it probably means it is really
469 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
470 * things work out OK...
471 *
472 * (We should never see kernel mappings with _PAGE_PSE set,
473 * but we could see hugetlbfs mappings, I think.).
474 */
475 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
476 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
477 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
478 }
479
7347b408
AN
480 /*
481 * Unprivileged domains are allowed to do IOMAPpings for
482 * PCI passthrough, but not map ISA space. The ISA
483 * mappings are just dummy local mappings to keep other
484 * parts of the kernel happy.
485 */
486 if (unlikely(pte & _PAGE_IOMAP) &&
487 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
c0011dbf 488 pte = iomap_pte(pte);
7347b408
AN
489 } else {
490 pte &= ~_PAGE_IOMAP;
c0011dbf 491 pte = pte_pfn_to_mfn(pte);
7347b408 492 }
c0011dbf 493
ebb9cfe2 494 return native_make_pte(pte);
947a69c9 495}
da5de7c2 496PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9 497
fc25151d
KRW
498#ifdef CONFIG_XEN_DEBUG
499pte_t xen_make_pte_debug(pteval_t pte)
500{
501 phys_addr_t addr = (pte & PTE_PFN_MASK);
502 phys_addr_t other_addr;
503 bool io_page = false;
504 pte_t _pte;
505
506 if (pte & _PAGE_IOMAP)
507 io_page = true;
508
509 _pte = xen_make_pte(pte);
510
511 if (!addr)
512 return _pte;
513
514 if (io_page &&
515 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
516 other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
d88885d0 517 WARN_ONCE(addr != other_addr,
fc25151d
KRW
518 "0x%lx is using VM_IO, but it is 0x%lx!\n",
519 (unsigned long)addr, (unsigned long)other_addr);
520 } else {
521 pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
522 other_addr = (_pte.pte & PTE_PFN_MASK);
d88885d0 523 WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set),
fc25151d
KRW
524 "0x%lx is missing VM_IO (and wasn't fixed)!\n",
525 (unsigned long)addr);
526 }
527
528 return _pte;
529}
530PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
531#endif
532
4c13629f 533static pgd_t xen_make_pgd(pgdval_t pgd)
947a69c9 534{
ebb9cfe2
JF
535 pgd = pte_pfn_to_mfn(pgd);
536 return native_make_pgd(pgd);
947a69c9 537}
da5de7c2 538PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9 539
4c13629f 540static pmdval_t xen_pmd_val(pmd_t pmd)
947a69c9 541{
ebb9cfe2 542 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 543}
da5de7c2 544PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 545
4c13629f 546static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 547{
400d3494 548 struct mmu_update u;
f4f97b3e 549
d66bf8fc
JF
550 preempt_disable();
551
400d3494
JF
552 xen_mc_batch();
553
ce803e70
JF
554 /* ptr may be ioremapped for 64-bit pagetable setup */
555 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 556 u.val = pud_val_ma(val);
7708ad64 557 xen_extend_mmu_update(&u);
d66bf8fc
JF
558
559 xen_mc_issue(PARAVIRT_LAZY_MMU);
560
561 preempt_enable();
f4f97b3e
JF
562}
563
4c13629f 564static void xen_set_pud(pud_t *ptr, pud_t val)
e2426cf8 565{
84708807
JF
566 trace_xen_mmu_set_pud(ptr, val);
567
e2426cf8
JF
568 /* If page is not pinned, we can just update the entry
569 directly */
7708ad64 570 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
571 *ptr = val;
572 return;
573 }
574
575 xen_set_pud_hyper(ptr, val);
576}
577
f6e58732 578#ifdef CONFIG_X86_PAE
4c13629f 579static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
3b827c1b 580{
84708807 581 trace_xen_mmu_set_pte_atomic(ptep, pte);
f6e58732 582 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
583}
584
4c13629f 585static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
3b827c1b 586{
84708807 587 trace_xen_mmu_pte_clear(mm, addr, ptep);
4a35c13c
JF
588 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
589 native_pte_clear(mm, addr, ptep);
3b827c1b
JF
590}
591
4c13629f 592static void xen_pmd_clear(pmd_t *pmdp)
3b827c1b 593{
84708807 594 trace_xen_mmu_pmd_clear(pmdp);
e2426cf8 595 set_pmd(pmdp, __pmd(0));
3b827c1b 596}
f6e58732 597#endif /* CONFIG_X86_PAE */
3b827c1b 598
4c13629f 599static pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 600{
ebb9cfe2 601 pmd = pte_pfn_to_mfn(pmd);
947a69c9 602 return native_make_pmd(pmd);
3b827c1b 603}
da5de7c2 604PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 605
f6e58732 606#if PAGETABLE_LEVELS == 4
4c13629f 607static pudval_t xen_pud_val(pud_t pud)
f6e58732
JF
608{
609 return pte_mfn_to_pfn(pud.pud);
610}
da5de7c2 611PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732 612
4c13629f 613static pud_t xen_make_pud(pudval_t pud)
f6e58732
JF
614{
615 pud = pte_pfn_to_mfn(pud);
616
617 return native_make_pud(pud);
618}
da5de7c2 619PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 620
4c13629f 621static pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 622{
d6182fbf
JF
623 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
624 unsigned offset = pgd - pgd_page;
625 pgd_t *user_ptr = NULL;
f6e58732 626
d6182fbf
JF
627 if (offset < pgd_index(USER_LIMIT)) {
628 struct page *page = virt_to_page(pgd_page);
629 user_ptr = (pgd_t *)page->private;
630 if (user_ptr)
631 user_ptr += offset;
632 }
f6e58732 633
d6182fbf
JF
634 return user_ptr;
635}
636
637static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
638{
639 struct mmu_update u;
f6e58732
JF
640
641 u.ptr = virt_to_machine(ptr).maddr;
642 u.val = pgd_val_ma(val);
7708ad64 643 xen_extend_mmu_update(&u);
d6182fbf
JF
644}
645
646/*
647 * Raw hypercall-based set_pgd, intended for in early boot before
648 * there's a page structure. This implies:
649 * 1. The only existing pagetable is the kernel's
650 * 2. It is always pinned
651 * 3. It has no user pagetable attached to it
652 */
4c13629f 653static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
d6182fbf
JF
654{
655 preempt_disable();
656
657 xen_mc_batch();
658
659 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
660
661 xen_mc_issue(PARAVIRT_LAZY_MMU);
662
663 preempt_enable();
664}
665
4c13629f 666static void xen_set_pgd(pgd_t *ptr, pgd_t val)
f6e58732 667{
d6182fbf
JF
668 pgd_t *user_ptr = xen_get_user_pgd(ptr);
669
84708807
JF
670 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
671
f6e58732
JF
672 /* If page is not pinned, we can just update the entry
673 directly */
7708ad64 674 if (!xen_page_pinned(ptr)) {
f6e58732 675 *ptr = val;
d6182fbf 676 if (user_ptr) {
7708ad64 677 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
678 *user_ptr = val;
679 }
f6e58732
JF
680 return;
681 }
682
d6182fbf
JF
683 /* If it's pinned, then we can at least batch the kernel and
684 user updates together. */
685 xen_mc_batch();
686
687 __xen_set_pgd_hyper(ptr, val);
688 if (user_ptr)
689 __xen_set_pgd_hyper(user_ptr, val);
690
691 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
692}
693#endif /* PAGETABLE_LEVELS == 4 */
694
f4f97b3e 695/*
5deb30d1
JF
696 * (Yet another) pagetable walker. This one is intended for pinning a
697 * pagetable. This means that it walks a pagetable and calls the
698 * callback function on each page it finds making up the page table,
699 * at every level. It walks the entire pagetable, but it only bothers
700 * pinning pte pages which are below limit. In the normal case this
701 * will be STACK_TOP_MAX, but at boot we need to pin up to
702 * FIXADDR_TOP.
703 *
704 * For 32-bit the important bit is that we don't pin beyond there,
705 * because then we start getting into Xen's ptes.
706 *
707 * For 64-bit, we must skip the Xen hole in the middle of the address
708 * space, just after the big x86-64 virtual hole.
709 */
86bbc2c2
IC
710static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
711 int (*func)(struct mm_struct *mm, struct page *,
712 enum pt_level),
713 unsigned long limit)
3b827c1b 714{
f4f97b3e 715 int flush = 0;
5deb30d1
JF
716 unsigned hole_low, hole_high;
717 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
718 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 719
5deb30d1
JF
720 /* The limit is the last byte to be touched */
721 limit--;
722 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
723
724 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
725 return 0;
726
5deb30d1
JF
727 /*
728 * 64-bit has a great big hole in the middle of the address
729 * space, which contains the Xen mappings. On 32-bit these
730 * will end up making a zero-sized hole and so is a no-op.
731 */
d6182fbf 732 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
733 hole_high = pgd_index(PAGE_OFFSET);
734
735 pgdidx_limit = pgd_index(limit);
736#if PTRS_PER_PUD > 1
737 pudidx_limit = pud_index(limit);
738#else
739 pudidx_limit = 0;
740#endif
741#if PTRS_PER_PMD > 1
742 pmdidx_limit = pmd_index(limit);
743#else
744 pmdidx_limit = 0;
745#endif
746
5deb30d1 747 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 748 pud_t *pud;
3b827c1b 749
5deb30d1
JF
750 if (pgdidx >= hole_low && pgdidx < hole_high)
751 continue;
f4f97b3e 752
5deb30d1 753 if (!pgd_val(pgd[pgdidx]))
3b827c1b 754 continue;
f4f97b3e 755
5deb30d1 756 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
757
758 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 759 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 760
5deb30d1 761 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 762 pmd_t *pmd;
f4f97b3e 763
5deb30d1
JF
764 if (pgdidx == pgdidx_limit &&
765 pudidx > pudidx_limit)
766 goto out;
3b827c1b 767
5deb30d1 768 if (pud_none(pud[pudidx]))
3b827c1b 769 continue;
f4f97b3e 770
5deb30d1 771 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
772
773 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 774 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 775
5deb30d1
JF
776 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
777 struct page *pte;
778
779 if (pgdidx == pgdidx_limit &&
780 pudidx == pudidx_limit &&
781 pmdidx > pmdidx_limit)
782 goto out;
3b827c1b 783
5deb30d1 784 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
785 continue;
786
5deb30d1 787 pte = pmd_page(pmd[pmdidx]);
eefb47f6 788 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
789 }
790 }
791 }
11ad93e5 792
5deb30d1 793out:
11ad93e5
JF
794 /* Do the top level last, so that the callbacks can use it as
795 a cue to do final things like tlb flushes. */
eefb47f6 796 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
797
798 return flush;
3b827c1b
JF
799}
800
86bbc2c2
IC
801static int xen_pgd_walk(struct mm_struct *mm,
802 int (*func)(struct mm_struct *mm, struct page *,
803 enum pt_level),
804 unsigned long limit)
805{
806 return __xen_pgd_walk(mm, mm->pgd, func, limit);
807}
808
7708ad64
JF
809/* If we're using split pte locks, then take the page's lock and
810 return a pointer to it. Otherwise return NULL. */
eefb47f6 811static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
812{
813 spinlock_t *ptl = NULL;
814
f7d0b926 815#if USE_SPLIT_PTLOCKS
74260714 816 ptl = __pte_lockptr(page);
eefb47f6 817 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
818#endif
819
820 return ptl;
821}
822
7708ad64 823static void xen_pte_unlock(void *v)
74260714
JF
824{
825 spinlock_t *ptl = v;
826 spin_unlock(ptl);
827}
828
829static void xen_do_pin(unsigned level, unsigned long pfn)
830{
dcf7435c 831 struct mmuext_op op;
74260714 832
dcf7435c
JF
833 op.cmd = level;
834 op.arg1.mfn = pfn_to_mfn(pfn);
835
836 xen_extend_mmuext_op(&op);
74260714
JF
837}
838
eefb47f6
JF
839static int xen_pin_page(struct mm_struct *mm, struct page *page,
840 enum pt_level level)
f4f97b3e 841{
d60cd46b 842 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
843 int flush;
844
845 if (pgfl)
846 flush = 0; /* already pinned */
847 else if (PageHighMem(page))
848 /* kmaps need flushing if we found an unpinned
849 highpage */
850 flush = 1;
851 else {
852 void *pt = lowmem_page_address(page);
853 unsigned long pfn = page_to_pfn(page);
854 struct multicall_space mcs = __xen_mc_entry(0);
74260714 855 spinlock_t *ptl;
f4f97b3e
JF
856
857 flush = 0;
858
11ad93e5
JF
859 /*
860 * We need to hold the pagetable lock between the time
861 * we make the pagetable RO and when we actually pin
862 * it. If we don't, then other users may come in and
863 * attempt to update the pagetable by writing it,
864 * which will fail because the memory is RO but not
865 * pinned, so Xen won't do the trap'n'emulate.
866 *
867 * If we're using split pte locks, we can't hold the
868 * entire pagetable's worth of locks during the
869 * traverse, because we may wrap the preempt count (8
870 * bits). The solution is to mark RO and pin each PTE
871 * page while holding the lock. This means the number
872 * of locks we end up holding is never more than a
873 * batch size (~32 entries, at present).
874 *
875 * If we're not using split pte locks, we needn't pin
876 * the PTE pages independently, because we're
877 * protected by the overall pagetable lock.
878 */
74260714
JF
879 ptl = NULL;
880 if (level == PT_PTE)
eefb47f6 881 ptl = xen_pte_lock(page, mm);
74260714 882
f4f97b3e
JF
883 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
884 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
885 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
886
11ad93e5 887 if (ptl) {
74260714
JF
888 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
889
74260714
JF
890 /* Queue a deferred unlock for when this batch
891 is completed. */
7708ad64 892 xen_mc_callback(xen_pte_unlock, ptl);
74260714 893 }
f4f97b3e
JF
894 }
895
896 return flush;
897}
3b827c1b 898
f4f97b3e
JF
899/* This is called just after a mm has been created, but it has not
900 been used yet. We need to make sure that its pagetable is all
901 read-only, and can be pinned. */
eefb47f6 902static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 903{
5f94fb5b
JF
904 trace_xen_mmu_pgd_pin(mm, pgd);
905
f4f97b3e 906 xen_mc_batch();
3b827c1b 907
86bbc2c2 908 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 909 /* re-enable interrupts for flushing */
f87e4cac 910 xen_mc_issue(0);
d05fdf31 911
f4f97b3e 912 kmap_flush_unused();
d05fdf31 913
f87e4cac
JF
914 xen_mc_batch();
915 }
f4f97b3e 916
d6182fbf
JF
917#ifdef CONFIG_X86_64
918 {
919 pgd_t *user_pgd = xen_get_user_pgd(pgd);
920
921 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
922
923 if (user_pgd) {
eefb47f6 924 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
925 xen_do_pin(MMUEXT_PIN_L4_TABLE,
926 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
927 }
928 }
929#else /* CONFIG_X86_32 */
5deb30d1
JF
930#ifdef CONFIG_X86_PAE
931 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 932 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 933 PT_PMD);
5deb30d1 934#endif
28499143 935 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 936#endif /* CONFIG_X86_64 */
f4f97b3e 937 xen_mc_issue(0);
3b827c1b
JF
938}
939
eefb47f6
JF
940static void xen_pgd_pin(struct mm_struct *mm)
941{
942 __xen_pgd_pin(mm, mm->pgd);
943}
944
0e91398f
JF
945/*
946 * On save, we need to pin all pagetables to make sure they get their
947 * mfns turned into pfns. Search the list for any unpinned pgds and pin
948 * them (unpinned pgds are not currently in use, probably because the
949 * process is under construction or destruction).
eefb47f6
JF
950 *
951 * Expected to be called in stop_machine() ("equivalent to taking
952 * every spinlock in the system"), so the locking doesn't really
953 * matter all that much.
0e91398f
JF
954 */
955void xen_mm_pin_all(void)
956{
0e91398f 957 struct page *page;
74260714 958
a79e53d8 959 spin_lock(&pgd_lock);
f4f97b3e 960
0e91398f
JF
961 list_for_each_entry(page, &pgd_list, lru) {
962 if (!PagePinned(page)) {
eefb47f6 963 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
964 SetPageSavePinned(page);
965 }
966 }
967
a79e53d8 968 spin_unlock(&pgd_lock);
3b827c1b
JF
969}
970
c1f2f09e
EH
971/*
972 * The init_mm pagetable is really pinned as soon as its created, but
973 * that's before we have page structures to store the bits. So do all
974 * the book-keeping now.
975 */
3f508953 976static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
eefb47f6 977 enum pt_level level)
3b827c1b 978{
f4f97b3e
JF
979 SetPagePinned(page);
980 return 0;
981}
3b827c1b 982
b96229b5 983static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 984{
eefb47f6 985 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 986}
3b827c1b 987
eefb47f6
JF
988static int xen_unpin_page(struct mm_struct *mm, struct page *page,
989 enum pt_level level)
f4f97b3e 990{
d60cd46b 991 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 992
f4f97b3e
JF
993 if (pgfl && !PageHighMem(page)) {
994 void *pt = lowmem_page_address(page);
995 unsigned long pfn = page_to_pfn(page);
74260714
JF
996 spinlock_t *ptl = NULL;
997 struct multicall_space mcs;
998
11ad93e5
JF
999 /*
1000 * Do the converse to pin_page. If we're using split
1001 * pte locks, we must be holding the lock for while
1002 * the pte page is unpinned but still RO to prevent
1003 * concurrent updates from seeing it in this
1004 * partially-pinned state.
1005 */
74260714 1006 if (level == PT_PTE) {
eefb47f6 1007 ptl = xen_pte_lock(page, mm);
74260714 1008
11ad93e5
JF
1009 if (ptl)
1010 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
1011 }
1012
1013 mcs = __xen_mc_entry(0);
f4f97b3e
JF
1014
1015 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1016 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
1017 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1018
1019 if (ptl) {
1020 /* unlock when batch completed */
7708ad64 1021 xen_mc_callback(xen_pte_unlock, ptl);
74260714 1022 }
f4f97b3e
JF
1023 }
1024
1025 return 0; /* never need to flush on unpin */
3b827c1b
JF
1026}
1027
f4f97b3e 1028/* Release a pagetables pages back as normal RW */
eefb47f6 1029static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1030{
5f94fb5b
JF
1031 trace_xen_mmu_pgd_unpin(mm, pgd);
1032
f4f97b3e
JF
1033 xen_mc_batch();
1034
74260714 1035 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1036
d6182fbf
JF
1037#ifdef CONFIG_X86_64
1038 {
1039 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1040
1041 if (user_pgd) {
f63c2f24
T
1042 xen_do_pin(MMUEXT_UNPIN_TABLE,
1043 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1044 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1045 }
1046 }
1047#endif
1048
5deb30d1
JF
1049#ifdef CONFIG_X86_PAE
1050 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1051 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1052 PT_PMD);
5deb30d1 1053#endif
d6182fbf 1054
86bbc2c2 1055 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
1056
1057 xen_mc_issue(0);
1058}
3b827c1b 1059
eefb47f6
JF
1060static void xen_pgd_unpin(struct mm_struct *mm)
1061{
1062 __xen_pgd_unpin(mm, mm->pgd);
1063}
1064
0e91398f
JF
1065/*
1066 * On resume, undo any pinning done at save, so that the rest of the
1067 * kernel doesn't see any unexpected pinned pagetables.
1068 */
1069void xen_mm_unpin_all(void)
1070{
0e91398f
JF
1071 struct page *page;
1072
a79e53d8 1073 spin_lock(&pgd_lock);
0e91398f
JF
1074
1075 list_for_each_entry(page, &pgd_list, lru) {
1076 if (PageSavePinned(page)) {
1077 BUG_ON(!PagePinned(page));
eefb47f6 1078 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1079 ClearPageSavePinned(page);
1080 }
1081 }
1082
a79e53d8 1083 spin_unlock(&pgd_lock);
0e91398f
JF
1084}
1085
4c13629f 1086static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
3b827c1b 1087{
f4f97b3e 1088 spin_lock(&next->page_table_lock);
eefb47f6 1089 xen_pgd_pin(next);
f4f97b3e 1090 spin_unlock(&next->page_table_lock);
3b827c1b
JF
1091}
1092
4c13629f 1093static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
3b827c1b 1094{
f4f97b3e 1095 spin_lock(&mm->page_table_lock);
eefb47f6 1096 xen_pgd_pin(mm);
f4f97b3e 1097 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
1098}
1099
3b827c1b 1100
f87e4cac
JF
1101#ifdef CONFIG_SMP
1102/* Another cpu may still have their %cr3 pointing at the pagetable, so
1103 we need to repoint it somewhere else before we can unpin it. */
1104static void drop_other_mm_ref(void *info)
1105{
1106 struct mm_struct *mm = info;
ce87b3d3 1107 struct mm_struct *active_mm;
3b827c1b 1108
9eb912d1 1109 active_mm = percpu_read(cpu_tlbstate.active_mm);
ce87b3d3 1110
7899891c 1111 if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
f87e4cac 1112 leave_mm(smp_processor_id());
9f79991d
JF
1113
1114 /* If this cpu still has a stale cr3 reference, then make sure
1115 it has been flushed. */
7fd7d83d 1116 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1117 load_cr3(swapper_pg_dir);
f87e4cac 1118}
3b827c1b 1119
7708ad64 1120static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1121{
e4d98207 1122 cpumask_var_t mask;
9f79991d
JF
1123 unsigned cpu;
1124
f87e4cac
JF
1125 if (current->active_mm == mm) {
1126 if (current->mm == mm)
1127 load_cr3(swapper_pg_dir);
1128 else
1129 leave_mm(smp_processor_id());
9f79991d
JF
1130 }
1131
1132 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1133 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1134 for_each_online_cpu(cpu) {
78f1c4d6 1135 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
e4d98207
MT
1136 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1137 continue;
1138 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1139 }
1140 return;
1141 }
78f1c4d6 1142 cpumask_copy(mask, mm_cpumask(mm));
9f79991d
JF
1143
1144 /* It's possible that a vcpu may have a stale reference to our
1145 cr3, because its in lazy mode, and it hasn't yet flushed
1146 its set of pending hypercalls yet. In this case, we can
1147 look at its actual current cr3 value, and force it to flush
1148 if needed. */
1149 for_each_online_cpu(cpu) {
1150 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1151 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1152 }
1153
e4d98207
MT
1154 if (!cpumask_empty(mask))
1155 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1156 free_cpumask_var(mask);
f87e4cac
JF
1157}
1158#else
7708ad64 1159static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1160{
1161 if (current->active_mm == mm)
1162 load_cr3(swapper_pg_dir);
1163}
1164#endif
1165
1166/*
1167 * While a process runs, Xen pins its pagetables, which means that the
1168 * hypervisor forces it to be read-only, and it controls all updates
1169 * to it. This means that all pagetable updates have to go via the
1170 * hypervisor, which is moderately expensive.
1171 *
1172 * Since we're pulling the pagetable down, we switch to use init_mm,
1173 * unpin old process pagetable and mark it all read-write, which
1174 * allows further operations on it to be simple memory accesses.
1175 *
1176 * The only subtle point is that another CPU may be still using the
1177 * pagetable because of lazy tlb flushing. This means we need need to
1178 * switch all CPUs off this pagetable before we can unpin it.
1179 */
4c13629f 1180static void xen_exit_mmap(struct mm_struct *mm)
f87e4cac
JF
1181{
1182 get_cpu(); /* make sure we don't move around */
7708ad64 1183 xen_drop_mm_ref(mm);
f87e4cac 1184 put_cpu();
3b827c1b 1185
f120f13e 1186 spin_lock(&mm->page_table_lock);
df912ea4
JF
1187
1188 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1189 if (xen_page_pinned(mm->pgd))
eefb47f6 1190 xen_pgd_unpin(mm);
74260714 1191
f120f13e 1192 spin_unlock(&mm->page_table_lock);
3b827c1b 1193}
994025ca 1194
3f508953 1195static void __init xen_pagetable_setup_start(pgd_t *base)
319f3ba5
JF
1196{
1197}
1198
279b706b
SS
1199static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
1200{
1201 /* reserve the range used */
1202 native_pagetable_reserve(start, end);
1203
1204 /* set as RW the rest */
1205 printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
1206 PFN_PHYS(pgt_buf_top));
1207 while (end < PFN_PHYS(pgt_buf_top)) {
1208 make_lowmem_page_readwrite(__va(end));
1209 end += PAGE_SIZE;
1210 }
1211}
1212
f1d7062a
TG
1213static void xen_post_allocator_init(void);
1214
3f508953 1215static void __init xen_pagetable_setup_done(pgd_t *base)
319f3ba5
JF
1216{
1217 xen_setup_shared_info();
f1d7062a 1218 xen_post_allocator_init();
319f3ba5
JF
1219}
1220
1221static void xen_write_cr2(unsigned long cr2)
1222{
1223 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1224}
1225
1226static unsigned long xen_read_cr2(void)
1227{
1228 return percpu_read(xen_vcpu)->arch.cr2;
1229}
1230
1231unsigned long xen_read_cr2_direct(void)
1232{
1233 return percpu_read(xen_vcpu_info.arch.cr2);
1234}
1235
1236static void xen_flush_tlb(void)
1237{
1238 struct mmuext_op *op;
1239 struct multicall_space mcs;
1240
c8eed171
JF
1241 trace_xen_mmu_flush_tlb(0);
1242
319f3ba5
JF
1243 preempt_disable();
1244
1245 mcs = xen_mc_entry(sizeof(*op));
1246
1247 op = mcs.args;
1248 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1249 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1250
1251 xen_mc_issue(PARAVIRT_LAZY_MMU);
1252
1253 preempt_enable();
1254}
1255
1256static void xen_flush_tlb_single(unsigned long addr)
1257{
1258 struct mmuext_op *op;
1259 struct multicall_space mcs;
1260
c8eed171
JF
1261 trace_xen_mmu_flush_tlb_single(addr);
1262
319f3ba5
JF
1263 preempt_disable();
1264
1265 mcs = xen_mc_entry(sizeof(*op));
1266 op = mcs.args;
1267 op->cmd = MMUEXT_INVLPG_LOCAL;
1268 op->arg1.linear_addr = addr & PAGE_MASK;
1269 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1270
1271 xen_mc_issue(PARAVIRT_LAZY_MMU);
1272
1273 preempt_enable();
1274}
1275
1276static void xen_flush_tlb_others(const struct cpumask *cpus,
1277 struct mm_struct *mm, unsigned long va)
1278{
1279 struct {
1280 struct mmuext_op op;
32dd1194 1281#ifdef CONFIG_SMP
900cba88 1282 DECLARE_BITMAP(mask, num_processors);
32dd1194
KRW
1283#else
1284 DECLARE_BITMAP(mask, NR_CPUS);
1285#endif
319f3ba5
JF
1286 } *args;
1287 struct multicall_space mcs;
1288
c8eed171
JF
1289 trace_xen_mmu_flush_tlb_others(cpus, mm, va);
1290
e3f8a74e
JF
1291 if (cpumask_empty(cpus))
1292 return; /* nothing to do */
319f3ba5
JF
1293
1294 mcs = xen_mc_entry(sizeof(*args));
1295 args = mcs.args;
1296 args->op.arg2.vcpumask = to_cpumask(args->mask);
1297
1298 /* Remove us, and any offline CPUS. */
1299 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1300 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5
JF
1301
1302 if (va == TLB_FLUSH_ALL) {
1303 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1304 } else {
1305 args->op.cmd = MMUEXT_INVLPG_MULTI;
1306 args->op.arg1.linear_addr = va;
1307 }
1308
1309 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1310
319f3ba5
JF
1311 xen_mc_issue(PARAVIRT_LAZY_MMU);
1312}
1313
1314static unsigned long xen_read_cr3(void)
1315{
1316 return percpu_read(xen_cr3);
1317}
1318
1319static void set_current_cr3(void *v)
1320{
1321 percpu_write(xen_current_cr3, (unsigned long)v);
1322}
1323
1324static void __xen_write_cr3(bool kernel, unsigned long cr3)
1325{
dcf7435c 1326 struct mmuext_op op;
319f3ba5
JF
1327 unsigned long mfn;
1328
c8eed171
JF
1329 trace_xen_mmu_write_cr3(kernel, cr3);
1330
319f3ba5
JF
1331 if (cr3)
1332 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1333 else
1334 mfn = 0;
1335
1336 WARN_ON(mfn == 0 && kernel);
1337
dcf7435c
JF
1338 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1339 op.arg1.mfn = mfn;
319f3ba5 1340
dcf7435c 1341 xen_extend_mmuext_op(&op);
319f3ba5
JF
1342
1343 if (kernel) {
1344 percpu_write(xen_cr3, cr3);
1345
1346 /* Update xen_current_cr3 once the batch has actually
1347 been submitted. */
1348 xen_mc_callback(set_current_cr3, (void *)cr3);
1349 }
1350}
1351
1352static void xen_write_cr3(unsigned long cr3)
1353{
1354 BUG_ON(preemptible());
1355
1356 xen_mc_batch(); /* disables interrupts */
1357
1358 /* Update while interrupts are disabled, so its atomic with
1359 respect to ipis */
1360 percpu_write(xen_cr3, cr3);
1361
1362 __xen_write_cr3(true, cr3);
1363
1364#ifdef CONFIG_X86_64
1365 {
1366 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1367 if (user_pgd)
1368 __xen_write_cr3(false, __pa(user_pgd));
1369 else
1370 __xen_write_cr3(false, 0);
1371 }
1372#endif
1373
1374 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1375}
1376
1377static int xen_pgd_alloc(struct mm_struct *mm)
1378{
1379 pgd_t *pgd = mm->pgd;
1380 int ret = 0;
1381
1382 BUG_ON(PagePinned(virt_to_page(pgd)));
1383
1384#ifdef CONFIG_X86_64
1385 {
1386 struct page *page = virt_to_page(pgd);
1387 pgd_t *user_pgd;
1388
1389 BUG_ON(page->private != 0);
1390
1391 ret = -ENOMEM;
1392
1393 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1394 page->private = (unsigned long)user_pgd;
1395
1396 if (user_pgd != NULL) {
1397 user_pgd[pgd_index(VSYSCALL_START)] =
1398 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1399 ret = 0;
1400 }
1401
1402 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1403 }
1404#endif
1405
1406 return ret;
1407}
1408
1409static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1410{
1411#ifdef CONFIG_X86_64
1412 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1413
1414 if (user_pgd)
1415 free_page((unsigned long)user_pgd);
1416#endif
1417}
1418
ee176455 1419#ifdef CONFIG_X86_32
3f508953 1420static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1f4f9315
JF
1421{
1422 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1423 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1424 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1425 pte_val_ma(pte));
ee176455
SS
1426
1427 return pte;
1428}
1429#else /* CONFIG_X86_64 */
3f508953 1430static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
ee176455
SS
1431{
1432 unsigned long pfn = pte_pfn(pte);
fef5ba79
JF
1433
1434 /*
1435 * If the new pfn is within the range of the newly allocated
1436 * kernel pagetable, and it isn't being mapped into an
d8aa5ec3
SS
1437 * early_ioremap fixmap slot as a freshly allocated page, make sure
1438 * it is RO.
fef5ba79 1439 */
d8aa5ec3 1440 if (((!is_early_ioremap_ptep(ptep) &&
b9269dc7 1441 pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
d8aa5ec3 1442 (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
fef5ba79 1443 pte = pte_wrprotect(pte);
1f4f9315
JF
1444
1445 return pte;
1446}
ee176455 1447#endif /* CONFIG_X86_64 */
1f4f9315
JF
1448
1449/* Init-time set_pte while constructing initial pagetables, which
1450 doesn't allow RO pagetable pages to be remapped RW */
3f508953 1451static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1f4f9315
JF
1452{
1453 pte = mask_rw_pte(ptep, pte);
1454
1455 xen_set_pte(ptep, pte);
1456}
319f3ba5 1457
b96229b5
JF
1458static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1459{
1460 struct mmuext_op op;
1461 op.cmd = cmd;
1462 op.arg1.mfn = pfn_to_mfn(pfn);
1463 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1464 BUG();
1465}
1466
319f3ba5
JF
1467/* Early in boot, while setting up the initial pagetable, assume
1468 everything is pinned. */
3f508953 1469static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
319f3ba5 1470{
b96229b5
JF
1471#ifdef CONFIG_FLATMEM
1472 BUG_ON(mem_map); /* should only be used early */
1473#endif
1474 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1475 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1476}
1477
1478/* Used for pmd and pud */
3f508953 1479static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
b96229b5 1480{
319f3ba5
JF
1481#ifdef CONFIG_FLATMEM
1482 BUG_ON(mem_map); /* should only be used early */
1483#endif
1484 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1485}
1486
1487/* Early release_pte assumes that all pts are pinned, since there's
1488 only init_mm and anything attached to that is pinned. */
3f508953 1489static void __init xen_release_pte_init(unsigned long pfn)
319f3ba5 1490{
b96229b5 1491 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
319f3ba5
JF
1492 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1493}
1494
3f508953 1495static void __init xen_release_pmd_init(unsigned long pfn)
319f3ba5 1496{
b96229b5 1497 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
319f3ba5
JF
1498}
1499
1500/* This needs to make sure the new pte page is pinned iff its being
1501 attached to a pinned pagetable. */
1502static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1503{
1504 struct page *page = pfn_to_page(pfn);
c2ba050d
JF
1505 int pinned = PagePinned(virt_to_page(mm->pgd));
1506
1507 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
319f3ba5 1508
c2ba050d 1509 if (pinned) {
319f3ba5
JF
1510 SetPagePinned(page);
1511
319f3ba5
JF
1512 if (!PageHighMem(page)) {
1513 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1514 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1515 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1516 } else {
1517 /* make sure there are no stray mappings of
1518 this page */
1519 kmap_flush_unused();
1520 }
1521 }
1522}
1523
1524static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1525{
1526 xen_alloc_ptpage(mm, pfn, PT_PTE);
1527}
1528
1529static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1530{
1531 xen_alloc_ptpage(mm, pfn, PT_PMD);
1532}
1533
1534/* This should never happen until we're OK to use struct page */
1535static void xen_release_ptpage(unsigned long pfn, unsigned level)
1536{
1537 struct page *page = pfn_to_page(pfn);
c2ba050d 1538 bool pinned = PagePinned(page);
319f3ba5 1539
c2ba050d
JF
1540 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1541
1542 if (pinned) {
319f3ba5
JF
1543 if (!PageHighMem(page)) {
1544 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1545 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1546 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1547 }
1548 ClearPagePinned(page);
1549 }
1550}
1551
1552static void xen_release_pte(unsigned long pfn)
1553{
1554 xen_release_ptpage(pfn, PT_PTE);
1555}
1556
1557static void xen_release_pmd(unsigned long pfn)
1558{
1559 xen_release_ptpage(pfn, PT_PMD);
1560}
1561
1562#if PAGETABLE_LEVELS == 4
1563static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1564{
1565 xen_alloc_ptpage(mm, pfn, PT_PUD);
1566}
1567
1568static void xen_release_pud(unsigned long pfn)
1569{
1570 xen_release_ptpage(pfn, PT_PUD);
1571}
1572#endif
1573
1574void __init xen_reserve_top(void)
1575{
1576#ifdef CONFIG_X86_32
1577 unsigned long top = HYPERVISOR_VIRT_START;
1578 struct xen_platform_parameters pp;
1579
1580 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1581 top = pp.virt_start;
1582
1583 reserve_top_address(-top);
1584#endif /* CONFIG_X86_32 */
1585}
1586
1587/*
1588 * Like __va(), but returns address in the kernel mapping (which is
1589 * all we have until the physical memory mapping has been set up.
1590 */
1591static void *__ka(phys_addr_t paddr)
1592{
1593#ifdef CONFIG_X86_64
1594 return (void *)(paddr + __START_KERNEL_map);
1595#else
1596 return __va(paddr);
1597#endif
1598}
1599
1600/* Convert a machine address to physical address */
1601static unsigned long m2p(phys_addr_t maddr)
1602{
1603 phys_addr_t paddr;
1604
1605 maddr &= PTE_PFN_MASK;
1606 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1607
1608 return paddr;
1609}
1610
1611/* Convert a machine address to kernel virtual */
1612static void *m2v(phys_addr_t maddr)
1613{
1614 return __ka(m2p(maddr));
1615}
1616
4ec5387c 1617/* Set the page permissions on an identity-mapped pages */
319f3ba5
JF
1618static void set_page_prot(void *addr, pgprot_t prot)
1619{
1620 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1621 pte_t pte = pfn_pte(pfn, prot);
1622
1623 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1624 BUG();
1625}
1626
3f508953 1627static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
319f3ba5
JF
1628{
1629 unsigned pmdidx, pteidx;
1630 unsigned ident_pte;
1631 unsigned long pfn;
1632
764f0138
JF
1633 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1634 PAGE_SIZE);
1635
319f3ba5
JF
1636 ident_pte = 0;
1637 pfn = 0;
1638 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1639 pte_t *pte_page;
1640
1641 /* Reuse or allocate a page of ptes */
1642 if (pmd_present(pmd[pmdidx]))
1643 pte_page = m2v(pmd[pmdidx].pmd);
1644 else {
1645 /* Check for free pte pages */
764f0138 1646 if (ident_pte == LEVEL1_IDENT_ENTRIES)
319f3ba5
JF
1647 break;
1648
1649 pte_page = &level1_ident_pgt[ident_pte];
1650 ident_pte += PTRS_PER_PTE;
1651
1652 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1653 }
1654
1655 /* Install mappings */
1656 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1657 pte_t pte;
1658
a91d9287
SS
1659#ifdef CONFIG_X86_32
1660 if (pfn > max_pfn_mapped)
1661 max_pfn_mapped = pfn;
1662#endif
1663
319f3ba5
JF
1664 if (!pte_none(pte_page[pteidx]))
1665 continue;
1666
1667 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1668 pte_page[pteidx] = pte;
1669 }
1670 }
1671
1672 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1673 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1674
1675 set_page_prot(pmd, PAGE_KERNEL_RO);
1676}
1677
7e77506a
IC
1678void __init xen_setup_machphys_mapping(void)
1679{
1680 struct xen_machphys_mapping mapping;
1681 unsigned long machine_to_phys_nr_ents;
1682
1683 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1684 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1685 machine_to_phys_nr_ents = mapping.max_mfn + 1;
1686 } else {
1687 machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES;
1688 }
1689 machine_to_phys_order = fls(machine_to_phys_nr_ents - 1);
1690}
1691
319f3ba5
JF
1692#ifdef CONFIG_X86_64
1693static void convert_pfn_mfn(void *v)
1694{
1695 pte_t *pte = v;
1696 int i;
1697
1698 /* All levels are converted the same way, so just treat them
1699 as ptes. */
1700 for (i = 0; i < PTRS_PER_PTE; i++)
1701 pte[i] = xen_make_pte(pte[i].pte);
1702}
1703
1704/*
0d2eb44f 1705 * Set up the initial kernel pagetable.
319f3ba5
JF
1706 *
1707 * We can construct this by grafting the Xen provided pagetable into
1708 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1709 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1710 * means that only the kernel has a physical mapping to start with -
1711 * but that's enough to get __va working. We need to fill in the rest
1712 * of the physical mapping once some sort of allocator has been set
1713 * up.
1714 */
3f508953 1715pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
319f3ba5
JF
1716 unsigned long max_pfn)
1717{
1718 pud_t *l3;
1719 pmd_t *l2;
1720
14988a4d
SS
1721 /* max_pfn_mapped is the last pfn mapped in the initial memory
1722 * mappings. Considering that on Xen after the kernel mappings we
1723 * have the mappings of some pages that don't exist in pfn space, we
1724 * set max_pfn_mapped to the last real pfn mapped. */
1725 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1726
319f3ba5
JF
1727 /* Zap identity mapping */
1728 init_level4_pgt[0] = __pgd(0);
1729
1730 /* Pre-constructed entries are in pfn, so convert to mfn */
1731 convert_pfn_mfn(init_level4_pgt);
1732 convert_pfn_mfn(level3_ident_pgt);
1733 convert_pfn_mfn(level3_kernel_pgt);
1734
1735 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1736 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1737
1738 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1739 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1740
1741 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1742 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1743 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1744
1745 /* Set up identity map */
1746 xen_map_identity_early(level2_ident_pgt, max_pfn);
1747
1748 /* Make pagetable pieces RO */
1749 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1750 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1751 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1752 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1753 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1754 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1755
1756 /* Pin down new L4 */
1757 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1758 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1759
1760 /* Unpin Xen-provided one */
1761 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1762
1763 /* Switch over */
1764 pgd = init_level4_pgt;
1765
1766 /*
1767 * At this stage there can be no user pgd, and no page
1768 * structure to attach it to, so make sure we just set kernel
1769 * pgd.
1770 */
1771 xen_mc_batch();
1772 __xen_write_cr3(true, __pa(pgd));
1773 xen_mc_issue(PARAVIRT_LAZY_CPU);
1774
a9ce6bc1 1775 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
319f3ba5
JF
1776 __pa(xen_start_info->pt_base +
1777 xen_start_info->nr_pt_frames * PAGE_SIZE),
1778 "XEN PAGETABLES");
1779
1780 return pgd;
1781}
1782#else /* !CONFIG_X86_64 */
5b5c1af1
IC
1783static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1784static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1785
3f508953 1786static void __init xen_write_cr3_init(unsigned long cr3)
5b5c1af1
IC
1787{
1788 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1789
1790 BUG_ON(read_cr3() != __pa(initial_page_table));
1791 BUG_ON(cr3 != __pa(swapper_pg_dir));
1792
1793 /*
1794 * We are switching to swapper_pg_dir for the first time (from
1795 * initial_page_table) and therefore need to mark that page
1796 * read-only and then pin it.
1797 *
1798 * Xen disallows sharing of kernel PMDs for PAE
1799 * guests. Therefore we must copy the kernel PMD from
1800 * initial_page_table into a new kernel PMD to be used in
1801 * swapper_pg_dir.
1802 */
1803 swapper_kernel_pmd =
1804 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1805 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1806 sizeof(pmd_t) * PTRS_PER_PMD);
1807 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1808 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1809 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1810
1811 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1812 xen_write_cr3(cr3);
1813 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1814
1815 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1816 PFN_DOWN(__pa(initial_page_table)));
1817 set_page_prot(initial_page_table, PAGE_KERNEL);
1818 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1819
1820 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1821}
319f3ba5 1822
3f508953 1823pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
319f3ba5
JF
1824 unsigned long max_pfn)
1825{
1826 pmd_t *kernel_pmd;
1827
5b5c1af1
IC
1828 initial_kernel_pmd =
1829 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
f0991802 1830
a91d9287
SS
1831 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1832 xen_start_info->nr_pt_frames * PAGE_SIZE +
1833 512*1024);
319f3ba5
JF
1834
1835 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
5b5c1af1 1836 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
319f3ba5 1837
5b5c1af1 1838 xen_map_identity_early(initial_kernel_pmd, max_pfn);
319f3ba5 1839
5b5c1af1
IC
1840 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1841 initial_page_table[KERNEL_PGD_BOUNDARY] =
1842 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
319f3ba5 1843
5b5c1af1
IC
1844 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1845 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
319f3ba5
JF
1846 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1847
1848 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1849
5b5c1af1
IC
1850 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1851 PFN_DOWN(__pa(initial_page_table)));
1852 xen_write_cr3(__pa(initial_page_table));
319f3ba5 1853
a9ce6bc1 1854 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
33df4db0
JF
1855 __pa(xen_start_info->pt_base +
1856 xen_start_info->nr_pt_frames * PAGE_SIZE),
1857 "XEN PAGETABLES");
1858
5b5c1af1 1859 return initial_page_table;
319f3ba5
JF
1860}
1861#endif /* CONFIG_X86_64 */
1862
98511f35
JF
1863static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1864
3b3809ac 1865static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
319f3ba5
JF
1866{
1867 pte_t pte;
1868
1869 phys >>= PAGE_SHIFT;
1870
1871 switch (idx) {
1872 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1873#ifdef CONFIG_X86_F00F_BUG
1874 case FIX_F00F_IDT:
1875#endif
1876#ifdef CONFIG_X86_32
1877 case FIX_WP_TEST:
1878 case FIX_VDSO:
1879# ifdef CONFIG_HIGHMEM
1880 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1881# endif
1882#else
1883 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
319f3ba5 1884#endif
3ecb1b7d
JF
1885 case FIX_TEXT_POKE0:
1886 case FIX_TEXT_POKE1:
1887 /* All local page mappings */
319f3ba5
JF
1888 pte = pfn_pte(phys, prot);
1889 break;
1890
98511f35
JF
1891#ifdef CONFIG_X86_LOCAL_APIC
1892 case FIX_APIC_BASE: /* maps dummy local APIC */
1893 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1894 break;
1895#endif
1896
1897#ifdef CONFIG_X86_IO_APIC
1898 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1899 /*
1900 * We just don't map the IO APIC - all access is via
1901 * hypercalls. Keep the address in the pte for reference.
1902 */
1903 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1904 break;
1905#endif
1906
c0011dbf
JF
1907 case FIX_PARAVIRT_BOOTMAP:
1908 /* This is an MFN, but it isn't an IO mapping from the
1909 IO domain */
319f3ba5
JF
1910 pte = mfn_pte(phys, prot);
1911 break;
c0011dbf
JF
1912
1913 default:
1914 /* By default, set_fixmap is used for hardware mappings */
1915 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1916 break;
319f3ba5
JF
1917 }
1918
1919 __native_set_fixmap(idx, pte);
1920
1921#ifdef CONFIG_X86_64
1922 /* Replicate changes to map the vsyscall page into the user
1923 pagetable vsyscall mapping. */
1924 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1925 unsigned long vaddr = __fix_to_virt(idx);
1926 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1927 }
1928#endif
1929}
1930
3f508953 1931void __init xen_ident_map_ISA(void)
4ec5387c
JQ
1932{
1933 unsigned long pa;
1934
1935 /*
1936 * If we're dom0, then linear map the ISA machine addresses into
1937 * the kernel's address space.
1938 */
1939 if (!xen_initial_domain())
1940 return;
1941
1942 xen_raw_printk("Xen: setup ISA identity maps\n");
1943
1944 for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1945 pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1946
1947 if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1948 BUG();
1949 }
1950
1951 xen_flush_tlb();
1952}
1953
3f508953 1954static void __init xen_post_allocator_init(void)
319f3ba5 1955{
fc25151d
KRW
1956#ifdef CONFIG_XEN_DEBUG
1957 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
1958#endif
319f3ba5
JF
1959 pv_mmu_ops.set_pte = xen_set_pte;
1960 pv_mmu_ops.set_pmd = xen_set_pmd;
1961 pv_mmu_ops.set_pud = xen_set_pud;
1962#if PAGETABLE_LEVELS == 4
1963 pv_mmu_ops.set_pgd = xen_set_pgd;
1964#endif
1965
1966 /* This will work as long as patching hasn't happened yet
1967 (which it hasn't) */
1968 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1969 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1970 pv_mmu_ops.release_pte = xen_release_pte;
1971 pv_mmu_ops.release_pmd = xen_release_pmd;
1972#if PAGETABLE_LEVELS == 4
1973 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1974 pv_mmu_ops.release_pud = xen_release_pud;
1975#endif
1976
1977#ifdef CONFIG_X86_64
1978 SetPagePinned(virt_to_page(level3_user_vsyscall));
1979#endif
1980 xen_mark_init_mm_pinned();
1981}
1982
b407fc57
JF
1983static void xen_leave_lazy_mmu(void)
1984{
5caecb94 1985 preempt_disable();
b407fc57
JF
1986 xen_mc_flush();
1987 paravirt_leave_lazy_mmu();
5caecb94 1988 preempt_enable();
b407fc57 1989}
319f3ba5 1990
3f508953 1991static const struct pv_mmu_ops xen_mmu_ops __initconst = {
319f3ba5
JF
1992 .read_cr2 = xen_read_cr2,
1993 .write_cr2 = xen_write_cr2,
1994
1995 .read_cr3 = xen_read_cr3,
5b5c1af1
IC
1996#ifdef CONFIG_X86_32
1997 .write_cr3 = xen_write_cr3_init,
1998#else
319f3ba5 1999 .write_cr3 = xen_write_cr3,
5b5c1af1 2000#endif
319f3ba5
JF
2001
2002 .flush_tlb_user = xen_flush_tlb,
2003 .flush_tlb_kernel = xen_flush_tlb,
2004 .flush_tlb_single = xen_flush_tlb_single,
2005 .flush_tlb_others = xen_flush_tlb_others,
2006
2007 .pte_update = paravirt_nop,
2008 .pte_update_defer = paravirt_nop,
2009
2010 .pgd_alloc = xen_pgd_alloc,
2011 .pgd_free = xen_pgd_free,
2012
2013 .alloc_pte = xen_alloc_pte_init,
2014 .release_pte = xen_release_pte_init,
b96229b5 2015 .alloc_pmd = xen_alloc_pmd_init,
b96229b5 2016 .release_pmd = xen_release_pmd_init,
319f3ba5 2017
319f3ba5 2018 .set_pte = xen_set_pte_init,
319f3ba5
JF
2019 .set_pte_at = xen_set_pte_at,
2020 .set_pmd = xen_set_pmd_hyper,
2021
2022 .ptep_modify_prot_start = __ptep_modify_prot_start,
2023 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2024
da5de7c2
JF
2025 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2026 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 2027
da5de7c2
JF
2028 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2029 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
2030
2031#ifdef CONFIG_X86_PAE
2032 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
2033 .pte_clear = xen_pte_clear,
2034 .pmd_clear = xen_pmd_clear,
2035#endif /* CONFIG_X86_PAE */
2036 .set_pud = xen_set_pud_hyper,
2037
da5de7c2
JF
2038 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2039 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
2040
2041#if PAGETABLE_LEVELS == 4
da5de7c2
JF
2042 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2043 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
2044 .set_pgd = xen_set_pgd_hyper,
2045
b96229b5
JF
2046 .alloc_pud = xen_alloc_pmd_init,
2047 .release_pud = xen_release_pmd_init,
319f3ba5
JF
2048#endif /* PAGETABLE_LEVELS == 4 */
2049
2050 .activate_mm = xen_activate_mm,
2051 .dup_mmap = xen_dup_mmap,
2052 .exit_mmap = xen_exit_mmap,
2053
2054 .lazy_mode = {
2055 .enter = paravirt_enter_lazy_mmu,
b407fc57 2056 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
2057 },
2058
2059 .set_fixmap = xen_set_fixmap,
2060};
2061
030cb6c0
TG
2062void __init xen_init_mmu_ops(void)
2063{
279b706b 2064 x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
030cb6c0
TG
2065 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2066 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2067 pv_mmu_ops = xen_mmu_ops;
d2cb2145 2068
98511f35 2069 memset(dummy_mapping, 0xff, PAGE_SIZE);
030cb6c0 2070}
319f3ba5 2071
08bbc9da
AN
2072/* Protected by xen_reservation_lock. */
2073#define MAX_CONTIG_ORDER 9 /* 2MB */
2074static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2075
2076#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2077static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2078 unsigned long *in_frames,
2079 unsigned long *out_frames)
2080{
2081 int i;
2082 struct multicall_space mcs;
2083
2084 xen_mc_batch();
2085 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2086 mcs = __xen_mc_entry(0);
2087
2088 if (in_frames)
2089 in_frames[i] = virt_to_mfn(vaddr);
2090
2091 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
6eaa412f 2092 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
08bbc9da
AN
2093
2094 if (out_frames)
2095 out_frames[i] = virt_to_pfn(vaddr);
2096 }
2097 xen_mc_issue(0);
2098}
2099
2100/*
2101 * Update the pfn-to-mfn mappings for a virtual address range, either to
2102 * point to an array of mfns, or contiguously from a single starting
2103 * mfn.
2104 */
2105static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2106 unsigned long *mfns,
2107 unsigned long first_mfn)
2108{
2109 unsigned i, limit;
2110 unsigned long mfn;
2111
2112 xen_mc_batch();
2113
2114 limit = 1u << order;
2115 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2116 struct multicall_space mcs;
2117 unsigned flags;
2118
2119 mcs = __xen_mc_entry(0);
2120 if (mfns)
2121 mfn = mfns[i];
2122 else
2123 mfn = first_mfn + i;
2124
2125 if (i < (limit - 1))
2126 flags = 0;
2127 else {
2128 if (order == 0)
2129 flags = UVMF_INVLPG | UVMF_ALL;
2130 else
2131 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2132 }
2133
2134 MULTI_update_va_mapping(mcs.mc, vaddr,
2135 mfn_pte(mfn, PAGE_KERNEL), flags);
2136
2137 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2138 }
2139
2140 xen_mc_issue(0);
2141}
2142
2143/*
2144 * Perform the hypercall to exchange a region of our pfns to point to
2145 * memory with the required contiguous alignment. Takes the pfns as
2146 * input, and populates mfns as output.
2147 *
2148 * Returns a success code indicating whether the hypervisor was able to
2149 * satisfy the request or not.
2150 */
2151static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2152 unsigned long *pfns_in,
2153 unsigned long extents_out,
2154 unsigned int order_out,
2155 unsigned long *mfns_out,
2156 unsigned int address_bits)
2157{
2158 long rc;
2159 int success;
2160
2161 struct xen_memory_exchange exchange = {
2162 .in = {
2163 .nr_extents = extents_in,
2164 .extent_order = order_in,
2165 .extent_start = pfns_in,
2166 .domid = DOMID_SELF
2167 },
2168 .out = {
2169 .nr_extents = extents_out,
2170 .extent_order = order_out,
2171 .extent_start = mfns_out,
2172 .address_bits = address_bits,
2173 .domid = DOMID_SELF
2174 }
2175 };
2176
2177 BUG_ON(extents_in << order_in != extents_out << order_out);
2178
2179 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2180 success = (exchange.nr_exchanged == extents_in);
2181
2182 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2183 BUG_ON(success && (rc != 0));
2184
2185 return success;
2186}
2187
2188int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2189 unsigned int address_bits)
2190{
2191 unsigned long *in_frames = discontig_frames, out_frame;
2192 unsigned long flags;
2193 int success;
2194
2195 /*
2196 * Currently an auto-translated guest will not perform I/O, nor will
2197 * it require PAE page directories below 4GB. Therefore any calls to
2198 * this function are redundant and can be ignored.
2199 */
2200
2201 if (xen_feature(XENFEAT_auto_translated_physmap))
2202 return 0;
2203
2204 if (unlikely(order > MAX_CONTIG_ORDER))
2205 return -ENOMEM;
2206
2207 memset((void *) vstart, 0, PAGE_SIZE << order);
2208
08bbc9da
AN
2209 spin_lock_irqsave(&xen_reservation_lock, flags);
2210
2211 /* 1. Zap current PTEs, remembering MFNs. */
2212 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2213
2214 /* 2. Get a new contiguous memory extent. */
2215 out_frame = virt_to_pfn(vstart);
2216 success = xen_exchange_memory(1UL << order, 0, in_frames,
2217 1, order, &out_frame,
2218 address_bits);
2219
2220 /* 3. Map the new extent in place of old pages. */
2221 if (success)
2222 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2223 else
2224 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2225
2226 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2227
2228 return success ? 0 : -ENOMEM;
2229}
2230EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2231
2232void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2233{
2234 unsigned long *out_frames = discontig_frames, in_frame;
2235 unsigned long flags;
2236 int success;
2237
2238 if (xen_feature(XENFEAT_auto_translated_physmap))
2239 return;
2240
2241 if (unlikely(order > MAX_CONTIG_ORDER))
2242 return;
2243
2244 memset((void *) vstart, 0, PAGE_SIZE << order);
2245
08bbc9da
AN
2246 spin_lock_irqsave(&xen_reservation_lock, flags);
2247
2248 /* 1. Find start MFN of contiguous extent. */
2249 in_frame = virt_to_mfn(vstart);
2250
2251 /* 2. Zap current PTEs. */
2252 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2253
2254 /* 3. Do the exchange for non-contiguous MFNs. */
2255 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2256 0, out_frames, 0);
2257
2258 /* 4. Map new pages in place of old pages. */
2259 if (success)
2260 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2261 else
2262 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2263
2264 spin_unlock_irqrestore(&xen_reservation_lock, flags);
030cb6c0 2265}
08bbc9da 2266EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
319f3ba5 2267
ca65f9fc 2268#ifdef CONFIG_XEN_PVHVM
59151001
SS
2269static void xen_hvm_exit_mmap(struct mm_struct *mm)
2270{
2271 struct xen_hvm_pagetable_dying a;
2272 int rc;
2273
2274 a.domid = DOMID_SELF;
2275 a.gpa = __pa(mm->pgd);
2276 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2277 WARN_ON_ONCE(rc < 0);
2278}
2279
2280static int is_pagetable_dying_supported(void)
2281{
2282 struct xen_hvm_pagetable_dying a;
2283 int rc = 0;
2284
2285 a.domid = DOMID_SELF;
2286 a.gpa = 0x00;
2287 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2288 if (rc < 0) {
2289 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2290 return 0;
2291 }
2292 return 1;
2293}
2294
2295void __init xen_hvm_init_mmu_ops(void)
2296{
2297 if (is_pagetable_dying_supported())
2298 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2299}
ca65f9fc 2300#endif
59151001 2301
de1ef206
IC
2302#define REMAP_BATCH_SIZE 16
2303
2304struct remap_data {
2305 unsigned long mfn;
2306 pgprot_t prot;
2307 struct mmu_update *mmu_update;
2308};
2309
2310static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2311 unsigned long addr, void *data)
2312{
2313 struct remap_data *rmd = data;
2314 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2315
d5108316 2316 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
de1ef206
IC
2317 rmd->mmu_update->val = pte_val_ma(pte);
2318 rmd->mmu_update++;
2319
2320 return 0;
2321}
2322
2323int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2324 unsigned long addr,
2325 unsigned long mfn, int nr,
2326 pgprot_t prot, unsigned domid)
2327{
2328 struct remap_data rmd;
2329 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2330 int batch;
2331 unsigned long range;
2332 int err = 0;
2333
2334 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2335
e060e7af
SS
2336 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2337 (VM_PFNMAP | VM_RESERVED | VM_IO)));
de1ef206
IC
2338
2339 rmd.mfn = mfn;
2340 rmd.prot = prot;
2341
2342 while (nr) {
2343 batch = min(REMAP_BATCH_SIZE, nr);
2344 range = (unsigned long)batch << PAGE_SHIFT;
2345
2346 rmd.mmu_update = mmu_update;
2347 err = apply_to_page_range(vma->vm_mm, addr, range,
2348 remap_area_mfn_pte_fn, &rmd);
2349 if (err)
2350 goto out;
2351
2352 err = -EFAULT;
2353 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2354 goto out;
2355
2356 nr -= batch;
2357 addr += range;
2358 }
2359
2360 err = 0;
2361out:
2362
2363 flush_tlb_all();
2364
2365 return err;
2366}
2367EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2368
994025ca 2369#ifdef CONFIG_XEN_DEBUG_FS
2222e71b
KRW
2370static int p2m_dump_open(struct inode *inode, struct file *filp)
2371{
2372 return single_open(filp, p2m_dump_show, NULL);
2373}
2374
2375static const struct file_operations p2m_dump_fops = {
2376 .open = p2m_dump_open,
2377 .read = seq_read,
2378 .llseek = seq_lseek,
2379 .release = single_release,
2380};
4bf0ff24 2381#endif /* CONFIG_XEN_DEBUG_FS */
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