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Commit | Line | Data |
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3b827c1b JF |
1 | /* |
2 | * Xen mmu operations | |
3 | * | |
4 | * This file contains the various mmu fetch and update operations. | |
5 | * The most important job they must perform is the mapping between the | |
6 | * domain's pfn and the overall machine mfns. | |
7 | * | |
8 | * Xen allows guests to directly update the pagetable, in a controlled | |
9 | * fashion. In other words, the guest modifies the same pagetable | |
10 | * that the CPU actually uses, which eliminates the overhead of having | |
11 | * a separate shadow pagetable. | |
12 | * | |
13 | * In order to allow this, it falls on the guest domain to map its | |
14 | * notion of a "physical" pfn - which is just a domain-local linear | |
15 | * address - into a real "machine address" which the CPU's MMU can | |
16 | * use. | |
17 | * | |
18 | * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be | |
19 | * inserted directly into the pagetable. When creating a new | |
20 | * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, | |
21 | * when reading the content back with __(pgd|pmd|pte)_val, it converts | |
22 | * the mfn back into a pfn. | |
23 | * | |
24 | * The other constraint is that all pages which make up a pagetable | |
25 | * must be mapped read-only in the guest. This prevents uncontrolled | |
26 | * guest updates to the pagetable. Xen strictly enforces this, and | |
27 | * will disallow any pagetable update which will end up mapping a | |
28 | * pagetable page RW, and will disallow using any writable page as a | |
29 | * pagetable. | |
30 | * | |
31 | * Naively, when loading %cr3 with the base of a new pagetable, Xen | |
32 | * would need to validate the whole pagetable before going on. | |
33 | * Naturally, this is quite slow. The solution is to "pin" a | |
34 | * pagetable, which enforces all the constraints on the pagetable even | |
35 | * when it is not actively in use. This menas that Xen can be assured | |
36 | * that it is still valid when you do load it into %cr3, and doesn't | |
37 | * need to revalidate it. | |
38 | * | |
39 | * Jeremy Fitzhardinge <[email protected]>, XenSource Inc, 2007 | |
40 | */ | |
f120f13e | 41 | #include <linux/sched.h> |
f4f97b3e | 42 | #include <linux/highmem.h> |
994025ca | 43 | #include <linux/debugfs.h> |
3b827c1b | 44 | #include <linux/bug.h> |
3b827c1b JF |
45 | |
46 | #include <asm/pgtable.h> | |
47 | #include <asm/tlbflush.h> | |
5deb30d1 | 48 | #include <asm/fixmap.h> |
3b827c1b | 49 | #include <asm/mmu_context.h> |
f4f97b3e | 50 | #include <asm/paravirt.h> |
cbcd79c2 | 51 | #include <asm/linkage.h> |
3b827c1b JF |
52 | |
53 | #include <asm/xen/hypercall.h> | |
f4f97b3e | 54 | #include <asm/xen/hypervisor.h> |
3b827c1b JF |
55 | |
56 | #include <xen/page.h> | |
57 | #include <xen/interface/xen.h> | |
58 | ||
f4f97b3e | 59 | #include "multicalls.h" |
3b827c1b | 60 | #include "mmu.h" |
994025ca JF |
61 | #include "debugfs.h" |
62 | ||
63 | #define MMU_UPDATE_HISTO 30 | |
64 | ||
65 | #ifdef CONFIG_XEN_DEBUG_FS | |
66 | ||
67 | static struct { | |
68 | u32 pgd_update; | |
69 | u32 pgd_update_pinned; | |
70 | u32 pgd_update_batched; | |
71 | ||
72 | u32 pud_update; | |
73 | u32 pud_update_pinned; | |
74 | u32 pud_update_batched; | |
75 | ||
76 | u32 pmd_update; | |
77 | u32 pmd_update_pinned; | |
78 | u32 pmd_update_batched; | |
79 | ||
80 | u32 pte_update; | |
81 | u32 pte_update_pinned; | |
82 | u32 pte_update_batched; | |
83 | ||
84 | u32 mmu_update; | |
85 | u32 mmu_update_extended; | |
86 | u32 mmu_update_histo[MMU_UPDATE_HISTO]; | |
87 | ||
88 | u32 prot_commit; | |
89 | u32 prot_commit_batched; | |
90 | ||
91 | u32 set_pte_at; | |
92 | u32 set_pte_at_batched; | |
93 | u32 set_pte_at_pinned; | |
94 | u32 set_pte_at_current; | |
95 | u32 set_pte_at_kernel; | |
96 | } mmu_stats; | |
97 | ||
98 | static u8 zero_stats; | |
99 | ||
100 | static inline void check_zero(void) | |
101 | { | |
102 | if (unlikely(zero_stats)) { | |
103 | memset(&mmu_stats, 0, sizeof(mmu_stats)); | |
104 | zero_stats = 0; | |
105 | } | |
106 | } | |
107 | ||
108 | #define ADD_STATS(elem, val) \ | |
109 | do { check_zero(); mmu_stats.elem += (val); } while(0) | |
110 | ||
111 | #else /* !CONFIG_XEN_DEBUG_FS */ | |
112 | ||
113 | #define ADD_STATS(elem, val) do { (void)(val); } while(0) | |
114 | ||
115 | #endif /* CONFIG_XEN_DEBUG_FS */ | |
3b827c1b | 116 | |
d6182fbf JF |
117 | /* |
118 | * Just beyond the highest usermode address. STACK_TOP_MAX has a | |
119 | * redzone above it, so round it up to a PGD boundary. | |
120 | */ | |
121 | #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) | |
122 | ||
123 | ||
d451bb7a | 124 | #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long)) |
cf0923ea | 125 | #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE) |
d451bb7a | 126 | |
cf0923ea | 127 | /* Placeholder for holes in the address space */ |
cbcd79c2 | 128 | static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data = |
cf0923ea JF |
129 | { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL }; |
130 | ||
131 | /* Array of pointers to pages containing p2m entries */ | |
cbcd79c2 | 132 | static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data = |
cf0923ea | 133 | { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] }; |
d451bb7a | 134 | |
d5edbc1f | 135 | /* Arrays of p2m arrays expressed in mfns used for save/restore */ |
cbcd79c2 | 136 | static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss; |
d5edbc1f | 137 | |
cbcd79c2 JF |
138 | static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE] |
139 | __page_aligned_bss; | |
d5edbc1f | 140 | |
d451bb7a JF |
141 | static inline unsigned p2m_top_index(unsigned long pfn) |
142 | { | |
8006ec3e | 143 | BUG_ON(pfn >= MAX_DOMAIN_PAGES); |
d451bb7a JF |
144 | return pfn / P2M_ENTRIES_PER_PAGE; |
145 | } | |
146 | ||
147 | static inline unsigned p2m_index(unsigned long pfn) | |
148 | { | |
149 | return pfn % P2M_ENTRIES_PER_PAGE; | |
150 | } | |
151 | ||
d5edbc1f JF |
152 | /* Build the parallel p2m_top_mfn structures */ |
153 | void xen_setup_mfn_list_list(void) | |
154 | { | |
155 | unsigned pfn, idx; | |
156 | ||
157 | for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) { | |
158 | unsigned topidx = p2m_top_index(pfn); | |
159 | ||
160 | p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]); | |
161 | } | |
162 | ||
163 | for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) { | |
164 | unsigned topidx = idx * P2M_ENTRIES_PER_PAGE; | |
165 | p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]); | |
166 | } | |
167 | ||
168 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); | |
169 | ||
170 | HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list = | |
171 | virt_to_mfn(p2m_top_mfn_list); | |
172 | HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages; | |
173 | } | |
174 | ||
175 | /* Set up p2m_top to point to the domain-builder provided p2m pages */ | |
d451bb7a JF |
176 | void __init xen_build_dynamic_phys_to_machine(void) |
177 | { | |
d451bb7a | 178 | unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list; |
8006ec3e | 179 | unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages); |
d5edbc1f | 180 | unsigned pfn; |
d451bb7a | 181 | |
8006ec3e | 182 | for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) { |
d451bb7a JF |
183 | unsigned topidx = p2m_top_index(pfn); |
184 | ||
185 | p2m_top[topidx] = &mfn_list[pfn]; | |
186 | } | |
187 | } | |
188 | ||
189 | unsigned long get_phys_to_machine(unsigned long pfn) | |
190 | { | |
191 | unsigned topidx, idx; | |
192 | ||
8006ec3e JF |
193 | if (unlikely(pfn >= MAX_DOMAIN_PAGES)) |
194 | return INVALID_P2M_ENTRY; | |
195 | ||
d451bb7a | 196 | topidx = p2m_top_index(pfn); |
d451bb7a JF |
197 | idx = p2m_index(pfn); |
198 | return p2m_top[topidx][idx]; | |
199 | } | |
15ce6005 | 200 | EXPORT_SYMBOL_GPL(get_phys_to_machine); |
d451bb7a | 201 | |
d5edbc1f | 202 | static void alloc_p2m(unsigned long **pp, unsigned long *mfnp) |
d451bb7a JF |
203 | { |
204 | unsigned long *p; | |
205 | unsigned i; | |
206 | ||
207 | p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL); | |
208 | BUG_ON(p == NULL); | |
209 | ||
210 | for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++) | |
211 | p[i] = INVALID_P2M_ENTRY; | |
212 | ||
cf0923ea | 213 | if (cmpxchg(pp, p2m_missing, p) != p2m_missing) |
d451bb7a | 214 | free_page((unsigned long)p); |
d5edbc1f JF |
215 | else |
216 | *mfnp = virt_to_mfn(p); | |
d451bb7a JF |
217 | } |
218 | ||
219 | void set_phys_to_machine(unsigned long pfn, unsigned long mfn) | |
220 | { | |
221 | unsigned topidx, idx; | |
222 | ||
223 | if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) { | |
224 | BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); | |
8006ec3e JF |
225 | return; |
226 | } | |
227 | ||
228 | if (unlikely(pfn >= MAX_DOMAIN_PAGES)) { | |
229 | BUG_ON(mfn != INVALID_P2M_ENTRY); | |
d451bb7a JF |
230 | return; |
231 | } | |
232 | ||
233 | topidx = p2m_top_index(pfn); | |
cf0923ea | 234 | if (p2m_top[topidx] == p2m_missing) { |
d451bb7a JF |
235 | /* no need to allocate a page to store an invalid entry */ |
236 | if (mfn == INVALID_P2M_ENTRY) | |
237 | return; | |
d5edbc1f | 238 | alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]); |
d451bb7a JF |
239 | } |
240 | ||
241 | idx = p2m_index(pfn); | |
242 | p2m_top[topidx][idx] = mfn; | |
243 | } | |
244 | ||
ce803e70 | 245 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) |
3b827c1b | 246 | { |
ce803e70 | 247 | unsigned long address = (unsigned long)vaddr; |
da7bfc50 | 248 | unsigned int level; |
f0646e43 | 249 | pte_t *pte = lookup_address(address, &level); |
de067814 | 250 | unsigned offset = address & ~PAGE_MASK; |
3b827c1b JF |
251 | |
252 | BUG_ON(pte == NULL); | |
253 | ||
ebd879e3 | 254 | return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); |
3b827c1b JF |
255 | } |
256 | ||
257 | void make_lowmem_page_readonly(void *vaddr) | |
258 | { | |
259 | pte_t *pte, ptev; | |
260 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 261 | unsigned int level; |
3b827c1b | 262 | |
f0646e43 | 263 | pte = lookup_address(address, &level); |
3b827c1b JF |
264 | BUG_ON(pte == NULL); |
265 | ||
266 | ptev = pte_wrprotect(*pte); | |
267 | ||
268 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
269 | BUG(); | |
270 | } | |
271 | ||
272 | void make_lowmem_page_readwrite(void *vaddr) | |
273 | { | |
274 | pte_t *pte, ptev; | |
275 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 276 | unsigned int level; |
3b827c1b | 277 | |
f0646e43 | 278 | pte = lookup_address(address, &level); |
3b827c1b JF |
279 | BUG_ON(pte == NULL); |
280 | ||
281 | ptev = pte_mkwrite(*pte); | |
282 | ||
283 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
284 | BUG(); | |
285 | } | |
286 | ||
287 | ||
7708ad64 | 288 | static bool xen_page_pinned(void *ptr) |
e2426cf8 JF |
289 | { |
290 | struct page *page = virt_to_page(ptr); | |
291 | ||
292 | return PagePinned(page); | |
293 | } | |
294 | ||
7708ad64 | 295 | static void xen_extend_mmu_update(const struct mmu_update *update) |
3b827c1b | 296 | { |
d66bf8fc JF |
297 | struct multicall_space mcs; |
298 | struct mmu_update *u; | |
3b827c1b | 299 | |
400d3494 JF |
300 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); |
301 | ||
994025ca JF |
302 | if (mcs.mc != NULL) { |
303 | ADD_STATS(mmu_update_extended, 1); | |
304 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1); | |
305 | ||
400d3494 | 306 | mcs.mc->args[1]++; |
994025ca JF |
307 | |
308 | if (mcs.mc->args[1] < MMU_UPDATE_HISTO) | |
309 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1); | |
310 | else | |
311 | ADD_STATS(mmu_update_histo[0], 1); | |
312 | } else { | |
313 | ADD_STATS(mmu_update, 1); | |
400d3494 JF |
314 | mcs = __xen_mc_entry(sizeof(*u)); |
315 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); | |
994025ca | 316 | ADD_STATS(mmu_update_histo[1], 1); |
400d3494 | 317 | } |
d66bf8fc | 318 | |
d66bf8fc | 319 | u = mcs.args; |
400d3494 JF |
320 | *u = *update; |
321 | } | |
322 | ||
323 | void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) | |
324 | { | |
325 | struct mmu_update u; | |
326 | ||
327 | preempt_disable(); | |
328 | ||
329 | xen_mc_batch(); | |
330 | ||
ce803e70 JF |
331 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
332 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 333 | u.val = pmd_val_ma(val); |
7708ad64 | 334 | xen_extend_mmu_update(&u); |
d66bf8fc | 335 | |
994025ca JF |
336 | ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
337 | ||
d66bf8fc JF |
338 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
339 | ||
340 | preempt_enable(); | |
3b827c1b JF |
341 | } |
342 | ||
e2426cf8 JF |
343 | void xen_set_pmd(pmd_t *ptr, pmd_t val) |
344 | { | |
994025ca JF |
345 | ADD_STATS(pmd_update, 1); |
346 | ||
e2426cf8 JF |
347 | /* If page is not pinned, we can just update the entry |
348 | directly */ | |
7708ad64 | 349 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
350 | *ptr = val; |
351 | return; | |
352 | } | |
353 | ||
994025ca JF |
354 | ADD_STATS(pmd_update_pinned, 1); |
355 | ||
e2426cf8 JF |
356 | xen_set_pmd_hyper(ptr, val); |
357 | } | |
358 | ||
3b827c1b JF |
359 | /* |
360 | * Associate a virtual page frame with a given physical page frame | |
361 | * and protection flags for that frame. | |
362 | */ | |
363 | void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |
364 | { | |
836fe2f2 | 365 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); |
3b827c1b JF |
366 | } |
367 | ||
368 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | |
369 | pte_t *ptep, pte_t pteval) | |
370 | { | |
2bd50036 JF |
371 | /* updates to init_mm may be done without lock */ |
372 | if (mm == &init_mm) | |
373 | preempt_disable(); | |
374 | ||
994025ca JF |
375 | ADD_STATS(set_pte_at, 1); |
376 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); | |
377 | ADD_STATS(set_pte_at_current, mm == current->mm); | |
378 | ADD_STATS(set_pte_at_kernel, mm == &init_mm); | |
379 | ||
d66bf8fc | 380 | if (mm == current->mm || mm == &init_mm) { |
8965c1c0 | 381 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { |
d66bf8fc JF |
382 | struct multicall_space mcs; |
383 | mcs = xen_mc_entry(0); | |
384 | ||
385 | MULTI_update_va_mapping(mcs.mc, addr, pteval, 0); | |
994025ca | 386 | ADD_STATS(set_pte_at_batched, 1); |
d66bf8fc | 387 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
2bd50036 | 388 | goto out; |
d66bf8fc JF |
389 | } else |
390 | if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0) | |
2bd50036 | 391 | goto out; |
d66bf8fc JF |
392 | } |
393 | xen_set_pte(ptep, pteval); | |
2bd50036 JF |
394 | |
395 | out: | |
396 | if (mm == &init_mm) | |
397 | preempt_enable(); | |
3b827c1b JF |
398 | } |
399 | ||
e57778a1 | 400 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
947a69c9 | 401 | { |
e57778a1 JF |
402 | /* Just return the pte as-is. We preserve the bits on commit */ |
403 | return *ptep; | |
404 | } | |
405 | ||
406 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |
407 | pte_t *ptep, pte_t pte) | |
408 | { | |
400d3494 | 409 | struct mmu_update u; |
e57778a1 | 410 | |
400d3494 | 411 | xen_mc_batch(); |
947a69c9 | 412 | |
400d3494 JF |
413 | u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; |
414 | u.val = pte_val_ma(pte); | |
7708ad64 | 415 | xen_extend_mmu_update(&u); |
947a69c9 | 416 | |
994025ca JF |
417 | ADD_STATS(prot_commit, 1); |
418 | ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
419 | ||
e57778a1 | 420 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
947a69c9 JF |
421 | } |
422 | ||
ebb9cfe2 JF |
423 | /* Assume pteval_t is equivalent to all the other *val_t types. */ |
424 | static pteval_t pte_mfn_to_pfn(pteval_t val) | |
947a69c9 | 425 | { |
ebb9cfe2 | 426 | if (val & _PAGE_PRESENT) { |
59438c9f | 427 | unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 428 | pteval_t flags = val & PTE_FLAGS_MASK; |
d8355aca | 429 | val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; |
ebb9cfe2 | 430 | } |
947a69c9 | 431 | |
ebb9cfe2 | 432 | return val; |
947a69c9 JF |
433 | } |
434 | ||
ebb9cfe2 | 435 | static pteval_t pte_pfn_to_mfn(pteval_t val) |
947a69c9 | 436 | { |
ebb9cfe2 | 437 | if (val & _PAGE_PRESENT) { |
59438c9f | 438 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 439 | pteval_t flags = val & PTE_FLAGS_MASK; |
d8355aca | 440 | val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags; |
947a69c9 JF |
441 | } |
442 | ||
ebb9cfe2 | 443 | return val; |
947a69c9 JF |
444 | } |
445 | ||
ebb9cfe2 | 446 | pteval_t xen_pte_val(pte_t pte) |
947a69c9 | 447 | { |
ebb9cfe2 | 448 | return pte_mfn_to_pfn(pte.pte); |
947a69c9 | 449 | } |
947a69c9 | 450 | |
947a69c9 JF |
451 | pgdval_t xen_pgd_val(pgd_t pgd) |
452 | { | |
ebb9cfe2 | 453 | return pte_mfn_to_pfn(pgd.pgd); |
947a69c9 JF |
454 | } |
455 | ||
456 | pte_t xen_make_pte(pteval_t pte) | |
457 | { | |
ebb9cfe2 JF |
458 | pte = pte_pfn_to_mfn(pte); |
459 | return native_make_pte(pte); | |
947a69c9 JF |
460 | } |
461 | ||
462 | pgd_t xen_make_pgd(pgdval_t pgd) | |
463 | { | |
ebb9cfe2 JF |
464 | pgd = pte_pfn_to_mfn(pgd); |
465 | return native_make_pgd(pgd); | |
947a69c9 JF |
466 | } |
467 | ||
468 | pmdval_t xen_pmd_val(pmd_t pmd) | |
469 | { | |
ebb9cfe2 | 470 | return pte_mfn_to_pfn(pmd.pmd); |
947a69c9 | 471 | } |
28499143 | 472 | |
e2426cf8 | 473 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
f4f97b3e | 474 | { |
400d3494 | 475 | struct mmu_update u; |
f4f97b3e | 476 | |
d66bf8fc JF |
477 | preempt_disable(); |
478 | ||
400d3494 JF |
479 | xen_mc_batch(); |
480 | ||
ce803e70 JF |
481 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
482 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 483 | u.val = pud_val_ma(val); |
7708ad64 | 484 | xen_extend_mmu_update(&u); |
d66bf8fc | 485 | |
994025ca JF |
486 | ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
487 | ||
d66bf8fc JF |
488 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
489 | ||
490 | preempt_enable(); | |
f4f97b3e JF |
491 | } |
492 | ||
e2426cf8 JF |
493 | void xen_set_pud(pud_t *ptr, pud_t val) |
494 | { | |
994025ca JF |
495 | ADD_STATS(pud_update, 1); |
496 | ||
e2426cf8 JF |
497 | /* If page is not pinned, we can just update the entry |
498 | directly */ | |
7708ad64 | 499 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
500 | *ptr = val; |
501 | return; | |
502 | } | |
503 | ||
994025ca JF |
504 | ADD_STATS(pud_update_pinned, 1); |
505 | ||
e2426cf8 JF |
506 | xen_set_pud_hyper(ptr, val); |
507 | } | |
508 | ||
f4f97b3e JF |
509 | void xen_set_pte(pte_t *ptep, pte_t pte) |
510 | { | |
994025ca JF |
511 | ADD_STATS(pte_update, 1); |
512 | // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep)); | |
513 | ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
514 | ||
f6e58732 | 515 | #ifdef CONFIG_X86_PAE |
f4f97b3e JF |
516 | ptep->pte_high = pte.pte_high; |
517 | smp_wmb(); | |
518 | ptep->pte_low = pte.pte_low; | |
f6e58732 JF |
519 | #else |
520 | *ptep = pte; | |
521 | #endif | |
f4f97b3e JF |
522 | } |
523 | ||
f6e58732 | 524 | #ifdef CONFIG_X86_PAE |
3b827c1b JF |
525 | void xen_set_pte_atomic(pte_t *ptep, pte_t pte) |
526 | { | |
f6e58732 | 527 | set_64bit((u64 *)ptep, native_pte_val(pte)); |
3b827c1b JF |
528 | } |
529 | ||
530 | void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
531 | { | |
532 | ptep->pte_low = 0; | |
533 | smp_wmb(); /* make sure low gets written first */ | |
534 | ptep->pte_high = 0; | |
535 | } | |
536 | ||
537 | void xen_pmd_clear(pmd_t *pmdp) | |
538 | { | |
e2426cf8 | 539 | set_pmd(pmdp, __pmd(0)); |
3b827c1b | 540 | } |
f6e58732 | 541 | #endif /* CONFIG_X86_PAE */ |
3b827c1b | 542 | |
abf33038 | 543 | pmd_t xen_make_pmd(pmdval_t pmd) |
3b827c1b | 544 | { |
ebb9cfe2 | 545 | pmd = pte_pfn_to_mfn(pmd); |
947a69c9 | 546 | return native_make_pmd(pmd); |
3b827c1b | 547 | } |
3b827c1b | 548 | |
f6e58732 JF |
549 | #if PAGETABLE_LEVELS == 4 |
550 | pudval_t xen_pud_val(pud_t pud) | |
551 | { | |
552 | return pte_mfn_to_pfn(pud.pud); | |
553 | } | |
554 | ||
555 | pud_t xen_make_pud(pudval_t pud) | |
556 | { | |
557 | pud = pte_pfn_to_mfn(pud); | |
558 | ||
559 | return native_make_pud(pud); | |
560 | } | |
561 | ||
d6182fbf | 562 | pgd_t *xen_get_user_pgd(pgd_t *pgd) |
f6e58732 | 563 | { |
d6182fbf JF |
564 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); |
565 | unsigned offset = pgd - pgd_page; | |
566 | pgd_t *user_ptr = NULL; | |
f6e58732 | 567 | |
d6182fbf JF |
568 | if (offset < pgd_index(USER_LIMIT)) { |
569 | struct page *page = virt_to_page(pgd_page); | |
570 | user_ptr = (pgd_t *)page->private; | |
571 | if (user_ptr) | |
572 | user_ptr += offset; | |
573 | } | |
f6e58732 | 574 | |
d6182fbf JF |
575 | return user_ptr; |
576 | } | |
577 | ||
578 | static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
579 | { | |
580 | struct mmu_update u; | |
f6e58732 JF |
581 | |
582 | u.ptr = virt_to_machine(ptr).maddr; | |
583 | u.val = pgd_val_ma(val); | |
7708ad64 | 584 | xen_extend_mmu_update(&u); |
d6182fbf JF |
585 | } |
586 | ||
587 | /* | |
588 | * Raw hypercall-based set_pgd, intended for in early boot before | |
589 | * there's a page structure. This implies: | |
590 | * 1. The only existing pagetable is the kernel's | |
591 | * 2. It is always pinned | |
592 | * 3. It has no user pagetable attached to it | |
593 | */ | |
594 | void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
595 | { | |
596 | preempt_disable(); | |
597 | ||
598 | xen_mc_batch(); | |
599 | ||
600 | __xen_set_pgd_hyper(ptr, val); | |
f6e58732 JF |
601 | |
602 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
603 | ||
604 | preempt_enable(); | |
605 | } | |
606 | ||
607 | void xen_set_pgd(pgd_t *ptr, pgd_t val) | |
608 | { | |
d6182fbf JF |
609 | pgd_t *user_ptr = xen_get_user_pgd(ptr); |
610 | ||
994025ca JF |
611 | ADD_STATS(pgd_update, 1); |
612 | ||
f6e58732 JF |
613 | /* If page is not pinned, we can just update the entry |
614 | directly */ | |
7708ad64 | 615 | if (!xen_page_pinned(ptr)) { |
f6e58732 | 616 | *ptr = val; |
d6182fbf | 617 | if (user_ptr) { |
7708ad64 | 618 | WARN_ON(xen_page_pinned(user_ptr)); |
d6182fbf JF |
619 | *user_ptr = val; |
620 | } | |
f6e58732 JF |
621 | return; |
622 | } | |
623 | ||
994025ca JF |
624 | ADD_STATS(pgd_update_pinned, 1); |
625 | ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
626 | ||
d6182fbf JF |
627 | /* If it's pinned, then we can at least batch the kernel and |
628 | user updates together. */ | |
629 | xen_mc_batch(); | |
630 | ||
631 | __xen_set_pgd_hyper(ptr, val); | |
632 | if (user_ptr) | |
633 | __xen_set_pgd_hyper(user_ptr, val); | |
634 | ||
635 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f6e58732 JF |
636 | } |
637 | #endif /* PAGETABLE_LEVELS == 4 */ | |
638 | ||
f4f97b3e | 639 | /* |
5deb30d1 JF |
640 | * (Yet another) pagetable walker. This one is intended for pinning a |
641 | * pagetable. This means that it walks a pagetable and calls the | |
642 | * callback function on each page it finds making up the page table, | |
643 | * at every level. It walks the entire pagetable, but it only bothers | |
644 | * pinning pte pages which are below limit. In the normal case this | |
645 | * will be STACK_TOP_MAX, but at boot we need to pin up to | |
646 | * FIXADDR_TOP. | |
647 | * | |
648 | * For 32-bit the important bit is that we don't pin beyond there, | |
649 | * because then we start getting into Xen's ptes. | |
650 | * | |
651 | * For 64-bit, we must skip the Xen hole in the middle of the address | |
652 | * space, just after the big x86-64 virtual hole. | |
653 | */ | |
eefb47f6 JF |
654 | static int xen_pgd_walk(struct mm_struct *mm, |
655 | int (*func)(struct mm_struct *mm, struct page *, | |
656 | enum pt_level), | |
7708ad64 | 657 | unsigned long limit) |
3b827c1b | 658 | { |
eefb47f6 | 659 | pgd_t *pgd = mm->pgd; |
f4f97b3e | 660 | int flush = 0; |
5deb30d1 JF |
661 | unsigned hole_low, hole_high; |
662 | unsigned pgdidx_limit, pudidx_limit, pmdidx_limit; | |
663 | unsigned pgdidx, pudidx, pmdidx; | |
f4f97b3e | 664 | |
5deb30d1 JF |
665 | /* The limit is the last byte to be touched */ |
666 | limit--; | |
667 | BUG_ON(limit >= FIXADDR_TOP); | |
3b827c1b JF |
668 | |
669 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
f4f97b3e JF |
670 | return 0; |
671 | ||
5deb30d1 JF |
672 | /* |
673 | * 64-bit has a great big hole in the middle of the address | |
674 | * space, which contains the Xen mappings. On 32-bit these | |
675 | * will end up making a zero-sized hole and so is a no-op. | |
676 | */ | |
d6182fbf | 677 | hole_low = pgd_index(USER_LIMIT); |
5deb30d1 JF |
678 | hole_high = pgd_index(PAGE_OFFSET); |
679 | ||
680 | pgdidx_limit = pgd_index(limit); | |
681 | #if PTRS_PER_PUD > 1 | |
682 | pudidx_limit = pud_index(limit); | |
683 | #else | |
684 | pudidx_limit = 0; | |
685 | #endif | |
686 | #if PTRS_PER_PMD > 1 | |
687 | pmdidx_limit = pmd_index(limit); | |
688 | #else | |
689 | pmdidx_limit = 0; | |
690 | #endif | |
691 | ||
5deb30d1 | 692 | for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) { |
f4f97b3e | 693 | pud_t *pud; |
3b827c1b | 694 | |
5deb30d1 JF |
695 | if (pgdidx >= hole_low && pgdidx < hole_high) |
696 | continue; | |
f4f97b3e | 697 | |
5deb30d1 | 698 | if (!pgd_val(pgd[pgdidx])) |
3b827c1b | 699 | continue; |
f4f97b3e | 700 | |
5deb30d1 | 701 | pud = pud_offset(&pgd[pgdidx], 0); |
3b827c1b JF |
702 | |
703 | if (PTRS_PER_PUD > 1) /* not folded */ | |
eefb47f6 | 704 | flush |= (*func)(mm, virt_to_page(pud), PT_PUD); |
f4f97b3e | 705 | |
5deb30d1 | 706 | for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) { |
f4f97b3e | 707 | pmd_t *pmd; |
f4f97b3e | 708 | |
5deb30d1 JF |
709 | if (pgdidx == pgdidx_limit && |
710 | pudidx > pudidx_limit) | |
711 | goto out; | |
3b827c1b | 712 | |
5deb30d1 | 713 | if (pud_none(pud[pudidx])) |
3b827c1b | 714 | continue; |
f4f97b3e | 715 | |
5deb30d1 | 716 | pmd = pmd_offset(&pud[pudidx], 0); |
3b827c1b JF |
717 | |
718 | if (PTRS_PER_PMD > 1) /* not folded */ | |
eefb47f6 | 719 | flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); |
f4f97b3e | 720 | |
5deb30d1 JF |
721 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) { |
722 | struct page *pte; | |
723 | ||
724 | if (pgdidx == pgdidx_limit && | |
725 | pudidx == pudidx_limit && | |
726 | pmdidx > pmdidx_limit) | |
727 | goto out; | |
3b827c1b | 728 | |
5deb30d1 | 729 | if (pmd_none(pmd[pmdidx])) |
3b827c1b JF |
730 | continue; |
731 | ||
5deb30d1 | 732 | pte = pmd_page(pmd[pmdidx]); |
eefb47f6 | 733 | flush |= (*func)(mm, pte, PT_PTE); |
3b827c1b JF |
734 | } |
735 | } | |
736 | } | |
11ad93e5 | 737 | |
5deb30d1 | 738 | out: |
11ad93e5 JF |
739 | /* Do the top level last, so that the callbacks can use it as |
740 | a cue to do final things like tlb flushes. */ | |
eefb47f6 | 741 | flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); |
f4f97b3e JF |
742 | |
743 | return flush; | |
3b827c1b JF |
744 | } |
745 | ||
7708ad64 JF |
746 | /* If we're using split pte locks, then take the page's lock and |
747 | return a pointer to it. Otherwise return NULL. */ | |
eefb47f6 | 748 | static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) |
74260714 JF |
749 | { |
750 | spinlock_t *ptl = NULL; | |
751 | ||
f7d0b926 | 752 | #if USE_SPLIT_PTLOCKS |
74260714 | 753 | ptl = __pte_lockptr(page); |
eefb47f6 | 754 | spin_lock_nest_lock(ptl, &mm->page_table_lock); |
74260714 JF |
755 | #endif |
756 | ||
757 | return ptl; | |
758 | } | |
759 | ||
7708ad64 | 760 | static void xen_pte_unlock(void *v) |
74260714 JF |
761 | { |
762 | spinlock_t *ptl = v; | |
763 | spin_unlock(ptl); | |
764 | } | |
765 | ||
766 | static void xen_do_pin(unsigned level, unsigned long pfn) | |
767 | { | |
768 | struct mmuext_op *op; | |
769 | struct multicall_space mcs; | |
770 | ||
771 | mcs = __xen_mc_entry(sizeof(*op)); | |
772 | op = mcs.args; | |
773 | op->cmd = level; | |
774 | op->arg1.mfn = pfn_to_mfn(pfn); | |
775 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
776 | } | |
777 | ||
eefb47f6 JF |
778 | static int xen_pin_page(struct mm_struct *mm, struct page *page, |
779 | enum pt_level level) | |
f4f97b3e | 780 | { |
d60cd46b | 781 | unsigned pgfl = TestSetPagePinned(page); |
f4f97b3e JF |
782 | int flush; |
783 | ||
784 | if (pgfl) | |
785 | flush = 0; /* already pinned */ | |
786 | else if (PageHighMem(page)) | |
787 | /* kmaps need flushing if we found an unpinned | |
788 | highpage */ | |
789 | flush = 1; | |
790 | else { | |
791 | void *pt = lowmem_page_address(page); | |
792 | unsigned long pfn = page_to_pfn(page); | |
793 | struct multicall_space mcs = __xen_mc_entry(0); | |
74260714 | 794 | spinlock_t *ptl; |
f4f97b3e JF |
795 | |
796 | flush = 0; | |
797 | ||
11ad93e5 JF |
798 | /* |
799 | * We need to hold the pagetable lock between the time | |
800 | * we make the pagetable RO and when we actually pin | |
801 | * it. If we don't, then other users may come in and | |
802 | * attempt to update the pagetable by writing it, | |
803 | * which will fail because the memory is RO but not | |
804 | * pinned, so Xen won't do the trap'n'emulate. | |
805 | * | |
806 | * If we're using split pte locks, we can't hold the | |
807 | * entire pagetable's worth of locks during the | |
808 | * traverse, because we may wrap the preempt count (8 | |
809 | * bits). The solution is to mark RO and pin each PTE | |
810 | * page while holding the lock. This means the number | |
811 | * of locks we end up holding is never more than a | |
812 | * batch size (~32 entries, at present). | |
813 | * | |
814 | * If we're not using split pte locks, we needn't pin | |
815 | * the PTE pages independently, because we're | |
816 | * protected by the overall pagetable lock. | |
817 | */ | |
74260714 JF |
818 | ptl = NULL; |
819 | if (level == PT_PTE) | |
eefb47f6 | 820 | ptl = xen_pte_lock(page, mm); |
74260714 | 821 | |
f4f97b3e JF |
822 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, |
823 | pfn_pte(pfn, PAGE_KERNEL_RO), | |
74260714 JF |
824 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
825 | ||
11ad93e5 | 826 | if (ptl) { |
74260714 JF |
827 | xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); |
828 | ||
74260714 JF |
829 | /* Queue a deferred unlock for when this batch |
830 | is completed. */ | |
7708ad64 | 831 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 832 | } |
f4f97b3e JF |
833 | } |
834 | ||
835 | return flush; | |
836 | } | |
3b827c1b | 837 | |
f4f97b3e JF |
838 | /* This is called just after a mm has been created, but it has not |
839 | been used yet. We need to make sure that its pagetable is all | |
840 | read-only, and can be pinned. */ | |
eefb47f6 | 841 | static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) |
3b827c1b | 842 | { |
f4f97b3e | 843 | xen_mc_batch(); |
3b827c1b | 844 | |
eefb47f6 | 845 | if (xen_pgd_walk(mm, xen_pin_page, USER_LIMIT)) { |
f87e4cac JF |
846 | /* re-enable interrupts for kmap_flush_unused */ |
847 | xen_mc_issue(0); | |
f4f97b3e | 848 | kmap_flush_unused(); |
db64fe02 | 849 | vm_unmap_aliases(); |
f87e4cac JF |
850 | xen_mc_batch(); |
851 | } | |
f4f97b3e | 852 | |
d6182fbf JF |
853 | #ifdef CONFIG_X86_64 |
854 | { | |
855 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
856 | ||
857 | xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); | |
858 | ||
859 | if (user_pgd) { | |
eefb47f6 | 860 | xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); |
d6182fbf JF |
861 | xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd))); |
862 | } | |
863 | } | |
864 | #else /* CONFIG_X86_32 */ | |
5deb30d1 JF |
865 | #ifdef CONFIG_X86_PAE |
866 | /* Need to make sure unshared kernel PMD is pinnable */ | |
eefb47f6 JF |
867 | xen_pin_page(mm, virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), |
868 | PT_PMD); | |
5deb30d1 | 869 | #endif |
28499143 | 870 | xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); |
d6182fbf | 871 | #endif /* CONFIG_X86_64 */ |
f4f97b3e | 872 | xen_mc_issue(0); |
3b827c1b JF |
873 | } |
874 | ||
eefb47f6 JF |
875 | static void xen_pgd_pin(struct mm_struct *mm) |
876 | { | |
877 | __xen_pgd_pin(mm, mm->pgd); | |
878 | } | |
879 | ||
0e91398f JF |
880 | /* |
881 | * On save, we need to pin all pagetables to make sure they get their | |
882 | * mfns turned into pfns. Search the list for any unpinned pgds and pin | |
883 | * them (unpinned pgds are not currently in use, probably because the | |
884 | * process is under construction or destruction). | |
eefb47f6 JF |
885 | * |
886 | * Expected to be called in stop_machine() ("equivalent to taking | |
887 | * every spinlock in the system"), so the locking doesn't really | |
888 | * matter all that much. | |
0e91398f JF |
889 | */ |
890 | void xen_mm_pin_all(void) | |
891 | { | |
892 | unsigned long flags; | |
893 | struct page *page; | |
74260714 | 894 | |
0e91398f | 895 | spin_lock_irqsave(&pgd_lock, flags); |
f4f97b3e | 896 | |
0e91398f JF |
897 | list_for_each_entry(page, &pgd_list, lru) { |
898 | if (!PagePinned(page)) { | |
eefb47f6 | 899 | __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
900 | SetPageSavePinned(page); |
901 | } | |
902 | } | |
903 | ||
904 | spin_unlock_irqrestore(&pgd_lock, flags); | |
3b827c1b JF |
905 | } |
906 | ||
c1f2f09e EH |
907 | /* |
908 | * The init_mm pagetable is really pinned as soon as its created, but | |
909 | * that's before we have page structures to store the bits. So do all | |
910 | * the book-keeping now. | |
911 | */ | |
eefb47f6 JF |
912 | static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page, |
913 | enum pt_level level) | |
3b827c1b | 914 | { |
f4f97b3e JF |
915 | SetPagePinned(page); |
916 | return 0; | |
917 | } | |
3b827c1b | 918 | |
f4f97b3e JF |
919 | void __init xen_mark_init_mm_pinned(void) |
920 | { | |
eefb47f6 | 921 | xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); |
f4f97b3e | 922 | } |
3b827c1b | 923 | |
eefb47f6 JF |
924 | static int xen_unpin_page(struct mm_struct *mm, struct page *page, |
925 | enum pt_level level) | |
f4f97b3e | 926 | { |
d60cd46b | 927 | unsigned pgfl = TestClearPagePinned(page); |
3b827c1b | 928 | |
f4f97b3e JF |
929 | if (pgfl && !PageHighMem(page)) { |
930 | void *pt = lowmem_page_address(page); | |
931 | unsigned long pfn = page_to_pfn(page); | |
74260714 JF |
932 | spinlock_t *ptl = NULL; |
933 | struct multicall_space mcs; | |
934 | ||
11ad93e5 JF |
935 | /* |
936 | * Do the converse to pin_page. If we're using split | |
937 | * pte locks, we must be holding the lock for while | |
938 | * the pte page is unpinned but still RO to prevent | |
939 | * concurrent updates from seeing it in this | |
940 | * partially-pinned state. | |
941 | */ | |
74260714 | 942 | if (level == PT_PTE) { |
eefb47f6 | 943 | ptl = xen_pte_lock(page, mm); |
74260714 | 944 | |
11ad93e5 JF |
945 | if (ptl) |
946 | xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); | |
74260714 JF |
947 | } |
948 | ||
949 | mcs = __xen_mc_entry(0); | |
f4f97b3e JF |
950 | |
951 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, | |
952 | pfn_pte(pfn, PAGE_KERNEL), | |
74260714 JF |
953 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
954 | ||
955 | if (ptl) { | |
956 | /* unlock when batch completed */ | |
7708ad64 | 957 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 958 | } |
f4f97b3e JF |
959 | } |
960 | ||
961 | return 0; /* never need to flush on unpin */ | |
3b827c1b JF |
962 | } |
963 | ||
f4f97b3e | 964 | /* Release a pagetables pages back as normal RW */ |
eefb47f6 | 965 | static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) |
f4f97b3e | 966 | { |
f4f97b3e JF |
967 | xen_mc_batch(); |
968 | ||
74260714 | 969 | xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); |
f4f97b3e | 970 | |
d6182fbf JF |
971 | #ifdef CONFIG_X86_64 |
972 | { | |
973 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
974 | ||
975 | if (user_pgd) { | |
976 | xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd))); | |
eefb47f6 | 977 | xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); |
d6182fbf JF |
978 | } |
979 | } | |
980 | #endif | |
981 | ||
5deb30d1 JF |
982 | #ifdef CONFIG_X86_PAE |
983 | /* Need to make sure unshared kernel PMD is unpinned */ | |
eefb47f6 JF |
984 | xen_unpin_page(mm, virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), |
985 | PT_PMD); | |
5deb30d1 | 986 | #endif |
d6182fbf | 987 | |
eefb47f6 | 988 | xen_pgd_walk(mm, xen_unpin_page, USER_LIMIT); |
f4f97b3e JF |
989 | |
990 | xen_mc_issue(0); | |
991 | } | |
3b827c1b | 992 | |
eefb47f6 JF |
993 | static void xen_pgd_unpin(struct mm_struct *mm) |
994 | { | |
995 | __xen_pgd_unpin(mm, mm->pgd); | |
996 | } | |
997 | ||
0e91398f JF |
998 | /* |
999 | * On resume, undo any pinning done at save, so that the rest of the | |
1000 | * kernel doesn't see any unexpected pinned pagetables. | |
1001 | */ | |
1002 | void xen_mm_unpin_all(void) | |
1003 | { | |
1004 | unsigned long flags; | |
1005 | struct page *page; | |
1006 | ||
1007 | spin_lock_irqsave(&pgd_lock, flags); | |
1008 | ||
1009 | list_for_each_entry(page, &pgd_list, lru) { | |
1010 | if (PageSavePinned(page)) { | |
1011 | BUG_ON(!PagePinned(page)); | |
eefb47f6 | 1012 | __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
1013 | ClearPageSavePinned(page); |
1014 | } | |
1015 | } | |
1016 | ||
1017 | spin_unlock_irqrestore(&pgd_lock, flags); | |
1018 | } | |
1019 | ||
3b827c1b JF |
1020 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
1021 | { | |
f4f97b3e | 1022 | spin_lock(&next->page_table_lock); |
eefb47f6 | 1023 | xen_pgd_pin(next); |
f4f97b3e | 1024 | spin_unlock(&next->page_table_lock); |
3b827c1b JF |
1025 | } |
1026 | ||
1027 | void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) | |
1028 | { | |
f4f97b3e | 1029 | spin_lock(&mm->page_table_lock); |
eefb47f6 | 1030 | xen_pgd_pin(mm); |
f4f97b3e | 1031 | spin_unlock(&mm->page_table_lock); |
3b827c1b JF |
1032 | } |
1033 | ||
3b827c1b | 1034 | |
f87e4cac JF |
1035 | #ifdef CONFIG_SMP |
1036 | /* Another cpu may still have their %cr3 pointing at the pagetable, so | |
1037 | we need to repoint it somewhere else before we can unpin it. */ | |
1038 | static void drop_other_mm_ref(void *info) | |
1039 | { | |
1040 | struct mm_struct *mm = info; | |
ce87b3d3 | 1041 | struct mm_struct *active_mm; |
3b827c1b | 1042 | |
ce87b3d3 JF |
1043 | #ifdef CONFIG_X86_64 |
1044 | active_mm = read_pda(active_mm); | |
1045 | #else | |
1046 | active_mm = __get_cpu_var(cpu_tlbstate).active_mm; | |
1047 | #endif | |
1048 | ||
1049 | if (active_mm == mm) | |
f87e4cac | 1050 | leave_mm(smp_processor_id()); |
9f79991d JF |
1051 | |
1052 | /* If this cpu still has a stale cr3 reference, then make sure | |
1053 | it has been flushed. */ | |
1054 | if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) { | |
1055 | load_cr3(swapper_pg_dir); | |
1056 | arch_flush_lazy_cpu_mode(); | |
1057 | } | |
f87e4cac | 1058 | } |
3b827c1b | 1059 | |
7708ad64 | 1060 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac | 1061 | { |
9f79991d JF |
1062 | cpumask_t mask; |
1063 | unsigned cpu; | |
1064 | ||
f87e4cac JF |
1065 | if (current->active_mm == mm) { |
1066 | if (current->mm == mm) | |
1067 | load_cr3(swapper_pg_dir); | |
1068 | else | |
1069 | leave_mm(smp_processor_id()); | |
9f79991d JF |
1070 | arch_flush_lazy_cpu_mode(); |
1071 | } | |
1072 | ||
1073 | /* Get the "official" set of cpus referring to our pagetable. */ | |
1074 | mask = mm->cpu_vm_mask; | |
1075 | ||
1076 | /* It's possible that a vcpu may have a stale reference to our | |
1077 | cr3, because its in lazy mode, and it hasn't yet flushed | |
1078 | its set of pending hypercalls yet. In this case, we can | |
1079 | look at its actual current cr3 value, and force it to flush | |
1080 | if needed. */ | |
1081 | for_each_online_cpu(cpu) { | |
1082 | if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) | |
1083 | cpu_set(cpu, mask); | |
3b827c1b JF |
1084 | } |
1085 | ||
9f79991d | 1086 | if (!cpus_empty(mask)) |
3b16cf87 | 1087 | smp_call_function_mask(mask, drop_other_mm_ref, mm, 1); |
f87e4cac JF |
1088 | } |
1089 | #else | |
7708ad64 | 1090 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac JF |
1091 | { |
1092 | if (current->active_mm == mm) | |
1093 | load_cr3(swapper_pg_dir); | |
1094 | } | |
1095 | #endif | |
1096 | ||
1097 | /* | |
1098 | * While a process runs, Xen pins its pagetables, which means that the | |
1099 | * hypervisor forces it to be read-only, and it controls all updates | |
1100 | * to it. This means that all pagetable updates have to go via the | |
1101 | * hypervisor, which is moderately expensive. | |
1102 | * | |
1103 | * Since we're pulling the pagetable down, we switch to use init_mm, | |
1104 | * unpin old process pagetable and mark it all read-write, which | |
1105 | * allows further operations on it to be simple memory accesses. | |
1106 | * | |
1107 | * The only subtle point is that another CPU may be still using the | |
1108 | * pagetable because of lazy tlb flushing. This means we need need to | |
1109 | * switch all CPUs off this pagetable before we can unpin it. | |
1110 | */ | |
1111 | void xen_exit_mmap(struct mm_struct *mm) | |
1112 | { | |
1113 | get_cpu(); /* make sure we don't move around */ | |
7708ad64 | 1114 | xen_drop_mm_ref(mm); |
f87e4cac | 1115 | put_cpu(); |
3b827c1b | 1116 | |
f120f13e | 1117 | spin_lock(&mm->page_table_lock); |
df912ea4 JF |
1118 | |
1119 | /* pgd may not be pinned in the error exit path of execve */ | |
7708ad64 | 1120 | if (xen_page_pinned(mm->pgd)) |
eefb47f6 | 1121 | xen_pgd_unpin(mm); |
74260714 | 1122 | |
f120f13e | 1123 | spin_unlock(&mm->page_table_lock); |
3b827c1b | 1124 | } |
994025ca JF |
1125 | |
1126 | #ifdef CONFIG_XEN_DEBUG_FS | |
1127 | ||
1128 | static struct dentry *d_mmu_debug; | |
1129 | ||
1130 | static int __init xen_mmu_debugfs(void) | |
1131 | { | |
1132 | struct dentry *d_xen = xen_init_debugfs(); | |
1133 | ||
1134 | if (d_xen == NULL) | |
1135 | return -ENOMEM; | |
1136 | ||
1137 | d_mmu_debug = debugfs_create_dir("mmu", d_xen); | |
1138 | ||
1139 | debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats); | |
1140 | ||
1141 | debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update); | |
1142 | debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug, | |
1143 | &mmu_stats.pgd_update_pinned); | |
1144 | debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug, | |
1145 | &mmu_stats.pgd_update_pinned); | |
1146 | ||
1147 | debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update); | |
1148 | debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug, | |
1149 | &mmu_stats.pud_update_pinned); | |
1150 | debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug, | |
1151 | &mmu_stats.pud_update_pinned); | |
1152 | ||
1153 | debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update); | |
1154 | debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug, | |
1155 | &mmu_stats.pmd_update_pinned); | |
1156 | debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug, | |
1157 | &mmu_stats.pmd_update_pinned); | |
1158 | ||
1159 | debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update); | |
1160 | // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug, | |
1161 | // &mmu_stats.pte_update_pinned); | |
1162 | debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug, | |
1163 | &mmu_stats.pte_update_pinned); | |
1164 | ||
1165 | debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update); | |
1166 | debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug, | |
1167 | &mmu_stats.mmu_update_extended); | |
1168 | xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug, | |
1169 | mmu_stats.mmu_update_histo, 20); | |
1170 | ||
1171 | debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at); | |
1172 | debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug, | |
1173 | &mmu_stats.set_pte_at_batched); | |
1174 | debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug, | |
1175 | &mmu_stats.set_pte_at_current); | |
1176 | debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug, | |
1177 | &mmu_stats.set_pte_at_kernel); | |
1178 | ||
1179 | debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit); | |
1180 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, | |
1181 | &mmu_stats.prot_commit_batched); | |
1182 | ||
1183 | return 0; | |
1184 | } | |
1185 | fs_initcall(xen_mmu_debugfs); | |
1186 | ||
1187 | #endif /* CONFIG_XEN_DEBUG_FS */ |