[linux.git] / drivers / i2c / busses / i2c-sis96x.c

/*
    Copyright (c) 2003 Mark M. Hoffman <[email protected]>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    This module must be considered BETA unless and until
    the chipset manufacturer releases a datasheet.
    The register definitions are based on the SiS630.

    This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
    for just about every machine for which users have reported.
    If this module isn't detecting your 96x south bridge, have a 
    look there.

    We assume there can only be one SiS96x with one SMBus interface.
*/

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/io.h>

/* base address register in PCI config space */
#define SIS96x_BAR 0x04

/* SiS96x SMBus registers */
#define SMB_STS      0x00
#define SMB_EN       0x01
#define SMB_CNT      0x02
#define SMB_HOST_CNT 0x03
#define SMB_ADDR     0x04
#define SMB_CMD      0x05
#define SMB_PCOUNT   0x06
#define SMB_COUNT    0x07
#define SMB_BYTE     0x08
#define SMB_DEV_ADDR 0x10
#define SMB_DB0      0x11
#define SMB_DB1      0x12
#define SMB_SAA      0x13

/* register count for request_region */
#define SMB_IOSIZE 0x20

/* Other settings */
#define MAX_TIMEOUT 500

/* SiS96x SMBus constants */
#define SIS96x_QUICK      0x00
#define SIS96x_BYTE       0x01
#define SIS96x_BYTE_DATA  0x02
#define SIS96x_WORD_DATA  0x03
#define SIS96x_PROC_CALL  0x04
#define SIS96x_BLOCK_DATA 0x05

static struct pci_driver sis96x_driver;
static struct i2c_adapter sis96x_adapter;
static u16 sis96x_smbus_base;

static inline u8 sis96x_read(u8 reg)
{
	return inb(sis96x_smbus_base + reg) ;
}

static inline void sis96x_write(u8 reg, u8 data)
{
	outb(data, sis96x_smbus_base + reg) ;
}

/* Execute a SMBus transaction.
   int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
 */
static int sis96x_transaction(int size)
{
	int temp;
	int result = 0;
	int timeout = 0;

	dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);

	/* Make sure the SMBus host is ready to start transmitting */
	if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {

		dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
			"Resetting...\n", temp);

		/* kill the transaction */
		sis96x_write(SMB_HOST_CNT, 0x20);

		/* check it again */
		if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
			dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
			return -EBUSY;
		} else {
			dev_dbg(&sis96x_adapter.dev, "Successful\n");
		}
	}

	/* Turn off timeout interrupts, set fast host clock */
	sis96x_write(SMB_CNT, 0x20);

	/* clear all (sticky) status flags */
	temp = sis96x_read(SMB_STS);
	sis96x_write(SMB_STS, temp & 0x1e);

	/* start the transaction by setting bit 4 and size bits */
	sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));

	/* We will always wait for a fraction of a second! */
	do {
		msleep(1);
		temp = sis96x_read(SMB_STS);
	} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));

	/* If the SMBus is still busy, we give up */
	if (timeout > MAX_TIMEOUT) {
		dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
		result = -ETIMEDOUT;
	}

	/* device error - probably missing ACK */
	if (temp & 0x02) {
		dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
		result = -ENXIO;
	}

	/* bus collision */
	if (temp & 0x04) {
		dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
		result = -EIO;
	}

	/* Finish up by resetting the bus */
	sis96x_write(SMB_STS, temp);
	if ((temp = sis96x_read(SMB_STS))) {
		dev_dbg(&sis96x_adapter.dev, "Failed reset at "
			"end of transaction! (0x%02x)\n", temp);
	}

	return result;
}

/* Return negative errno on error. */
static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
			 unsigned short flags, char read_write,
			 u8 command, int size, union i2c_smbus_data * data)
{
	int status;

	switch (size) {
	case I2C_SMBUS_QUICK:
		sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
		size = SIS96x_QUICK;
		break;

	case I2C_SMBUS_BYTE:
		sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
		if (read_write == I2C_SMBUS_WRITE)
			sis96x_write(SMB_CMD, command);
		size = SIS96x_BYTE;
		break;

	case I2C_SMBUS_BYTE_DATA:
		sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
		sis96x_write(SMB_CMD, command);
		if (read_write == I2C_SMBUS_WRITE)
			sis96x_write(SMB_BYTE, data->byte);
		size = SIS96x_BYTE_DATA;
		break;

	case I2C_SMBUS_PROC_CALL:
	case I2C_SMBUS_WORD_DATA:
		sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
		sis96x_write(SMB_CMD, command);
		if (read_write == I2C_SMBUS_WRITE) {
			sis96x_write(SMB_BYTE, data->word & 0xff);
			sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
		}
		size = (size == I2C_SMBUS_PROC_CALL ? 
			SIS96x_PROC_CALL : SIS96x_WORD_DATA);
		break;

	default:
		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
		return -EOPNOTSUPP;
	}

	status = sis96x_transaction(size);
	if (status)
		return status;

	if ((size != SIS96x_PROC_CALL) &&
		((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
		return 0;

	switch (size) {
	case SIS96x_BYTE:
	case SIS96x_BYTE_DATA:
		data->byte = sis96x_read(SMB_BYTE);
		break;

	case SIS96x_WORD_DATA:
	case SIS96x_PROC_CALL:
		data->word = sis96x_read(SMB_BYTE) +
				(sis96x_read(SMB_BYTE + 1) << 8);
		break;
	}
	return 0;
}

static u32 sis96x_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	    I2C_FUNC_SMBUS_PROC_CALL;
}

static const struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= sis96x_access,
	.functionality	= sis96x_func,
};

static struct i2c_adapter sis96x_adapter = {
	.owner		= THIS_MODULE,
	.class		= I2C_CLASS_HWMON | I2C_CLASS_SPD,
	.algo		= &smbus_algorithm,
};

static DEFINE_PCI_DEVICE_TABLE(sis96x_ids) = {
	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
	{ 0, }
};

MODULE_DEVICE_TABLE (pci, sis96x_ids);

static int sis96x_probe(struct pci_dev *dev,
				const struct pci_device_id *id)
{
	u16 ww = 0;
	int retval;

	if (sis96x_smbus_base) {
		dev_err(&dev->dev, "Only one device supported.\n");
		return -EBUSY;
	}

	pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
	if (PCI_CLASS_SERIAL_SMBUS != ww) {
		dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
		return -ENODEV;
	}

	sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
	if (!sis96x_smbus_base) {
		dev_err(&dev->dev, "SiS96x SMBus base address "
			"not initialized!\n");
		return -EINVAL;
	}
	dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
			sis96x_smbus_base);

	retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]);
	if (retval)
		return -ENODEV;

	/* Everything is happy, let's grab the memory and set things up. */
	if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
			    sis96x_driver.name)) {
		dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
			"already in use!\n", sis96x_smbus_base,
			sis96x_smbus_base + SMB_IOSIZE - 1);

		sis96x_smbus_base = 0;
		return -EINVAL;
	}

	/* set up the sysfs linkage to our parent device */
	sis96x_adapter.dev.parent = &dev->dev;

	snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
		"SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);

	if ((retval = i2c_add_adapter(&sis96x_adapter))) {
		dev_err(&dev->dev, "Couldn't register adapter!\n");
		release_region(sis96x_smbus_base, SMB_IOSIZE);
		sis96x_smbus_base = 0;
	}

	return retval;
}

static void sis96x_remove(struct pci_dev *dev)
{
	if (sis96x_smbus_base) {
		i2c_del_adapter(&sis96x_adapter);
		release_region(sis96x_smbus_base, SMB_IOSIZE);
		sis96x_smbus_base = 0;
	}
}

static struct pci_driver sis96x_driver = {
	.name		= "sis96x_smbus",
	.id_table	= sis96x_ids,
	.probe		= sis96x_probe,
	.remove		= sis96x_remove,
};

module_pci_driver(sis96x_driver);

MODULE_AUTHOR("Mark M. Hoffman <[email protected]>");
MODULE_DESCRIPTION("SiS96x SMBus driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	Copyright (c) 2003 Mark M. Hoffman <[email protected]>
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	17	*/
	18
	19	/*
	20	This module must be considered BETA unless and until
	21	the chipset manufacturer releases a datasheet.
	22	The register definitions are based on the SiS630.
	23
	24	This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
	25	for just about every machine for which users have reported.
	26	If this module isn't detecting your 96x south bridge, have a
	27	look there.
	28
	29	We assume there can only be one SiS96x with one SMBus interface.
	30	*/
	31
1da177e4 LT	32	#include <linux/module.h>
	33	#include <linux/pci.h>
	34	#include <linux/kernel.h>
	35	#include <linux/delay.h>
	36	#include <linux/stddef.h>
1da177e4 LT	37	#include <linux/ioport.h>
1da177e4 LT	38	#include <linux/i2c.h>
54fb4a05	39	#include <linux/acpi.h>
21782180	40	#include <linux/io.h>
1da177e4	41
1da177e4 LT	42	/* base address register in PCI config space */
	43	#define SIS96x_BAR 0x04
	44
	45	/* SiS96x SMBus registers */
	46	#define SMB_STS 0x00
	47	#define SMB_EN 0x01
	48	#define SMB_CNT 0x02
	49	#define SMB_HOST_CNT 0x03
	50	#define SMB_ADDR 0x04
	51	#define SMB_CMD 0x05
	52	#define SMB_PCOUNT 0x06
	53	#define SMB_COUNT 0x07
	54	#define SMB_BYTE 0x08
	55	#define SMB_DEV_ADDR 0x10
	56	#define SMB_DB0 0x11
	57	#define SMB_DB1 0x12
	58	#define SMB_SAA 0x13
	59
	60	/* register count for request_region */
	61	#define SMB_IOSIZE 0x20
	62
	63	/* Other settings */
	64	#define MAX_TIMEOUT 500
	65
	66	/* SiS96x SMBus constants */
	67	#define SIS96x_QUICK 0x00
	68	#define SIS96x_BYTE 0x01
	69	#define SIS96x_BYTE_DATA 0x02
	70	#define SIS96x_WORD_DATA 0x03
	71	#define SIS96x_PROC_CALL 0x04
	72	#define SIS96x_BLOCK_DATA 0x05
	73
d6072f84	74	static struct pci_driver sis96x_driver;
1da177e4	75	static struct i2c_adapter sis96x_adapter;
60507095	76	static u16 sis96x_smbus_base;
1da177e4 LT	77
	78	static inline u8 sis96x_read(u8 reg)
	79	{
	80	return inb(sis96x_smbus_base + reg) ;
	81	}
	82
	83	static inline void sis96x_write(u8 reg, u8 data)
	84	{
	85	outb(data, sis96x_smbus_base + reg) ;
	86	}
	87
	88	/* Execute a SMBus transaction.
	89	int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
	90	*/
	91	static int sis96x_transaction(int size)
	92	{
	93	int temp;
	94	int result = 0;
	95	int timeout = 0;
	96
	97	dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
	98
	99	/* Make sure the SMBus host is ready to start transmitting */
	100	if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
	101
	102	dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
	103	"Resetting...\n", temp);
	104
	105	/* kill the transaction */
	106	sis96x_write(SMB_HOST_CNT, 0x20);
	107
	108	/* check it again */
	109	if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
	110	dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
97140342	111	return -EBUSY;
1da177e4 LT	112	} else {
	113	dev_dbg(&sis96x_adapter.dev, "Successful\n");
	114	}
	115	}
	116
	117	/* Turn off timeout interrupts, set fast host clock */
	118	sis96x_write(SMB_CNT, 0x20);
	119
	120	/* clear all (sticky) status flags */
	121	temp = sis96x_read(SMB_STS);
	122	sis96x_write(SMB_STS, temp & 0x1e);
	123
	124	/* start the transaction by setting bit 4 and size bits */
	125	sis96x_write(SMB_HOST_CNT, 0x10 \| (size & 0x07));
	126
	127	/* We will always wait for a fraction of a second! */
	128	do {
	129	msleep(1);
	130	temp = sis96x_read(SMB_STS);
	131	} while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
	132
	133	/* If the SMBus is still busy, we give up */
4ccc28f7	134	if (timeout > MAX_TIMEOUT) {
1da177e4	135	dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
97140342	136	result = -ETIMEDOUT;
1da177e4 LT	137	}
	138
	139	/* device error - probably missing ACK */
	140	if (temp & 0x02) {
	141	dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
97140342	142	result = -ENXIO;
1da177e4 LT	143	}
	144
	145	/* bus collision */
	146	if (temp & 0x04) {
	147	dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
97140342	148	result = -EIO;
1da177e4 LT	149	}
	150
	151	/* Finish up by resetting the bus */
	152	sis96x_write(SMB_STS, temp);
	153	if ((temp = sis96x_read(SMB_STS))) {
	154	dev_dbg(&sis96x_adapter.dev, "Failed reset at "
	155	"end of transaction! (0x%02x)\n", temp);
	156	}
	157
	158	return result;
	159	}
	160
97140342	161	/* Return negative errno on error. */
1da177e4 LT	162	static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
	163	unsigned short flags, char read_write,
	164	u8 command, int size, union i2c_smbus_data * data)
	165	{
97140342	166	int status;
1da177e4 LT	167
	168	switch (size) {
	169	case I2C_SMBUS_QUICK:
	170	sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) \| (read_write & 0x01));
	171	size = SIS96x_QUICK;
	172	break;
	173
	174	case I2C_SMBUS_BYTE:
	175	sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) \| (read_write & 0x01));
	176	if (read_write == I2C_SMBUS_WRITE)
	177	sis96x_write(SMB_CMD, command);
	178	size = SIS96x_BYTE;
	179	break;
	180
	181	case I2C_SMBUS_BYTE_DATA:
	182	sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) \| (read_write & 0x01));
	183	sis96x_write(SMB_CMD, command);
	184	if (read_write == I2C_SMBUS_WRITE)
	185	sis96x_write(SMB_BYTE, data->byte);
	186	size = SIS96x_BYTE_DATA;
	187	break;
	188
	189	case I2C_SMBUS_PROC_CALL:
	190	case I2C_SMBUS_WORD_DATA:
	191	sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) \| (read_write & 0x01));
	192	sis96x_write(SMB_CMD, command);
	193	if (read_write == I2C_SMBUS_WRITE) {
	194	sis96x_write(SMB_BYTE, data->word & 0xff);
	195	sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
	196	}
	197	size = (size == I2C_SMBUS_PROC_CALL ?
	198	SIS96x_PROC_CALL : SIS96x_WORD_DATA);
	199	break;
	200
1da177e4	201	default:
ac7fc4fb	202	dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
97140342	203	return -EOPNOTSUPP;
1da177e4 LT	204	}
1da177e4 LT	205
97140342 DB	206	status = sis96x_transaction(size);
	207	if (status)
	208	return status;
1da177e4 LT	209
	210	if ((size != SIS96x_PROC_CALL) &&
	211	((read_write == I2C_SMBUS_WRITE) \|\| (size == SIS96x_QUICK)))
	212	return 0;
	213
	214	switch (size) {
	215	case SIS96x_BYTE:
	216	case SIS96x_BYTE_DATA:
	217	data->byte = sis96x_read(SMB_BYTE);
	218	break;
	219
	220	case SIS96x_WORD_DATA:
	221	case SIS96x_PROC_CALL:
	222	data->word = sis96x_read(SMB_BYTE) +
	223	(sis96x_read(SMB_BYTE + 1) << 8);
	224	break;
	225	}
	226	return 0;
	227	}
	228
	229	static u32 sis96x_func(struct i2c_adapter *adapter)
	230	{
	231	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	232	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	233	I2C_FUNC_SMBUS_PROC_CALL;
	234	}
	235
8f9082c5	236	static const struct i2c_algorithm smbus_algorithm = {
1da177e4 LT	237	.smbus_xfer = sis96x_access,
	238	.functionality = sis96x_func,
	239	};
	240
	241	static struct i2c_adapter sis96x_adapter = {
	242	.owner = THIS_MODULE,
3401b2ff	243	.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD,
1da177e4	244	.algo = &smbus_algorithm,
1da177e4 LT	245	};
1da177e4 LT	246
3527bd50	247	static DEFINE_PCI_DEVICE_TABLE(sis96x_ids) = {
1da177e4 LT	248	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
	249	{ 0, }
	250	};
	251
	252	MODULE_DEVICE_TABLE (pci, sis96x_ids);
	253
0b255e92	254	static int sis96x_probe(struct pci_dev *dev,
1da177e4 LT	255	const struct pci_device_id *id)
	256	{
	257	u16 ww = 0;
	258	int retval;
	259
	260	if (sis96x_smbus_base) {
	261	dev_err(&dev->dev, "Only one device supported.\n");
	262	return -EBUSY;
	263	}
	264
	265	pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
	266	if (PCI_CLASS_SERIAL_SMBUS != ww) {
	267	dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
	268	return -ENODEV;
	269	}
	270
	271	sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
	272	if (!sis96x_smbus_base) {
	273	dev_err(&dev->dev, "SiS96x SMBus base address "
	274	"not initialized!\n");
	275	return -EINVAL;
	276	}
	277	dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
	278	sis96x_smbus_base);
	279
54fb4a05 JD	280	retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]);
54fb4a05 JD	281	if (retval)
18669eab	282	return -ENODEV;
54fb4a05	283
1da177e4	284	/* Everything is happy, let's grab the memory and set things up. */
d6072f84 JD	285	if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
d6072f84 JD	286	sis96x_driver.name)) {
1da177e4 LT	287	dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
	288	"already in use!\n", sis96x_smbus_base,
	289	sis96x_smbus_base + SMB_IOSIZE - 1);
	290
	291	sis96x_smbus_base = 0;
	292	return -EINVAL;
	293	}
	294
405ae7d3	295	/* set up the sysfs linkage to our parent device */
1da177e4 LT	296	sis96x_adapter.dev.parent = &dev->dev;
1da177e4 LT	297
2096b956	298	snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
1da177e4 LT	299	"SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
	300
	301	if ((retval = i2c_add_adapter(&sis96x_adapter))) {
	302	dev_err(&dev->dev, "Couldn't register adapter!\n");
	303	release_region(sis96x_smbus_base, SMB_IOSIZE);
	304	sis96x_smbus_base = 0;
	305	}
	306
	307	return retval;
	308	}
	309
0b255e92	310	static void sis96x_remove(struct pci_dev *dev)
1da177e4 LT	311	{
	312	if (sis96x_smbus_base) {
	313	i2c_del_adapter(&sis96x_adapter);
	314	release_region(sis96x_smbus_base, SMB_IOSIZE);
	315	sis96x_smbus_base = 0;
	316	}
	317	}
	318
	319	static struct pci_driver sis96x_driver = {
	320	.name = "sis96x_smbus",
	321	.id_table = sis96x_ids,
	322	.probe = sis96x_probe,
0b255e92	323	.remove = sis96x_remove,
1da177e4 LT	324	};
1da177e4 LT	325
56f21788	326	module_pci_driver(sis96x_driver);
1da177e4 LT	327
	328	MODULE_AUTHOR("Mark M. Hoffman <[email protected]>");
	329	MODULE_DESCRIPTION("SiS96x SMBus driver");
	330	MODULE_LICENSE("GPL");