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Commit | Line | Data |
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1da177e4 LT |
1 | /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */ |
2 | /* | |
3 | Written 1995/96 by Roman Hodek ([email protected]) | |
4 | ||
5 | This software may be used and distributed according to the terms | |
6 | of the GNU General Public License, incorporated herein by reference. | |
7 | ||
8 | This drivers was written with the following sources of reference: | |
9 | - The driver for the Riebl Lance card by the TU Vienna. | |
10 | - The modified TUW driver for PAM's VME cards | |
11 | - The PC-Linux driver for Lance cards (but this is for bus master | |
12 | cards, not the shared memory ones) | |
13 | - The Amiga Ariadne driver | |
14 | ||
15 | v1.0: (in 1.2.13pl4/0.9.13) | |
16 | Initial version | |
17 | v1.1: (in 1.2.13pl5) | |
18 | more comments | |
19 | deleted some debugging stuff | |
20 | optimized register access (keep AREG pointing to CSR0) | |
21 | following AMD, CSR0_STRT should be set only after IDON is detected | |
22 | use memcpy() for data transfers, that also employs long word moves | |
23 | better probe procedure for 24-bit systems | |
24 | non-VME-RieblCards need extra delays in memcpy | |
25 | must also do write test, since 0xfxe00000 may hit ROM | |
26 | use 8/32 tx/rx buffers, which should give better NFS performance; | |
27 | this is made possible by shifting the last packet buffer after the | |
28 | RieblCard reserved area | |
29 | v1.2: (in 1.2.13pl8) | |
30 | again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000 | |
31 | and thus RAM, in case of no Lance found all memory contents have to | |
32 | be restored! | |
33 | Now possible to compile as module. | |
34 | v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3) | |
35 | Several little 1.3 adaptions | |
36 | When the lance is stopped it jumps back into little-endian | |
37 | mode. It is therefore necessary to put it back where it | |
38 | belongs, in big endian mode, in order to make things work. | |
39 | This might be the reason why multicast-mode didn't work | |
40 | before, but I'm not able to test it as I only got an Amiga | |
41 | (we had similar problems with the A2065 driver). | |
42 | ||
43 | */ | |
44 | ||
45 | static char version[] = "atarilance.c: v1.3 04/04/96 " | |
46 | "[email protected]\n"; | |
47 | ||
48 | #include <linux/netdevice.h> | |
49 | #include <linux/etherdevice.h> | |
50 | #include <linux/module.h> | |
51 | #include <linux/stddef.h> | |
52 | #include <linux/kernel.h> | |
53 | #include <linux/string.h> | |
54 | #include <linux/errno.h> | |
55 | #include <linux/skbuff.h> | |
56 | #include <linux/slab.h> | |
57 | #include <linux/interrupt.h> | |
58 | #include <linux/init.h> | |
59 | #include <linux/bitops.h> | |
60 | ||
61 | #include <asm/setup.h> | |
62 | #include <asm/irq.h> | |
63 | #include <asm/atarihw.h> | |
64 | #include <asm/atariints.h> | |
65 | #include <asm/io.h> | |
66 | ||
67 | /* Debug level: | |
68 | * 0 = silent, print only serious errors | |
69 | * 1 = normal, print error messages | |
70 | * 2 = debug, print debug infos | |
71 | * 3 = debug, print even more debug infos (packet data) | |
72 | */ | |
73 | ||
74 | #define LANCE_DEBUG 1 | |
75 | ||
76 | #ifdef LANCE_DEBUG | |
77 | static int lance_debug = LANCE_DEBUG; | |
78 | #else | |
79 | static int lance_debug = 1; | |
80 | #endif | |
8d3b33f6 | 81 | module_param(lance_debug, int, 0); |
1da177e4 LT |
82 | MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)"); |
83 | MODULE_LICENSE("GPL"); | |
84 | ||
85 | /* Print debug messages on probing? */ | |
86 | #undef LANCE_DEBUG_PROBE | |
87 | ||
88 | #define DPRINTK(n,a) \ | |
89 | do { \ | |
90 | if (lance_debug >= n) \ | |
91 | printk a; \ | |
92 | } while( 0 ) | |
93 | ||
94 | #ifdef LANCE_DEBUG_PROBE | |
95 | # define PROBE_PRINT(a) printk a | |
96 | #else | |
97 | # define PROBE_PRINT(a) | |
98 | #endif | |
99 | ||
100 | /* These define the number of Rx and Tx buffers as log2. (Only powers | |
101 | * of two are valid) | |
102 | * Much more rx buffers (32) are reserved than tx buffers (8), since receiving | |
103 | * is more time critical then sending and packets may have to remain in the | |
104 | * board's memory when main memory is low. | |
105 | */ | |
106 | ||
107 | #define TX_LOG_RING_SIZE 3 | |
108 | #define RX_LOG_RING_SIZE 5 | |
109 | ||
110 | /* These are the derived values */ | |
111 | ||
112 | #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) | |
113 | #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) | |
114 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
115 | ||
116 | #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) | |
117 | #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) | |
118 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
119 | ||
120 | #define TX_TIMEOUT 20 | |
121 | ||
122 | /* The LANCE Rx and Tx ring descriptors. */ | |
123 | struct lance_rx_head { | |
124 | unsigned short base; /* Low word of base addr */ | |
125 | volatile unsigned char flag; | |
126 | unsigned char base_hi; /* High word of base addr (unused) */ | |
127 | short buf_length; /* This length is 2s complement! */ | |
128 | volatile short msg_length; /* This length is "normal". */ | |
129 | }; | |
130 | ||
131 | struct lance_tx_head { | |
132 | unsigned short base; /* Low word of base addr */ | |
133 | volatile unsigned char flag; | |
134 | unsigned char base_hi; /* High word of base addr (unused) */ | |
135 | short length; /* Length is 2s complement! */ | |
136 | volatile short misc; | |
137 | }; | |
138 | ||
139 | struct ringdesc { | |
140 | unsigned short adr_lo; /* Low 16 bits of address */ | |
141 | unsigned char len; /* Length bits */ | |
142 | unsigned char adr_hi; /* High 8 bits of address (unused) */ | |
143 | }; | |
144 | ||
145 | /* The LANCE initialization block, described in databook. */ | |
146 | struct lance_init_block { | |
147 | unsigned short mode; /* Pre-set mode */ | |
148 | unsigned char hwaddr[6]; /* Physical ethernet address */ | |
149 | unsigned filter[2]; /* Multicast filter (unused). */ | |
150 | /* Receive and transmit ring base, along with length bits. */ | |
151 | struct ringdesc rx_ring; | |
152 | struct ringdesc tx_ring; | |
153 | }; | |
154 | ||
155 | /* The whole layout of the Lance shared memory */ | |
156 | struct lance_memory { | |
157 | struct lance_init_block init; | |
158 | struct lance_tx_head tx_head[TX_RING_SIZE]; | |
159 | struct lance_rx_head rx_head[RX_RING_SIZE]; | |
160 | char packet_area[0]; /* packet data follow after the | |
161 | * init block and the ring | |
162 | * descriptors and are located | |
163 | * at runtime */ | |
164 | }; | |
165 | ||
166 | /* RieblCard specifics: | |
167 | * The original TOS driver for these cards reserves the area from offset | |
168 | * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the | |
169 | * Ethernet address there, and the magic for verifying the data's validity. | |
170 | * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe | |
171 | * is reserved for the interrupt vector number. | |
172 | */ | |
173 | #define RIEBL_RSVD_START 0xee70 | |
174 | #define RIEBL_RSVD_END 0xeec0 | |
175 | #define RIEBL_MAGIC 0x09051990 | |
176 | #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a)) | |
177 | #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e)) | |
178 | #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe)) | |
179 | ||
180 | /* This is a default address for the old RieblCards without a battery | |
181 | * that have no ethernet address at boot time. 00:00:36:04 is the | |
182 | * prefix for Riebl cards, the 00:00 at the end is arbitrary. | |
183 | */ | |
184 | ||
185 | static unsigned char OldRieblDefHwaddr[6] = { | |
186 | 0x00, 0x00, 0x36, 0x04, 0x00, 0x00 | |
187 | }; | |
188 | ||
189 | ||
190 | /* I/O registers of the Lance chip */ | |
191 | ||
192 | struct lance_ioreg { | |
193 | /* base+0x0 */ volatile unsigned short data; | |
194 | /* base+0x2 */ volatile unsigned short addr; | |
195 | unsigned char _dummy1[3]; | |
196 | /* base+0x7 */ volatile unsigned char ivec; | |
197 | unsigned char _dummy2[5]; | |
198 | /* base+0xd */ volatile unsigned char eeprom; | |
199 | unsigned char _dummy3; | |
200 | /* base+0xf */ volatile unsigned char mem; | |
201 | }; | |
202 | ||
203 | /* Types of boards this driver supports */ | |
204 | ||
205 | enum lance_type { | |
206 | OLD_RIEBL, /* old Riebl card without battery */ | |
207 | NEW_RIEBL, /* new Riebl card with battery */ | |
208 | PAM_CARD /* PAM card with EEPROM */ | |
209 | }; | |
210 | ||
211 | static char *lance_names[] = { | |
212 | "Riebl-Card (without battery)", | |
213 | "Riebl-Card (with battery)", | |
214 | "PAM intern card" | |
215 | }; | |
216 | ||
217 | /* The driver's private device structure */ | |
218 | ||
219 | struct lance_private { | |
220 | enum lance_type cardtype; | |
221 | struct lance_ioreg *iobase; | |
222 | struct lance_memory *mem; | |
223 | int cur_rx, cur_tx; /* The next free ring entry */ | |
224 | int dirty_tx; /* Ring entries to be freed. */ | |
225 | /* copy function */ | |
226 | void *(*memcpy_f)( void *, const void *, size_t ); | |
227 | struct net_device_stats stats; | |
228 | /* This must be long for set_bit() */ | |
229 | long tx_full; | |
230 | spinlock_t devlock; | |
231 | }; | |
232 | ||
233 | /* I/O register access macros */ | |
234 | ||
235 | #define MEM lp->mem | |
236 | #define DREG IO->data | |
237 | #define AREG IO->addr | |
e345d5ef | 238 | #define REGA(a) (*( AREG = (a), &DREG )) |
1da177e4 LT |
239 | |
240 | /* Definitions for packet buffer access: */ | |
241 | #define PKT_BUF_SZ 1544 | |
242 | /* Get the address of a packet buffer corresponding to a given buffer head */ | |
243 | #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base) | |
244 | ||
245 | /* Possible memory/IO addresses for probing */ | |
246 | ||
247 | struct lance_addr { | |
248 | unsigned long memaddr; | |
249 | unsigned long ioaddr; | |
250 | int slow_flag; | |
251 | } lance_addr_list[] = { | |
252 | { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */ | |
253 | { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE | |
254 | (highest byte stripped) */ | |
255 | { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST | |
256 | (highest byte stripped) */ | |
257 | { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to | |
258 | avoid conflict with ROM | |
259 | (highest byte stripped) */ | |
260 | { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE | |
261 | (highest byte stripped) */ | |
262 | { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE | |
263 | (highest byte stripped) */ | |
264 | }; | |
265 | ||
266 | #define N_LANCE_ADDR (sizeof(lance_addr_list)/sizeof(*lance_addr_list)) | |
267 | ||
268 | ||
269 | /* Definitions for the Lance */ | |
270 | ||
271 | /* tx_head flags */ | |
272 | #define TMD1_ENP 0x01 /* end of packet */ | |
273 | #define TMD1_STP 0x02 /* start of packet */ | |
274 | #define TMD1_DEF 0x04 /* deferred */ | |
275 | #define TMD1_ONE 0x08 /* one retry needed */ | |
276 | #define TMD1_MORE 0x10 /* more than one retry needed */ | |
277 | #define TMD1_ERR 0x40 /* error summary */ | |
278 | #define TMD1_OWN 0x80 /* ownership (set: chip owns) */ | |
279 | ||
280 | #define TMD1_OWN_CHIP TMD1_OWN | |
281 | #define TMD1_OWN_HOST 0 | |
282 | ||
283 | /* tx_head misc field */ | |
284 | #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ | |
285 | #define TMD3_RTRY 0x0400 /* failed after 16 retries */ | |
286 | #define TMD3_LCAR 0x0800 /* carrier lost */ | |
287 | #define TMD3_LCOL 0x1000 /* late collision */ | |
288 | #define TMD3_UFLO 0x4000 /* underflow (late memory) */ | |
289 | #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ | |
290 | ||
291 | /* rx_head flags */ | |
292 | #define RMD1_ENP 0x01 /* end of packet */ | |
293 | #define RMD1_STP 0x02 /* start of packet */ | |
294 | #define RMD1_BUFF 0x04 /* buffer error */ | |
295 | #define RMD1_CRC 0x08 /* CRC error */ | |
296 | #define RMD1_OFLO 0x10 /* overflow */ | |
297 | #define RMD1_FRAM 0x20 /* framing error */ | |
298 | #define RMD1_ERR 0x40 /* error summary */ | |
299 | #define RMD1_OWN 0x80 /* ownership (set: ship owns) */ | |
300 | ||
301 | #define RMD1_OWN_CHIP RMD1_OWN | |
302 | #define RMD1_OWN_HOST 0 | |
303 | ||
304 | /* register names */ | |
305 | #define CSR0 0 /* mode/status */ | |
306 | #define CSR1 1 /* init block addr (low) */ | |
307 | #define CSR2 2 /* init block addr (high) */ | |
308 | #define CSR3 3 /* misc */ | |
309 | #define CSR8 8 /* address filter */ | |
310 | #define CSR15 15 /* promiscuous mode */ | |
311 | ||
312 | /* CSR0 */ | |
313 | /* (R=readable, W=writeable, S=set on write, C=clear on write) */ | |
314 | #define CSR0_INIT 0x0001 /* initialize (RS) */ | |
315 | #define CSR0_STRT 0x0002 /* start (RS) */ | |
316 | #define CSR0_STOP 0x0004 /* stop (RS) */ | |
317 | #define CSR0_TDMD 0x0008 /* transmit demand (RS) */ | |
318 | #define CSR0_TXON 0x0010 /* transmitter on (R) */ | |
319 | #define CSR0_RXON 0x0020 /* receiver on (R) */ | |
320 | #define CSR0_INEA 0x0040 /* interrupt enable (RW) */ | |
321 | #define CSR0_INTR 0x0080 /* interrupt active (R) */ | |
322 | #define CSR0_IDON 0x0100 /* initialization done (RC) */ | |
323 | #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ | |
324 | #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ | |
325 | #define CSR0_MERR 0x0800 /* memory error (RC) */ | |
326 | #define CSR0_MISS 0x1000 /* missed frame (RC) */ | |
327 | #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ | |
328 | #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ | |
329 | #define CSR0_ERR 0x8000 /* error (RC) */ | |
330 | ||
331 | /* CSR3 */ | |
332 | #define CSR3_BCON 0x0001 /* byte control */ | |
333 | #define CSR3_ACON 0x0002 /* ALE control */ | |
334 | #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ | |
335 | ||
336 | ||
337 | ||
338 | /***************************** Prototypes *****************************/ | |
339 | ||
340 | static int addr_accessible( volatile void *regp, int wordflag, int | |
341 | writeflag ); | |
342 | static unsigned long lance_probe1( struct net_device *dev, struct lance_addr | |
343 | *init_rec ); | |
344 | static int lance_open( struct net_device *dev ); | |
345 | static void lance_init_ring( struct net_device *dev ); | |
346 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ); | |
7d12e780 | 347 | static irqreturn_t lance_interrupt( int irq, void *dev_id ); |
1da177e4 LT |
348 | static int lance_rx( struct net_device *dev ); |
349 | static int lance_close( struct net_device *dev ); | |
350 | static struct net_device_stats *lance_get_stats( struct net_device *dev ); | |
351 | static void set_multicast_list( struct net_device *dev ); | |
352 | static int lance_set_mac_address( struct net_device *dev, void *addr ); | |
353 | static void lance_tx_timeout (struct net_device *dev); | |
354 | ||
355 | /************************* End of Prototypes **************************/ | |
356 | ||
357 | ||
358 | ||
6aa20a22 | 359 | |
1da177e4 LT |
360 | |
361 | static void *slow_memcpy( void *dst, const void *src, size_t len ) | |
362 | ||
363 | { char *cto = dst; | |
364 | const char *cfrom = src; | |
365 | ||
366 | while( len-- ) { | |
367 | *cto++ = *cfrom++; | |
368 | MFPDELAY(); | |
369 | } | |
370 | return( dst ); | |
371 | } | |
372 | ||
373 | ||
374 | struct net_device * __init atarilance_probe(int unit) | |
375 | { | |
376 | int i; | |
377 | static int found; | |
378 | struct net_device *dev; | |
379 | int err = -ENODEV; | |
380 | ||
381 | if (!MACH_IS_ATARI || found) | |
382 | /* Assume there's only one board possible... That seems true, since | |
383 | * the Riebl/PAM board's address cannot be changed. */ | |
384 | return ERR_PTR(-ENODEV); | |
385 | ||
386 | dev = alloc_etherdev(sizeof(struct lance_private)); | |
387 | if (!dev) | |
388 | return ERR_PTR(-ENOMEM); | |
389 | if (unit >= 0) { | |
390 | sprintf(dev->name, "eth%d", unit); | |
391 | netdev_boot_setup_check(dev); | |
392 | } | |
393 | SET_MODULE_OWNER(dev); | |
394 | ||
395 | for( i = 0; i < N_LANCE_ADDR; ++i ) { | |
396 | if (lance_probe1( dev, &lance_addr_list[i] )) { | |
397 | found = 1; | |
398 | err = register_netdev(dev); | |
399 | if (!err) | |
400 | return dev; | |
401 | free_irq(dev->irq, dev); | |
402 | break; | |
403 | } | |
404 | } | |
405 | free_netdev(dev); | |
406 | return ERR_PTR(err); | |
407 | } | |
408 | ||
409 | ||
410 | /* Derived from hwreg_present() in atari/config.c: */ | |
411 | ||
412 | static int __init addr_accessible( volatile void *regp, int wordflag, int writeflag ) | |
413 | { | |
414 | int ret; | |
415 | long flags; | |
416 | long *vbr, save_berr; | |
417 | ||
418 | local_irq_save(flags); | |
419 | ||
420 | __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : ); | |
421 | save_berr = vbr[2]; | |
422 | ||
423 | __asm__ __volatile__ | |
424 | ( "movel %/sp,%/d1\n\t" | |
425 | "movel #Lberr,%2@\n\t" | |
426 | "moveq #0,%0\n\t" | |
427 | "tstl %3\n\t" | |
428 | "bne 1f\n\t" | |
429 | "moveb %1@,%/d0\n\t" | |
430 | "nop \n\t" | |
431 | "bra 2f\n" | |
432 | "1: movew %1@,%/d0\n\t" | |
433 | "nop \n" | |
434 | "2: tstl %4\n\t" | |
435 | "beq 2f\n\t" | |
436 | "tstl %3\n\t" | |
437 | "bne 1f\n\t" | |
438 | "clrb %1@\n\t" | |
439 | "nop \n\t" | |
440 | "moveb %/d0,%1@\n\t" | |
441 | "nop \n\t" | |
442 | "bra 2f\n" | |
443 | "1: clrw %1@\n\t" | |
444 | "nop \n\t" | |
445 | "movew %/d0,%1@\n\t" | |
446 | "nop \n" | |
447 | "2: moveq #1,%0\n" | |
448 | "Lberr: movel %/d1,%/sp" | |
449 | : "=&d" (ret) | |
450 | : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag) | |
451 | : "d0", "d1", "memory" | |
452 | ); | |
453 | ||
454 | vbr[2] = save_berr; | |
455 | local_irq_restore(flags); | |
456 | ||
457 | return( ret ); | |
458 | } | |
459 | ||
460 | ||
461 | static unsigned long __init lance_probe1( struct net_device *dev, | |
462 | struct lance_addr *init_rec ) | |
463 | { | |
464 | volatile unsigned short *memaddr = | |
465 | (volatile unsigned short *)init_rec->memaddr; | |
466 | volatile unsigned short *ioaddr = | |
467 | (volatile unsigned short *)init_rec->ioaddr; | |
468 | struct lance_private *lp; | |
469 | struct lance_ioreg *IO; | |
470 | int i; | |
471 | static int did_version; | |
472 | unsigned short save1, save2; | |
473 | ||
474 | PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n", | |
475 | (long)memaddr, (long)ioaddr )); | |
476 | ||
477 | /* Test whether memory readable and writable */ | |
478 | PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" )); | |
479 | if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail; | |
480 | ||
481 | /* Written values should come back... */ | |
482 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" )); | |
483 | save1 = *memaddr; | |
484 | *memaddr = 0x0001; | |
485 | if (*memaddr != 0x0001) goto probe_fail; | |
486 | PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" )); | |
487 | *memaddr = 0x0000; | |
488 | if (*memaddr != 0x0000) goto probe_fail; | |
489 | *memaddr = save1; | |
490 | ||
491 | /* First port should be readable and writable */ | |
492 | PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" )); | |
493 | if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail; | |
494 | ||
495 | /* and written values should be readable */ | |
496 | PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" )); | |
497 | save2 = ioaddr[1]; | |
498 | ioaddr[1] = 0x0001; | |
499 | if (ioaddr[1] != 0x0001) goto probe_fail; | |
500 | ||
501 | /* The CSR0_INIT bit should not be readable */ | |
502 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" )); | |
503 | save1 = ioaddr[0]; | |
504 | ioaddr[1] = CSR0; | |
505 | ioaddr[0] = CSR0_INIT | CSR0_STOP; | |
506 | if (ioaddr[0] != CSR0_STOP) { | |
507 | ioaddr[0] = save1; | |
508 | ioaddr[1] = save2; | |
509 | goto probe_fail; | |
510 | } | |
511 | PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" )); | |
512 | ioaddr[0] = CSR0_STOP; | |
513 | if (ioaddr[0] != CSR0_STOP) { | |
514 | ioaddr[0] = save1; | |
515 | ioaddr[1] = save2; | |
516 | goto probe_fail; | |
517 | } | |
518 | ||
519 | /* Now ok... */ | |
520 | PROBE_PRINT(( "lance_probe1: Lance card detected\n" )); | |
521 | goto probe_ok; | |
522 | ||
523 | probe_fail: | |
524 | return( 0 ); | |
525 | ||
526 | probe_ok: | |
527 | lp = (struct lance_private *)dev->priv; | |
528 | MEM = (struct lance_memory *)memaddr; | |
529 | IO = lp->iobase = (struct lance_ioreg *)ioaddr; | |
530 | dev->base_addr = (unsigned long)ioaddr; /* informational only */ | |
531 | lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy; | |
532 | ||
533 | REGA( CSR0 ) = CSR0_STOP; | |
534 | ||
535 | /* Now test for type: If the eeprom I/O port is readable, it is a | |
536 | * PAM card */ | |
537 | if (addr_accessible( &(IO->eeprom), 0, 0 )) { | |
538 | /* Switch back to Ram */ | |
539 | i = IO->mem; | |
540 | lp->cardtype = PAM_CARD; | |
541 | } | |
542 | else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) { | |
543 | lp->cardtype = NEW_RIEBL; | |
544 | } | |
545 | else | |
546 | lp->cardtype = OLD_RIEBL; | |
547 | ||
548 | if (lp->cardtype == PAM_CARD || | |
549 | memaddr == (unsigned short *)0xffe00000) { | |
550 | /* PAMs card and Riebl on ST use level 5 autovector */ | |
551 | if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO, | |
6aa20a22 | 552 | "PAM/Riebl-ST Ethernet", dev)) { |
1da177e4 LT |
553 | printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 ); |
554 | return( 0 ); | |
555 | } | |
556 | dev->irq = (unsigned short)IRQ_AUTO_5; | |
557 | } | |
558 | else { | |
559 | /* For VME-RieblCards, request a free VME int; | |
560 | * (This must be unsigned long, since dev->irq is short and the | |
561 | * IRQ_MACHSPEC bit would be cut off...) | |
562 | */ | |
563 | unsigned long irq = atari_register_vme_int(); | |
564 | if (!irq) { | |
565 | printk( "Lance: request for VME interrupt failed\n" ); | |
566 | return( 0 ); | |
567 | } | |
568 | if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO, | |
569 | "Riebl-VME Ethernet", dev)) { | |
570 | printk( "Lance: request for irq %ld failed\n", irq ); | |
571 | return( 0 ); | |
572 | } | |
573 | dev->irq = irq; | |
574 | } | |
575 | ||
576 | printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ", | |
577 | dev->name, lance_names[lp->cardtype], | |
578 | (unsigned long)ioaddr, | |
579 | (unsigned long)memaddr, | |
580 | dev->irq, | |
581 | init_rec->slow_flag ? " (slow memcpy)" : "" ); | |
582 | ||
583 | /* Get the ethernet address */ | |
584 | switch( lp->cardtype ) { | |
585 | case OLD_RIEBL: | |
586 | /* No ethernet address! (Set some default address) */ | |
587 | memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 ); | |
588 | break; | |
589 | case NEW_RIEBL: | |
590 | lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 ); | |
591 | break; | |
592 | case PAM_CARD: | |
593 | i = IO->eeprom; | |
594 | for( i = 0; i < 6; ++i ) | |
595 | dev->dev_addr[i] = | |
596 | ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) | | |
597 | ((((unsigned short *)MEM)[i*2+1] & 0x0f)); | |
598 | i = IO->mem; | |
599 | break; | |
600 | } | |
601 | for( i = 0; i < 6; ++i ) | |
602 | printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" ); | |
603 | if (lp->cardtype == OLD_RIEBL) { | |
604 | printk( "%s: Warning: This is a default ethernet address!\n", | |
605 | dev->name ); | |
606 | printk( " Use \"ifconfig hw ether ...\" to set the address.\n" ); | |
607 | } | |
608 | ||
609 | spin_lock_init(&lp->devlock); | |
610 | ||
611 | MEM->init.mode = 0x0000; /* Disable Rx and Tx. */ | |
612 | for( i = 0; i < 6; i++ ) | |
613 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ | |
614 | MEM->init.filter[0] = 0x00000000; | |
615 | MEM->init.filter[1] = 0x00000000; | |
616 | MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head ); | |
617 | MEM->init.rx_ring.adr_hi = 0; | |
618 | MEM->init.rx_ring.len = RX_RING_LEN_BITS; | |
619 | MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head ); | |
620 | MEM->init.tx_ring.adr_hi = 0; | |
621 | MEM->init.tx_ring.len = TX_RING_LEN_BITS; | |
622 | ||
623 | if (lp->cardtype == PAM_CARD) | |
624 | IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq); | |
625 | else | |
626 | *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq); | |
627 | ||
628 | if (did_version++ == 0) | |
629 | DPRINTK( 1, ( version )); | |
630 | ||
631 | /* The LANCE-specific entries in the device structure. */ | |
632 | dev->open = &lance_open; | |
633 | dev->hard_start_xmit = &lance_start_xmit; | |
634 | dev->stop = &lance_close; | |
635 | dev->get_stats = &lance_get_stats; | |
636 | dev->set_multicast_list = &set_multicast_list; | |
637 | dev->set_mac_address = &lance_set_mac_address; | |
638 | ||
639 | /* XXX MSch */ | |
640 | dev->tx_timeout = lance_tx_timeout; | |
641 | dev->watchdog_timeo = TX_TIMEOUT; | |
6aa20a22 | 642 | |
1da177e4 LT |
643 | |
644 | #if 0 | |
645 | dev->start = 0; | |
646 | #endif | |
647 | ||
648 | memset( &lp->stats, 0, sizeof(lp->stats) ); | |
649 | ||
650 | return( 1 ); | |
651 | } | |
652 | ||
6aa20a22 | 653 | |
1da177e4 LT |
654 | static int lance_open( struct net_device *dev ) |
655 | ||
656 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
657 | struct lance_ioreg *IO = lp->iobase; | |
658 | int i; | |
659 | ||
660 | DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); | |
661 | ||
662 | lance_init_ring(dev); | |
663 | /* Re-initialize the LANCE, and start it when done. */ | |
664 | ||
665 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
666 | REGA( CSR2 ) = 0; | |
667 | REGA( CSR1 ) = 0; | |
668 | REGA( CSR0 ) = CSR0_INIT; | |
669 | /* From now on, AREG is kept to point to CSR0 */ | |
670 | ||
671 | i = 1000000; | |
672 | while (--i > 0) | |
673 | if (DREG & CSR0_IDON) | |
674 | break; | |
675 | if (i < 0 || (DREG & CSR0_ERR)) { | |
676 | DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", | |
677 | dev->name, i, DREG )); | |
678 | DREG = CSR0_STOP; | |
679 | return( -EIO ); | |
680 | } | |
681 | DREG = CSR0_IDON; | |
682 | DREG = CSR0_STRT; | |
683 | DREG = CSR0_INEA; | |
684 | ||
685 | netif_start_queue (dev); | |
686 | ||
687 | DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); | |
688 | ||
689 | return( 0 ); | |
690 | } | |
691 | ||
692 | ||
693 | /* Initialize the LANCE Rx and Tx rings. */ | |
694 | ||
695 | static void lance_init_ring( struct net_device *dev ) | |
696 | ||
697 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
698 | int i; | |
699 | unsigned offset; | |
700 | ||
701 | lp->tx_full = 0; | |
702 | lp->cur_rx = lp->cur_tx = 0; | |
703 | lp->dirty_tx = 0; | |
704 | ||
705 | offset = offsetof( struct lance_memory, packet_area ); | |
706 | ||
707 | /* If the packet buffer at offset 'o' would conflict with the reserved area | |
708 | * of RieblCards, advance it */ | |
709 | #define CHECK_OFFSET(o) \ | |
710 | do { \ | |
711 | if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \ | |
712 | if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \ | |
713 | : (o) < RIEBL_RSVD_END) \ | |
714 | (o) = RIEBL_RSVD_END; \ | |
715 | } \ | |
716 | } while(0) | |
717 | ||
718 | for( i = 0; i < TX_RING_SIZE; i++ ) { | |
719 | CHECK_OFFSET(offset); | |
720 | MEM->tx_head[i].base = offset; | |
721 | MEM->tx_head[i].flag = TMD1_OWN_HOST; | |
722 | MEM->tx_head[i].base_hi = 0; | |
723 | MEM->tx_head[i].length = 0; | |
724 | MEM->tx_head[i].misc = 0; | |
725 | offset += PKT_BUF_SZ; | |
726 | } | |
727 | ||
728 | for( i = 0; i < RX_RING_SIZE; i++ ) { | |
729 | CHECK_OFFSET(offset); | |
730 | MEM->rx_head[i].base = offset; | |
731 | MEM->rx_head[i].flag = TMD1_OWN_CHIP; | |
732 | MEM->rx_head[i].base_hi = 0; | |
733 | MEM->rx_head[i].buf_length = -PKT_BUF_SZ; | |
734 | MEM->rx_head[i].msg_length = 0; | |
735 | offset += PKT_BUF_SZ; | |
736 | } | |
737 | } | |
738 | ||
739 | ||
740 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ | |
741 | ||
742 | ||
743 | static void lance_tx_timeout (struct net_device *dev) | |
744 | { | |
745 | struct lance_private *lp = (struct lance_private *) dev->priv; | |
746 | struct lance_ioreg *IO = lp->iobase; | |
6aa20a22 | 747 | |
1da177e4 LT |
748 | AREG = CSR0; |
749 | DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", | |
750 | dev->name, DREG )); | |
751 | DREG = CSR0_STOP; | |
752 | /* | |
753 | * Always set BSWP after a STOP as STOP puts it back into | |
754 | * little endian mode. | |
755 | */ | |
756 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
757 | lp->stats.tx_errors++; | |
758 | #ifndef final_version | |
759 | { int i; | |
760 | DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n", | |
761 | lp->dirty_tx, lp->cur_tx, | |
762 | lp->tx_full ? " (full)" : "", | |
763 | lp->cur_rx )); | |
764 | for( i = 0 ; i < RX_RING_SIZE; i++ ) | |
765 | DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n", | |
766 | i, MEM->rx_head[i].base, | |
767 | -MEM->rx_head[i].buf_length, | |
768 | MEM->rx_head[i].msg_length )); | |
769 | for( i = 0 ; i < TX_RING_SIZE; i++ ) | |
770 | DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n", | |
771 | i, MEM->tx_head[i].base, | |
772 | -MEM->tx_head[i].length, | |
773 | MEM->tx_head[i].misc )); | |
774 | } | |
6aa20a22 | 775 | #endif |
1da177e4 LT |
776 | /* XXX MSch: maybe purge/reinit ring here */ |
777 | /* lance_restart, essentially */ | |
778 | lance_init_ring(dev); | |
779 | REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; | |
780 | dev->trans_start = jiffies; | |
781 | netif_wake_queue (dev); | |
782 | } | |
783 | ||
784 | /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ | |
785 | ||
786 | static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ) | |
787 | ||
788 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
789 | struct lance_ioreg *IO = lp->iobase; | |
790 | int entry, len; | |
791 | struct lance_tx_head *head; | |
792 | unsigned long flags; | |
793 | ||
794 | DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", | |
795 | dev->name, DREG )); | |
796 | ||
797 | ||
798 | /* The old LANCE chips doesn't automatically pad buffers to min. size. */ | |
799 | len = skb->len; | |
800 | if (len < ETH_ZLEN) | |
801 | len = ETH_ZLEN; | |
802 | /* PAM-Card has a bug: Can only send packets with even number of bytes! */ | |
803 | else if (lp->cardtype == PAM_CARD && (len & 1)) | |
804 | ++len; | |
6aa20a22 | 805 | |
1da177e4 | 806 | if (len > skb->len) { |
5b057c6b | 807 | if (skb_padto(skb, len)) |
1da177e4 LT |
808 | return 0; |
809 | } | |
6aa20a22 | 810 | |
1da177e4 LT |
811 | netif_stop_queue (dev); |
812 | ||
813 | /* Fill in a Tx ring entry */ | |
814 | if (lance_debug >= 3) { | |
815 | u_char *p; | |
816 | int i; | |
817 | printk( "%s: TX pkt type 0x%04x from ", dev->name, | |
818 | ((u_short *)skb->data)[6]); | |
819 | for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ ) | |
820 | printk("%02x%s", *p++, i != 5 ? ":" : "" ); | |
821 | printk(" to "); | |
822 | for( p = (u_char *)skb->data, i = 0; i < 6; i++ ) | |
823 | printk("%02x%s", *p++, i != 5 ? ":" : "" ); | |
824 | printk(" data at 0x%08x len %d\n", (int)skb->data, | |
825 | (int)skb->len ); | |
826 | } | |
827 | ||
828 | /* We're not prepared for the int until the last flags are set/reset. And | |
829 | * the int may happen already after setting the OWN_CHIP... */ | |
830 | spin_lock_irqsave (&lp->devlock, flags); | |
831 | ||
832 | /* Mask to ring buffer boundary. */ | |
833 | entry = lp->cur_tx & TX_RING_MOD_MASK; | |
834 | head = &(MEM->tx_head[entry]); | |
835 | ||
836 | /* Caution: the write order is important here, set the "ownership" bits | |
837 | * last. | |
838 | */ | |
839 | ||
840 | ||
841 | head->length = -len; | |
842 | head->misc = 0; | |
843 | lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len ); | |
844 | head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; | |
845 | lp->stats.tx_bytes += skb->len; | |
846 | dev_kfree_skb( skb ); | |
847 | lp->cur_tx++; | |
848 | while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) { | |
849 | lp->cur_tx -= TX_RING_SIZE; | |
850 | lp->dirty_tx -= TX_RING_SIZE; | |
851 | } | |
852 | ||
853 | /* Trigger an immediate send poll. */ | |
854 | DREG = CSR0_INEA | CSR0_TDMD; | |
855 | dev->trans_start = jiffies; | |
856 | ||
857 | if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == | |
858 | TMD1_OWN_HOST) | |
859 | netif_start_queue (dev); | |
860 | else | |
861 | lp->tx_full = 1; | |
862 | spin_unlock_irqrestore (&lp->devlock, flags); | |
863 | ||
864 | return 0; | |
865 | } | |
866 | ||
867 | /* The LANCE interrupt handler. */ | |
868 | ||
7d12e780 | 869 | static irqreturn_t lance_interrupt( int irq, void *dev_id ) |
1da177e4 LT |
870 | { |
871 | struct net_device *dev = dev_id; | |
872 | struct lance_private *lp; | |
873 | struct lance_ioreg *IO; | |
874 | int csr0, boguscnt = 10; | |
875 | int handled = 0; | |
876 | ||
877 | if (dev == NULL) { | |
878 | DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" )); | |
879 | return IRQ_NONE; | |
880 | } | |
881 | ||
882 | lp = (struct lance_private *)dev->priv; | |
883 | IO = lp->iobase; | |
884 | spin_lock (&lp->devlock); | |
885 | ||
886 | AREG = CSR0; | |
887 | ||
888 | while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) && | |
889 | --boguscnt >= 0) { | |
890 | handled = 1; | |
891 | /* Acknowledge all of the current interrupt sources ASAP. */ | |
892 | DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | | |
893 | CSR0_TDMD | CSR0_INEA); | |
894 | ||
895 | DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", | |
896 | dev->name, csr0, DREG )); | |
897 | ||
898 | if (csr0 & CSR0_RINT) /* Rx interrupt */ | |
899 | lance_rx( dev ); | |
900 | ||
901 | if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ | |
902 | int dirty_tx = lp->dirty_tx; | |
903 | ||
904 | while( dirty_tx < lp->cur_tx) { | |
905 | int entry = dirty_tx & TX_RING_MOD_MASK; | |
906 | int status = MEM->tx_head[entry].flag; | |
907 | ||
908 | if (status & TMD1_OWN_CHIP) | |
909 | break; /* It still hasn't been Txed */ | |
910 | ||
911 | MEM->tx_head[entry].flag = 0; | |
912 | ||
913 | if (status & TMD1_ERR) { | |
914 | /* There was an major error, log it. */ | |
915 | int err_status = MEM->tx_head[entry].misc; | |
916 | lp->stats.tx_errors++; | |
917 | if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++; | |
918 | if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++; | |
919 | if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++; | |
920 | if (err_status & TMD3_UFLO) { | |
921 | /* Ackk! On FIFO errors the Tx unit is turned off! */ | |
922 | lp->stats.tx_fifo_errors++; | |
923 | /* Remove this verbosity later! */ | |
924 | DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n", | |
925 | dev->name, csr0 )); | |
926 | /* Restart the chip. */ | |
927 | DREG = CSR0_STRT; | |
928 | } | |
929 | } else { | |
930 | if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF)) | |
931 | lp->stats.collisions++; | |
932 | lp->stats.tx_packets++; | |
933 | } | |
934 | ||
935 | /* XXX MSch: free skb?? */ | |
936 | dirty_tx++; | |
937 | } | |
938 | ||
939 | #ifndef final_version | |
940 | if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { | |
941 | DPRINTK( 0, ( "out-of-sync dirty pointer," | |
942 | " %d vs. %d, full=%ld.\n", | |
943 | dirty_tx, lp->cur_tx, lp->tx_full )); | |
944 | dirty_tx += TX_RING_SIZE; | |
945 | } | |
946 | #endif | |
947 | ||
948 | if (lp->tx_full && (netif_queue_stopped(dev)) | |
949 | && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) { | |
950 | /* The ring is no longer full, clear tbusy. */ | |
951 | lp->tx_full = 0; | |
952 | netif_wake_queue (dev); | |
953 | } | |
954 | ||
955 | lp->dirty_tx = dirty_tx; | |
956 | } | |
957 | ||
958 | /* Log misc errors. */ | |
959 | if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */ | |
960 | if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */ | |
961 | if (csr0 & CSR0_MERR) { | |
962 | DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " | |
963 | "status %04x.\n", dev->name, csr0 )); | |
964 | /* Restart the chip. */ | |
965 | DREG = CSR0_STRT; | |
966 | } | |
967 | } | |
968 | ||
969 | /* Clear any other interrupt, and set interrupt enable. */ | |
970 | DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | | |
971 | CSR0_IDON | CSR0_INEA; | |
972 | ||
973 | DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", | |
974 | dev->name, DREG )); | |
975 | ||
976 | spin_unlock (&lp->devlock); | |
977 | return IRQ_RETVAL(handled); | |
978 | } | |
979 | ||
980 | ||
981 | static int lance_rx( struct net_device *dev ) | |
982 | ||
983 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
984 | int entry = lp->cur_rx & RX_RING_MOD_MASK; | |
985 | int i; | |
986 | ||
987 | DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name, | |
988 | MEM->rx_head[entry].flag )); | |
989 | ||
990 | /* If we own the next entry, it's a new packet. Send it up. */ | |
991 | while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { | |
992 | struct lance_rx_head *head = &(MEM->rx_head[entry]); | |
993 | int status = head->flag; | |
994 | ||
995 | if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ | |
996 | /* There is a tricky error noted by John Murphy, | |
997 | <[email protected]> to Russ Nelson: Even with full-sized | |
998 | buffers it's possible for a jabber packet to use two | |
999 | buffers, with only the last correctly noting the error. */ | |
1000 | if (status & RMD1_ENP) /* Only count a general error at the */ | |
1001 | lp->stats.rx_errors++; /* end of a packet.*/ | |
1002 | if (status & RMD1_FRAM) lp->stats.rx_frame_errors++; | |
1003 | if (status & RMD1_OFLO) lp->stats.rx_over_errors++; | |
1004 | if (status & RMD1_CRC) lp->stats.rx_crc_errors++; | |
1005 | if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++; | |
1006 | head->flag &= (RMD1_ENP|RMD1_STP); | |
1007 | } else { | |
1008 | /* Malloc up new buffer, compatible with net-3. */ | |
1009 | short pkt_len = head->msg_length & 0xfff; | |
1010 | struct sk_buff *skb; | |
1011 | ||
1012 | if (pkt_len < 60) { | |
1013 | printk( "%s: Runt packet!\n", dev->name ); | |
1014 | lp->stats.rx_errors++; | |
1015 | } | |
1016 | else { | |
1017 | skb = dev_alloc_skb( pkt_len+2 ); | |
1018 | if (skb == NULL) { | |
1019 | DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n", | |
1020 | dev->name )); | |
1021 | for( i = 0; i < RX_RING_SIZE; i++ ) | |
1022 | if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag & | |
1023 | RMD1_OWN_CHIP) | |
1024 | break; | |
1025 | ||
1026 | if (i > RX_RING_SIZE - 2) { | |
1027 | lp->stats.rx_dropped++; | |
1028 | head->flag |= RMD1_OWN_CHIP; | |
1029 | lp->cur_rx++; | |
1030 | } | |
1031 | break; | |
1032 | } | |
1033 | ||
1034 | if (lance_debug >= 3) { | |
1035 | u_char *data = PKTBUF_ADDR(head), *p; | |
1036 | printk( "%s: RX pkt type 0x%04x from ", dev->name, | |
1037 | ((u_short *)data)[6]); | |
1038 | for( p = &data[6], i = 0; i < 6; i++ ) | |
1039 | printk("%02x%s", *p++, i != 5 ? ":" : "" ); | |
1040 | printk(" to "); | |
1041 | for( p = data, i = 0; i < 6; i++ ) | |
1042 | printk("%02x%s", *p++, i != 5 ? ":" : "" ); | |
1043 | printk(" data %02x %02x %02x %02x %02x %02x %02x %02x " | |
1044 | "len %d\n", | |
1045 | data[15], data[16], data[17], data[18], | |
1046 | data[19], data[20], data[21], data[22], | |
1047 | pkt_len ); | |
1048 | } | |
1049 | ||
1050 | skb->dev = dev; | |
1051 | skb_reserve( skb, 2 ); /* 16 byte align */ | |
1052 | skb_put( skb, pkt_len ); /* Make room */ | |
1053 | lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len ); | |
1054 | skb->protocol = eth_type_trans( skb, dev ); | |
1055 | netif_rx( skb ); | |
1056 | dev->last_rx = jiffies; | |
1057 | lp->stats.rx_packets++; | |
1058 | lp->stats.rx_bytes += pkt_len; | |
1059 | } | |
1060 | } | |
1061 | ||
1062 | head->flag |= RMD1_OWN_CHIP; | |
1063 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; | |
1064 | } | |
1065 | lp->cur_rx &= RX_RING_MOD_MASK; | |
1066 | ||
1067 | /* From lance.c (Donald Becker): */ | |
1068 | /* We should check that at least two ring entries are free. If not, | |
1069 | we should free one and mark stats->rx_dropped++. */ | |
1070 | ||
1071 | return 0; | |
1072 | } | |
1073 | ||
1074 | ||
1075 | static int lance_close( struct net_device *dev ) | |
1076 | ||
1077 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
1078 | struct lance_ioreg *IO = lp->iobase; | |
1079 | ||
1080 | netif_stop_queue (dev); | |
1081 | ||
1082 | AREG = CSR0; | |
1083 | ||
1084 | DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", | |
1085 | dev->name, DREG )); | |
1086 | ||
1087 | /* We stop the LANCE here -- it occasionally polls | |
1088 | memory if we don't. */ | |
1089 | DREG = CSR0_STOP; | |
1090 | ||
1091 | return 0; | |
1092 | } | |
1093 | ||
1094 | ||
1095 | static struct net_device_stats *lance_get_stats( struct net_device *dev ) | |
1096 | ||
1097 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
1098 | ||
1099 | return &lp->stats; | |
1100 | } | |
1101 | ||
1102 | ||
1103 | /* Set or clear the multicast filter for this adaptor. | |
1104 | num_addrs == -1 Promiscuous mode, receive all packets | |
1105 | num_addrs == 0 Normal mode, clear multicast list | |
1106 | num_addrs > 0 Multicast mode, receive normal and MC packets, and do | |
1107 | best-effort filtering. | |
1108 | */ | |
1109 | ||
1110 | static void set_multicast_list( struct net_device *dev ) | |
1111 | ||
1112 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
1113 | struct lance_ioreg *IO = lp->iobase; | |
1114 | ||
1115 | if (netif_running(dev)) | |
1116 | /* Only possible if board is already started */ | |
1117 | return; | |
1118 | ||
1119 | /* We take the simple way out and always enable promiscuous mode. */ | |
1120 | DREG = CSR0_STOP; /* Temporarily stop the lance. */ | |
1121 | ||
1122 | if (dev->flags & IFF_PROMISC) { | |
1123 | /* Log any net taps. */ | |
d5b20697 | 1124 | DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name )); |
1da177e4 LT |
1125 | REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ |
1126 | } else { | |
1127 | short multicast_table[4]; | |
1128 | int num_addrs = dev->mc_count; | |
1129 | int i; | |
1130 | /* We don't use the multicast table, but rely on upper-layer | |
1131 | * filtering. */ | |
1132 | memset( multicast_table, (num_addrs == 0) ? 0 : -1, | |
1133 | sizeof(multicast_table) ); | |
1134 | for( i = 0; i < 4; i++ ) | |
1135 | REGA( CSR8+i ) = multicast_table[i]; | |
1136 | REGA( CSR15 ) = 0; /* Unset promiscuous mode */ | |
1137 | } | |
1138 | ||
1139 | /* | |
1140 | * Always set BSWP after a STOP as STOP puts it back into | |
1141 | * little endian mode. | |
1142 | */ | |
1143 | REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); | |
1144 | ||
1145 | /* Resume normal operation and reset AREG to CSR0 */ | |
1146 | REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; | |
1147 | } | |
1148 | ||
1149 | ||
1150 | /* This is needed for old RieblCards and possible for new RieblCards */ | |
1151 | ||
1152 | static int lance_set_mac_address( struct net_device *dev, void *addr ) | |
1153 | ||
1154 | { struct lance_private *lp = (struct lance_private *)dev->priv; | |
1155 | struct sockaddr *saddr = addr; | |
1156 | int i; | |
1157 | ||
1158 | if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL) | |
1159 | return( -EOPNOTSUPP ); | |
1160 | ||
1161 | if (netif_running(dev)) { | |
1162 | /* Only possible while card isn't started */ | |
1163 | DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n", | |
1164 | dev->name )); | |
1165 | return( -EIO ); | |
1166 | } | |
1167 | ||
1168 | memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len ); | |
1169 | for( i = 0; i < 6; i++ ) | |
1170 | MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ | |
1171 | lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 ); | |
1172 | /* set also the magic for future sessions */ | |
1173 | *RIEBL_MAGIC_ADDR = RIEBL_MAGIC; | |
1174 | ||
1175 | return( 0 ); | |
1176 | } | |
1177 | ||
6aa20a22 | 1178 | |
1da177e4 LT |
1179 | #ifdef MODULE |
1180 | static struct net_device *atarilance_dev; | |
1181 | ||
1182 | int init_module(void) | |
1183 | { | |
1184 | atarilance_dev = atarilance_probe(-1); | |
1185 | if (IS_ERR(atarilance_dev)) | |
1186 | return PTR_ERR(atarilance_dev); | |
1187 | return 0; | |
1188 | } | |
1189 | ||
1190 | void cleanup_module(void) | |
1191 | { | |
1192 | unregister_netdev(atarilance_dev); | |
1193 | free_irq(atarilance_dev->irq, atarilance_dev); | |
1194 | free_netdev(atarilance_dev); | |
1195 | } | |
1196 | ||
1197 | #endif /* MODULE */ | |
6aa20a22 | 1198 | |
1da177e4 LT |
1199 | |
1200 | /* | |
1201 | * Local variables: | |
1202 | * c-indent-level: 4 | |
1203 | * tab-width: 4 | |
1204 | * End: | |
1205 | */ |