]>
Commit | Line | Data |
---|---|---|
7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * [email protected] | |
15 | */ | |
16 | ||
7c2f891c SH |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
7c2f891c SH |
19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/slab.h> | |
27ac792c | 23 | #include <linux/mm.h> |
7c2f891c SH |
24 | #include <linux/fb.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/cpufreq.h> | |
f909ef64 | 29 | #include <linux/clk.h> |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
f909ef64 | 33 | #include <linux/math64.h> |
7c2f891c | 34 | |
a09e64fb | 35 | #include <mach/imxfb.h> |
f497d015 | 36 | #include <mach/hardware.h> |
7c2f891c SH |
37 | |
38 | /* | |
39 | * Complain if VAR is out of range. | |
40 | */ | |
41 | #define DEBUG_VAR 1 | |
42 | ||
72330b0e JB |
43 | #define DRIVER_NAME "imx-fb" |
44 | ||
45 | #define LCDC_SSA 0x00 | |
46 | ||
47 | #define LCDC_SIZE 0x04 | |
48 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
1d0f9870 SH |
49 | |
50 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 51 | #define SIZE_YMAX(y) ((y) & 0x1ff) |
1d0f9870 SH |
52 | #else |
53 | #define SIZE_YMAX(y) ((y) & 0x3ff) | |
54 | #endif | |
72330b0e JB |
55 | |
56 | #define LCDC_VPW 0x08 | |
57 | #define VPW_VPW(x) ((x) & 0x3ff) | |
58 | ||
59 | #define LCDC_CPOS 0x0C | |
60 | #define CPOS_CC1 (1<<31) | |
61 | #define CPOS_CC0 (1<<30) | |
62 | #define CPOS_OP (1<<28) | |
63 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
1d0f9870 SH |
64 | |
65 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 66 | #define CPOS_CYP(y) ((y) & 0x1ff) |
1d0f9870 SH |
67 | #else |
68 | #define CPOS_CYP(y) ((y) & 0x3ff) | |
69 | #endif | |
72330b0e JB |
70 | |
71 | #define LCDC_LCWHB 0x10 | |
72 | #define LCWHB_BK_EN (1<<31) | |
73 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
74 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
75 | #define LCWHB_BD(x) ((x) & 0xff) | |
76 | ||
77 | #define LCDC_LCHCC 0x14 | |
1d0f9870 SH |
78 | |
79 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e JB |
80 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) |
81 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | |
82 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | |
1d0f9870 SH |
83 | #else |
84 | #define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12) | |
85 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6) | |
86 | #define LCHCC_CUR_COL_B(b) ((b) & 0x3f) | |
87 | #endif | |
72330b0e JB |
88 | |
89 | #define LCDC_PCR 0x18 | |
90 | ||
91 | #define LCDC_HCR 0x1C | |
92 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
93 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
94 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
95 | ||
96 | #define LCDC_VCR 0x20 | |
97 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
98 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
99 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
100 | ||
101 | #define LCDC_POS 0x24 | |
102 | #define POS_POS(x) ((x) & 1f) | |
103 | ||
104 | #define LCDC_LSCR1 0x28 | |
105 | /* bit fields in imxfb.h */ | |
106 | ||
107 | #define LCDC_PWMR 0x2C | |
108 | /* bit fields in imxfb.h */ | |
109 | ||
110 | #define LCDC_DMACR 0x30 | |
111 | /* bit fields in imxfb.h */ | |
112 | ||
113 | #define LCDC_RMCR 0x34 | |
1d0f9870 SH |
114 | |
115 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 116 | #define RMCR_LCDC_EN (1<<1) |
1d0f9870 SH |
117 | #else |
118 | #define RMCR_LCDC_EN 0 | |
119 | #endif | |
120 | ||
72330b0e JB |
121 | #define RMCR_SELF_REF (1<<0) |
122 | ||
123 | #define LCDC_LCDICR 0x38 | |
124 | #define LCDICR_INT_SYN (1<<2) | |
125 | #define LCDICR_INT_CON (1) | |
126 | ||
127 | #define LCDC_LCDISR 0x40 | |
128 | #define LCDISR_UDR_ERR (1<<3) | |
129 | #define LCDISR_ERR_RES (1<<2) | |
130 | #define LCDISR_EOF (1<<1) | |
131 | #define LCDISR_BOF (1<<0) | |
132 | ||
24b9baf7 SH |
133 | /* |
134 | * These are the bitfields for each | |
135 | * display depth that we support. | |
136 | */ | |
137 | struct imxfb_rgb { | |
138 | struct fb_bitfield red; | |
139 | struct fb_bitfield green; | |
140 | struct fb_bitfield blue; | |
141 | struct fb_bitfield transp; | |
142 | }; | |
143 | ||
24b9baf7 SH |
144 | struct imxfb_info { |
145 | struct platform_device *pdev; | |
146 | void __iomem *regs; | |
f909ef64 | 147 | struct clk *clk; |
24b9baf7 | 148 | |
24b9baf7 SH |
149 | u_int max_bpp; |
150 | u_int max_xres; | |
151 | u_int max_yres; | |
152 | ||
153 | /* | |
154 | * These are the addresses we mapped | |
155 | * the framebuffer memory region to. | |
156 | */ | |
157 | dma_addr_t map_dma; | |
158 | u_char *map_cpu; | |
159 | u_int map_size; | |
160 | ||
161 | u_char *screen_cpu; | |
162 | dma_addr_t screen_dma; | |
163 | u_int palette_size; | |
164 | ||
165 | dma_addr_t dbar1; | |
166 | dma_addr_t dbar2; | |
167 | ||
168 | u_int pcr; | |
169 | u_int pwmr; | |
170 | u_int lscr1; | |
171 | u_int dmacr; | |
172 | u_int cmap_inverse:1, | |
173 | cmap_static:1, | |
174 | unused:30; | |
175 | ||
176 | void (*lcd_power)(int); | |
177 | void (*backlight_power)(int); | |
178 | }; | |
179 | ||
180 | #define IMX_NAME "IMX" | |
181 | ||
182 | /* | |
183 | * Minimum X and Y resolutions | |
184 | */ | |
185 | #define MIN_XRES 64 | |
186 | #define MIN_YRES 64 | |
187 | ||
1512222b SH |
188 | /* Actually this really is 18bit support, the lowest 2 bits of each colour |
189 | * are unused in hardware. We claim to have 24bit support to make software | |
190 | * like X work, which does not support 18bit. | |
191 | */ | |
192 | static struct imxfb_rgb def_rgb_18 = { | |
193 | .red = {.offset = 16, .length = 8,}, | |
194 | .green = {.offset = 8, .length = 8,}, | |
195 | .blue = {.offset = 0, .length = 8,}, | |
196 | .transp = {.offset = 0, .length = 0,}, | |
197 | }; | |
198 | ||
80eee6bc SH |
199 | static struct imxfb_rgb def_rgb_16_tft = { |
200 | .red = {.offset = 11, .length = 5,}, | |
201 | .green = {.offset = 5, .length = 6,}, | |
202 | .blue = {.offset = 0, .length = 5,}, | |
203 | .transp = {.offset = 0, .length = 0,}, | |
204 | }; | |
205 | ||
206 | static struct imxfb_rgb def_rgb_16_stn = { | |
66c8719b SH |
207 | .red = {.offset = 8, .length = 4,}, |
208 | .green = {.offset = 4, .length = 4,}, | |
209 | .blue = {.offset = 0, .length = 4,}, | |
210 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
211 | }; |
212 | ||
213 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
214 | .red = {.offset = 0, .length = 8,}, |
215 | .green = {.offset = 0, .length = 8,}, | |
216 | .blue = {.offset = 0, .length = 8,}, | |
217 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
218 | }; |
219 | ||
66c8719b SH |
220 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
221 | struct fb_info *info); | |
7c2f891c SH |
222 | |
223 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
224 | { | |
225 | chan &= 0xffff; | |
226 | chan >>= 16 - bf->length; | |
227 | return chan << bf->offset; | |
228 | } | |
229 | ||
66c8719b SH |
230 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
231 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
232 | { |
233 | struct imxfb_info *fbi = info->par; | |
234 | u_int val, ret = 1; | |
235 | ||
236 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
237 | if (regno < fbi->palette_size) { | |
238 | val = (CNVT_TOHW(red, 4) << 8) | | |
239 | (CNVT_TOHW(green,4) << 4) | | |
240 | CNVT_TOHW(blue, 4); | |
241 | ||
72330b0e | 242 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
243 | ret = 0; |
244 | } | |
245 | return ret; | |
246 | } | |
247 | ||
66c8719b | 248 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
249 | u_int trans, struct fb_info *info) |
250 | { | |
251 | struct imxfb_info *fbi = info->par; | |
252 | unsigned int val; | |
253 | int ret = 1; | |
254 | ||
255 | /* | |
256 | * If inverse mode was selected, invert all the colours | |
257 | * rather than the register number. The register number | |
258 | * is what you poke into the framebuffer to produce the | |
259 | * colour you requested. | |
260 | */ | |
261 | if (fbi->cmap_inverse) { | |
262 | red = 0xffff - red; | |
263 | green = 0xffff - green; | |
264 | blue = 0xffff - blue; | |
265 | } | |
266 | ||
267 | /* | |
268 | * If greyscale is true, then we convert the RGB value | |
269 | * to greyscale no mater what visual we are using. | |
270 | */ | |
271 | if (info->var.grayscale) | |
272 | red = green = blue = (19595 * red + 38470 * green + | |
273 | 7471 * blue) >> 16; | |
274 | ||
275 | switch (info->fix.visual) { | |
276 | case FB_VISUAL_TRUECOLOR: | |
277 | /* | |
278 | * 12 or 16-bit True Colour. We encode the RGB value | |
279 | * according to the RGB bitfield information. | |
280 | */ | |
281 | if (regno < 16) { | |
282 | u32 *pal = info->pseudo_palette; | |
283 | ||
284 | val = chan_to_field(red, &info->var.red); | |
285 | val |= chan_to_field(green, &info->var.green); | |
286 | val |= chan_to_field(blue, &info->var.blue); | |
287 | ||
288 | pal[regno] = val; | |
289 | ret = 0; | |
290 | } | |
291 | break; | |
292 | ||
293 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
294 | case FB_VISUAL_PSEUDOCOLOR: | |
295 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
296 | break; | |
297 | } | |
298 | ||
299 | return ret; | |
300 | } | |
301 | ||
302 | /* | |
303 | * imxfb_check_var(): | |
304 | * Round up in the following order: bits_per_pixel, xres, | |
305 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
306 | * bitfields, horizontal timing, vertical timing. | |
307 | */ | |
66c8719b | 308 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
309 | { |
310 | struct imxfb_info *fbi = info->par; | |
80eee6bc | 311 | struct imxfb_rgb *rgb; |
7c2f891c SH |
312 | |
313 | if (var->xres < MIN_XRES) | |
314 | var->xres = MIN_XRES; | |
315 | if (var->yres < MIN_YRES) | |
316 | var->yres = MIN_YRES; | |
317 | if (var->xres > fbi->max_xres) | |
318 | var->xres = fbi->max_xres; | |
319 | if (var->yres > fbi->max_yres) | |
320 | var->yres = fbi->max_yres; | |
321 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
322 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
323 | ||
324 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
325 | switch (var->bits_per_pixel) { | |
1512222b SH |
326 | case 32: |
327 | rgb = &def_rgb_18; | |
328 | break; | |
7c2f891c | 329 | case 16: |
80eee6bc | 330 | default: |
4d1e4e5a | 331 | if (fbi->pcr & PCR_TFT) |
80eee6bc SH |
332 | rgb = &def_rgb_16_tft; |
333 | else | |
334 | rgb = &def_rgb_16_stn; | |
7c2f891c SH |
335 | break; |
336 | case 8: | |
80eee6bc | 337 | rgb = &def_rgb_8; |
7c2f891c | 338 | break; |
7c2f891c SH |
339 | } |
340 | ||
341 | /* | |
342 | * Copy the RGB parameters for this display | |
343 | * from the machine specific parameters. | |
344 | */ | |
80eee6bc SH |
345 | var->red = rgb->red; |
346 | var->green = rgb->green; | |
347 | var->blue = rgb->blue; | |
348 | var->transp = rgb->transp; | |
7c2f891c SH |
349 | |
350 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
351 | var->red.length, var->green.length, var->blue.length, | |
352 | var->transp.length); | |
353 | ||
354 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
355 | var->red.offset, var->green.offset, var->blue.offset, | |
356 | var->transp.offset); | |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
361 | /* | |
362 | * imxfb_set_par(): | |
363 | * Set the user defined part of the display for the specified console | |
364 | */ | |
365 | static int imxfb_set_par(struct fb_info *info) | |
366 | { | |
367 | struct imxfb_info *fbi = info->par; | |
368 | struct fb_var_screeninfo *var = &info->var; | |
369 | ||
1512222b | 370 | if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) |
7c2f891c SH |
371 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
372 | else if (!fbi->cmap_static) | |
373 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
374 | else { | |
375 | /* | |
376 | * Some people have weird ideas about wanting static | |
377 | * pseudocolor maps. I suspect their user space | |
378 | * applications are broken. | |
379 | */ | |
380 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
381 | } | |
382 | ||
66c8719b | 383 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
384 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
385 | ||
386 | imxfb_activate_var(var, info); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
391 | static void imxfb_enable_controller(struct imxfb_info *fbi) | |
392 | { | |
393 | pr_debug("Enabling LCD controller\n"); | |
394 | ||
72330b0e | 395 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); |
7c2f891c | 396 | |
7c2f891c | 397 | /* physical screen start address */ |
72330b0e JB |
398 | writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), |
399 | fbi->regs + LCDC_VPW); | |
7c2f891c | 400 | |
72330b0e JB |
401 | /* panning offset 0 (0 pixel offset) */ |
402 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
403 | |
404 | /* disable hardware cursor */ | |
72330b0e JB |
405 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
406 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 407 | |
72330b0e | 408 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
7c2f891c | 409 | |
f909ef64 SH |
410 | clk_enable(fbi->clk); |
411 | ||
66c8719b | 412 | if (fbi->backlight_power) |
7c2f891c | 413 | fbi->backlight_power(1); |
66c8719b | 414 | if (fbi->lcd_power) |
7c2f891c SH |
415 | fbi->lcd_power(1); |
416 | } | |
417 | ||
418 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
419 | { | |
420 | pr_debug("Disabling LCD controller\n"); | |
421 | ||
66c8719b | 422 | if (fbi->backlight_power) |
7c2f891c | 423 | fbi->backlight_power(0); |
66c8719b | 424 | if (fbi->lcd_power) |
7c2f891c SH |
425 | fbi->lcd_power(0); |
426 | ||
f909ef64 SH |
427 | clk_disable(fbi->clk); |
428 | ||
72330b0e | 429 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
430 | } |
431 | ||
432 | static int imxfb_blank(int blank, struct fb_info *info) | |
433 | { | |
434 | struct imxfb_info *fbi = info->par; | |
435 | ||
436 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
437 | ||
438 | switch (blank) { | |
439 | case FB_BLANK_POWERDOWN: | |
440 | case FB_BLANK_VSYNC_SUSPEND: | |
441 | case FB_BLANK_HSYNC_SUSPEND: | |
442 | case FB_BLANK_NORMAL: | |
443 | imxfb_disable_controller(fbi); | |
444 | break; | |
445 | ||
446 | case FB_BLANK_UNBLANK: | |
447 | imxfb_enable_controller(fbi); | |
448 | break; | |
449 | } | |
450 | return 0; | |
451 | } | |
452 | ||
453 | static struct fb_ops imxfb_ops = { | |
454 | .owner = THIS_MODULE, | |
455 | .fb_check_var = imxfb_check_var, | |
456 | .fb_set_par = imxfb_set_par, | |
457 | .fb_setcolreg = imxfb_setcolreg, | |
458 | .fb_fillrect = cfb_fillrect, | |
459 | .fb_copyarea = cfb_copyarea, | |
460 | .fb_imageblit = cfb_imageblit, | |
461 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
462 | }; |
463 | ||
464 | /* | |
465 | * imxfb_activate_var(): | |
466 | * Configures LCD Controller based on entries in var parameter. Settings are | |
467 | * only written to the controller if changes were made. | |
468 | */ | |
469 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
470 | { | |
471 | struct imxfb_info *fbi = info->par; | |
f909ef64 SH |
472 | unsigned int pcr, lcd_clk; |
473 | unsigned long long tmp; | |
474 | ||
7c2f891c SH |
475 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", |
476 | var->xres, var->hsync_len, | |
477 | var->left_margin, var->right_margin); | |
478 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
479 | var->yres, var->vsync_len, | |
480 | var->upper_margin, var->lower_margin); | |
481 | ||
482 | #if DEBUG_VAR | |
483 | if (var->xres < 16 || var->xres > 1024) | |
484 | printk(KERN_ERR "%s: invalid xres %d\n", | |
485 | info->fix.id, var->xres); | |
486 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
487 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
488 | info->fix.id, var->hsync_len); | |
489 | if (var->left_margin > 255) | |
490 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
491 | info->fix.id, var->left_margin); | |
492 | if (var->right_margin > 255) | |
493 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
494 | info->fix.id, var->right_margin); | |
495 | if (var->yres < 1 || var->yres > 511) | |
496 | printk(KERN_ERR "%s: invalid yres %d\n", | |
497 | info->fix.id, var->yres); | |
498 | if (var->vsync_len > 100) | |
499 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
500 | info->fix.id, var->vsync_len); | |
501 | if (var->upper_margin > 63) | |
502 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
503 | info->fix.id, var->upper_margin); | |
504 | if (var->lower_margin > 255) | |
505 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
506 | info->fix.id, var->lower_margin); | |
507 | #endif | |
508 | ||
7e8549bc SH |
509 | writel(HCR_H_WIDTH(var->hsync_len - 1) | |
510 | HCR_H_WAIT_1(var->right_margin - 1) | | |
511 | HCR_H_WAIT_2(var->left_margin - 3), | |
72330b0e | 512 | fbi->regs + LCDC_HCR); |
7c2f891c | 513 | |
72330b0e | 514 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
515 | VCR_V_WAIT_1(var->lower_margin) | |
516 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 517 | fbi->regs + LCDC_VCR); |
7c2f891c | 518 | |
72330b0e JB |
519 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
520 | fbi->regs + LCDC_SIZE); | |
f909ef64 SH |
521 | |
522 | lcd_clk = clk_get_rate(fbi->clk); | |
523 | tmp = var->pixclock * (unsigned long long)lcd_clk; | |
524 | do_div(tmp, 1000000); | |
525 | if (do_div(tmp, 1000000) > 500000) | |
526 | tmp++; | |
527 | pcr = (unsigned int)tmp; | |
528 | if (--pcr > 0x3F) { | |
529 | pcr = 0x3F; | |
530 | printk(KERN_WARNING "Must limit pixel clock to %uHz\n", | |
531 | lcd_clk / pcr); | |
532 | } | |
533 | ||
f497d015 SH |
534 | switch (var->bits_per_pixel) { |
535 | case 32: | |
536 | pcr |= PCR_BPIX_18; | |
537 | break; | |
538 | case 16: | |
539 | default: | |
540 | if (cpu_is_mx1()) | |
541 | pcr |= PCR_BPIX_12; | |
542 | else | |
543 | pcr |= PCR_BPIX_16; | |
544 | break; | |
545 | case 8: | |
546 | pcr |= PCR_BPIX_8; | |
547 | break; | |
548 | } | |
549 | ||
f909ef64 | 550 | /* add sync polarities */ |
f497d015 | 551 | pcr |= fbi->pcr & ~(0x3f | (7 << 25)); |
f909ef64 SH |
552 | |
553 | writel(pcr, fbi->regs + LCDC_PCR); | |
72330b0e JB |
554 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
555 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); | |
556 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
557 | |
558 | return 0; | |
559 | } | |
560 | ||
7c2f891c SH |
561 | #ifdef CONFIG_PM |
562 | /* | |
563 | * Power management hooks. Note that we won't be called from IRQ context, | |
564 | * unlike the blank functions above, so we may sleep. | |
565 | */ | |
3ae5eaec | 566 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 567 | { |
3ae5eaec | 568 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
569 | |
570 | pr_debug("%s\n", __func__); | |
7c2f891c | 571 | |
9480e307 | 572 | imxfb_disable_controller(fbi); |
7c2f891c SH |
573 | return 0; |
574 | } | |
575 | ||
3ae5eaec | 576 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 577 | { |
3ae5eaec | 578 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
579 | |
580 | pr_debug("%s\n", __func__); | |
7c2f891c | 581 | |
9480e307 | 582 | imxfb_enable_controller(fbi); |
7c2f891c SH |
583 | return 0; |
584 | } | |
585 | #else | |
586 | #define imxfb_suspend NULL | |
587 | #define imxfb_resume NULL | |
588 | #endif | |
589 | ||
72330b0e | 590 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 591 | { |
27889273 | 592 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 593 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c SH |
594 | struct imxfb_info *fbi = info->par; |
595 | ||
5ae12170 | 596 | pr_debug("%s\n",__func__); |
7c2f891c | 597 | |
66c8719b | 598 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
599 | if (!info->pseudo_palette) |
600 | return -ENOMEM; | |
601 | ||
602 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
603 | |
604 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
605 | ||
66c8719b | 606 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
607 | info->fix.type_aux = 0; |
608 | info->fix.xpanstep = 0; | |
609 | info->fix.ypanstep = 0; | |
610 | info->fix.ywrapstep = 0; | |
66c8719b | 611 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
612 | |
613 | info->var.nonstd = 0; | |
614 | info->var.activate = FB_ACTIVATE_NOW; | |
615 | info->var.height = -1; | |
616 | info->var.width = -1; | |
617 | info->var.accel_flags = 0; | |
66c8719b | 618 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
619 | |
620 | info->fbops = &imxfb_ops; | |
66c8719b SH |
621 | info->flags = FBINFO_FLAG_DEFAULT | |
622 | FBINFO_READS_FAST; | |
7c2f891c | 623 | |
27889273 SH |
624 | fbi->max_xres = pdata->xres; |
625 | info->var.xres = pdata->xres; | |
626 | info->var.xres_virtual = pdata->xres; | |
627 | fbi->max_yres = pdata->yres; | |
628 | info->var.yres = pdata->yres; | |
629 | info->var.yres_virtual = pdata->yres; | |
630 | fbi->max_bpp = pdata->bpp; | |
631 | info->var.bits_per_pixel = pdata->bpp; | |
632 | info->var.nonstd = pdata->nonstd; | |
633 | info->var.pixclock = pdata->pixclock; | |
634 | info->var.hsync_len = pdata->hsync_len; | |
635 | info->var.left_margin = pdata->left_margin; | |
636 | info->var.right_margin = pdata->right_margin; | |
637 | info->var.vsync_len = pdata->vsync_len; | |
638 | info->var.upper_margin = pdata->upper_margin; | |
639 | info->var.lower_margin = pdata->lower_margin; | |
640 | info->var.sync = pdata->sync; | |
641 | info->var.grayscale = pdata->cmap_greyscale; | |
642 | fbi->cmap_inverse = pdata->cmap_inverse; | |
643 | fbi->cmap_static = pdata->cmap_static; | |
644 | fbi->pcr = pdata->pcr; | |
645 | fbi->lscr1 = pdata->lscr1; | |
646 | fbi->dmacr = pdata->dmacr; | |
647 | fbi->pwmr = pdata->pwmr; | |
648 | fbi->lcd_power = pdata->lcd_power; | |
649 | fbi->backlight_power = pdata->backlight_power; | |
7c2f891c SH |
650 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * |
651 | fbi->max_bpp / 8; | |
652 | ||
653 | return 0; | |
654 | } | |
655 | ||
3ae5eaec | 656 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 657 | { |
7c2f891c SH |
658 | struct imxfb_info *fbi; |
659 | struct fb_info *info; | |
27889273 | 660 | struct imx_fb_platform_data *pdata; |
7c2f891c SH |
661 | struct resource *res; |
662 | int ret; | |
663 | ||
d6b51502 | 664 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
7c2f891c SH |
665 | |
666 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 667 | if (!res) |
7c2f891c SH |
668 | return -ENODEV; |
669 | ||
27889273 SH |
670 | pdata = pdev->dev.platform_data; |
671 | if (!pdata) { | |
f99c8929 | 672 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
673 | return -ENOMEM; |
674 | } | |
675 | ||
3ae5eaec | 676 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 677 | if (!info) |
7c2f891c SH |
678 | return -ENOMEM; |
679 | ||
680 | fbi = info->par; | |
681 | ||
3ae5eaec | 682 | platform_set_drvdata(pdev, info); |
7c2f891c | 683 | |
72330b0e | 684 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 685 | if (ret < 0) |
7c2f891c SH |
686 | goto failed_init; |
687 | ||
72330b0e JB |
688 | res = request_mem_region(res->start, resource_size(res), |
689 | DRIVER_NAME); | |
7c2f891c SH |
690 | if (!res) { |
691 | ret = -EBUSY; | |
72330b0e JB |
692 | goto failed_req; |
693 | } | |
694 | ||
f909ef64 SH |
695 | fbi->clk = clk_get(&pdev->dev, NULL); |
696 | if (IS_ERR(fbi->clk)) { | |
697 | ret = PTR_ERR(fbi->clk);; | |
698 | dev_err(&pdev->dev, "unable to get clock: %d\n", ret); | |
699 | goto failed_getclock; | |
700 | } | |
701 | ||
72330b0e JB |
702 | fbi->regs = ioremap(res->start, resource_size(res)); |
703 | if (fbi->regs == NULL) { | |
d6b51502 | 704 | dev_err(&pdev->dev, "Cannot map frame buffer registers\n"); |
72330b0e | 705 | goto failed_ioremap; |
7c2f891c SH |
706 | } |
707 | ||
27889273 | 708 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
709 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
710 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
711 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
712 | ||
713 | if (!fbi->map_cpu) { | |
f99c8929 | 714 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
715 | ret = -ENOMEM; |
716 | goto failed_map; | |
717 | } | |
72330b0e JB |
718 | |
719 | info->screen_base = fbi->map_cpu; | |
720 | fbi->screen_cpu = fbi->map_cpu; | |
721 | fbi->screen_dma = fbi->map_dma; | |
722 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
723 | } else { |
724 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
725 | fbi->map_cpu = pdata->fixed_screen_cpu; |
726 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
727 | info->screen_base = fbi->map_cpu; |
728 | fbi->screen_cpu = fbi->map_cpu; | |
729 | fbi->screen_dma = fbi->map_dma; | |
730 | info->fix.smem_start = fbi->screen_dma; | |
731 | } | |
732 | ||
c0b90a31 SH |
733 | if (pdata->init) { |
734 | ret = pdata->init(fbi->pdev); | |
735 | if (ret) | |
736 | goto failed_platform_init; | |
737 | } | |
738 | ||
7c2f891c SH |
739 | /* |
740 | * This makes sure that our colour bitfield | |
741 | * descriptors are correctly initialised. | |
742 | */ | |
743 | imxfb_check_var(&info->var, info); | |
744 | ||
66c8719b | 745 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
746 | if (ret < 0) |
747 | goto failed_cmap; | |
748 | ||
7c2f891c SH |
749 | imxfb_set_par(info); |
750 | ret = register_framebuffer(info); | |
751 | if (ret < 0) { | |
f99c8929 | 752 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
753 | goto failed_register; |
754 | } | |
755 | ||
756 | imxfb_enable_controller(fbi); | |
757 | ||
758 | return 0; | |
759 | ||
760 | failed_register: | |
761 | fb_dealloc_cmap(&info->cmap); | |
762 | failed_cmap: | |
c0b90a31 SH |
763 | if (pdata->exit) |
764 | pdata->exit(fbi->pdev); | |
765 | failed_platform_init: | |
27889273 | 766 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 767 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 768 | fbi->map_dma); |
7c2f891c | 769 | failed_map: |
f909ef64 SH |
770 | clk_put(fbi->clk); |
771 | failed_getclock: | |
72330b0e JB |
772 | iounmap(fbi->regs); |
773 | failed_ioremap: | |
d6b51502 | 774 | release_mem_region(res->start, resource_size(res)); |
72330b0e JB |
775 | failed_req: |
776 | kfree(info->pseudo_palette); | |
7c2f891c | 777 | failed_init: |
3ae5eaec | 778 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
779 | framebuffer_release(info); |
780 | return ret; | |
781 | } | |
782 | ||
72330b0e | 783 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 784 | { |
c0b90a31 | 785 | struct imx_fb_platform_data *pdata; |
3ae5eaec | 786 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 787 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
788 | struct resource *res; |
789 | ||
790 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
791 | ||
772a9e63 | 792 | imxfb_disable_controller(fbi); |
7c2f891c SH |
793 | |
794 | unregister_framebuffer(info); | |
795 | ||
c0b90a31 SH |
796 | pdata = pdev->dev.platform_data; |
797 | if (pdata->exit) | |
798 | pdata->exit(fbi->pdev); | |
799 | ||
7c2f891c SH |
800 | fb_dealloc_cmap(&info->cmap); |
801 | kfree(info->pseudo_palette); | |
802 | framebuffer_release(info); | |
803 | ||
72330b0e | 804 | iounmap(fbi->regs); |
d6b51502 | 805 | release_mem_region(res->start, resource_size(res)); |
f909ef64 SH |
806 | clk_disable(fbi->clk); |
807 | clk_put(fbi->clk); | |
808 | ||
3ae5eaec | 809 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
810 | |
811 | return 0; | |
812 | } | |
813 | ||
3ae5eaec | 814 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 815 | { |
3ae5eaec | 816 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
817 | struct imxfb_info *fbi = info->par; |
818 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
819 | } |
820 | ||
3ae5eaec | 821 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
822 | .suspend = imxfb_suspend, |
823 | .resume = imxfb_resume, | |
72330b0e | 824 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 825 | .shutdown = imxfb_shutdown, |
3ae5eaec | 826 | .driver = { |
72330b0e | 827 | .name = DRIVER_NAME, |
3ae5eaec | 828 | }, |
7c2f891c SH |
829 | }; |
830 | ||
831 | int __init imxfb_init(void) | |
832 | { | |
72330b0e | 833 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
834 | } |
835 | ||
836 | static void __exit imxfb_cleanup(void) | |
837 | { | |
3ae5eaec | 838 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
839 | } |
840 | ||
841 | module_init(imxfb_init); | |
842 | module_exit(imxfb_cleanup); | |
843 | ||
844 | MODULE_DESCRIPTION("Motorola i.MX framebuffer driver"); | |
845 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | |
846 | MODULE_LICENSE("GPL"); |